November 2024 - flashrom-gerrit

[S] Change in flashrom[main]: Rename cli_classic.h to a more adequate cli_getop.h
by Antonio Vázquez Blanco (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Anastasia Klimchuk. Antonio Vázquez Blanco has posted comments on this change by Antonio Vázquez Blanco. ( https://review.coreboot.org/c/flashrom/+/85072?usp=email ) Change subject: Rename cli_classic.h to a more adequate cli_getop.h ...................................................................... Patch Set 2: (2 comments) File cli_getopt.c: https://review.coreboot.org/c/flashrom/+/85072/comment/a729ace5_ec5fc221?us… : PS1, Line 28: #include "cli_getopt.h" > I noticed you put this line on the top, why? Usually the style we have is: first come includes in <> […] Sorry, this is even subconscious for me. I do this because cli_getopt.h is the interface for cli_getopt.c, for this reason, including cli_getop.h first helps debug whether that header file is fully independent from any of the other includes in the "c" file. After that, I usually try to include other project headers and finally system headers because this strategy helps with producing clean includes... I've changed the use of quotes but left the include on the top. Please let me know if you prefer to change it. Thanks! https://review.coreboot.org/c/flashrom/+/85072/comment/3330c52d_18658643?us… : PS1, Line 35: // msg_gerr > I noticed you are adding this comments for includes of flash. […] Acknowledged -- To view, visit https://review.coreboot.org/c/flashrom/+/85072?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Iaceeabedc26e93147d8122376d88e730aad1e355 Gerrit-Change-Number: 85072 Gerrit-PatchSet: 2 Gerrit-Owner: Antonio Vázquez Blanco <antoniovazquezblanco(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Mon, 11 Nov 2024 08:39:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>

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[S] Change in flashrom[main]: Rename cli_classic.h to a more adequate cli_getop.h
by Antonio Vázquez Blanco (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Anastasia Klimchuk, Antonio Vázquez Blanco. Hello Anastasia Klimchuk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/85072?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: Rename cli_classic.h to a more adequate cli_getop.h ...................................................................... Rename cli_classic.h to a more adequate cli_getop.h The header only defines getop related stuff so it seems more intuitive this way. Change-Id: Iaceeabedc26e93147d8122376d88e730aad1e355 Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco(a)gmail.com> --- M cli_classic.c M cli_getopt.c R include/cli_getopt.h 3 files changed, 12 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/72/85072/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/85072?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Iaceeabedc26e93147d8122376d88e730aad1e355 Gerrit-Change-Number: 85072 Gerrit-PatchSet: 2 Gerrit-Owner: Antonio Vázquez Blanco <antoniovazquezblanco(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Antonio Vázquez Blanco <antoniovazquezblanco(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org>

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[M] Change in flashrom[main]: doc: Add few sections to recent development doc
by Anastasia Klimchuk (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Peter Marheine. Anastasia Klimchuk has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/84954?usp=email ) Change subject: doc: Add few sections to recent development doc ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: I decided to submit another larger patch first, because this one is easier to rebase with merge conflicts. Did that, so now this one needs approval again. Thank you! -- To view, visit https://review.coreboot.org/c/flashrom/+/84954?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Iedaca4a704c57c1db399c7888f743ad2961cbf9d Gerrit-Change-Number: 84954 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Mon, 11 Nov 2024 02:50:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in flashrom[main]: doc: Add few sections to recent development doc
by Anastasia Klimchuk (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Anastasia Klimchuk, Peter Marheine. Hello Peter Marheine, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/84954?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+2 by Peter Marheine, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: doc: Add few sections to recent development doc ...................................................................... doc: Add few sections to recent development doc Change-Id: Iedaca4a704c57c1db399c7888f743ad2961cbf9d Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> --- M doc/release_notes/devel.rst 1 file changed, 78 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/84954/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/84954?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Iedaca4a704c57c1db399c7888f743ad2961cbf9d Gerrit-Change-Number: 84954 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org>

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[L] Change in flashrom[main]: cli_client: Add rpmc command support
by Anastasia Klimchuk (Code Review) 11 Nov '24

11 Nov '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84840?usp=email ) Change subject: cli_client: Add rpmc command support ...................................................................... cli_client: Add rpmc command support This commit adds uses the new rpmc command implementation to add them as a new feature to the cli_client. Also adds the necessary documentation for this new feature. Tested on the Winbond W25R128JV as a 'SFDP-capable chip'. This patch was done to add rpmc command support to flashrom. This enables users to write root keys to their flash chips while they flash data on the chip. This might become useful in the future as rpmc support is extended in coreboot. Also adds debug tools to flashrom, which might be useful in implementing coreboots rpmc support. Change-Id: I36c823bbee65f256eb6edabe6f058321c9a0cfa1 Signed-off-by: Matti Finder <matti.finder(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84840 Reviewed-by: Peter Marheine <pmarheine(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M cli_classic.c M doc/classic_cli_manpage.rst M doc/dev_guide/building_from_source.rst M doc/release_notes/devel.rst 4 files changed, 307 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Peter Marheine: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved diff --git a/cli_classic.c b/cli_classic.c index 896c167..2fe9324 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -24,6 +24,7 @@ #include <string.h> #include <stdbool.h> #include <stdlib.h> +#include <stdint.h> #include <cli_classic.h> #include "flash.h" #include "flashchips.h" @@ -31,6 +32,10 @@ #include "programmer.h" #include "libflashrom.h" +#if CONFIG_RPMC_ENABLED == 1 +#include "rpmc.h" +#endif /* CONFIG_RPMC_ENABLED */ + enum { OPTION_IFD = 0x0100, OPTION_FMAP, @@ -46,6 +51,16 @@ OPTION_WP_LIST, OPTION_PROGRESS, OPTION_SACRIFICE_RATIO, +#if CONFIG_RPMC_ENABLED == 1 + OPTION_RPMC_READ_DATA, + OPTION_RPMC_WRITE_ROOT_KEY, + OPTION_RPMC_UPDATE_HMAC_KEY, + OPTION_RPMC_INCREMENT_COUNTER, + OPTION_RPMC_GET_COUNTER, + OPTION_RPMC_COUNTER_ADDRESS, + OPTION_RPMC_KEY_DATA, + OPTION_RPMC_KEY_FILE, +#endif /* CONFIG_RPMC_ENABLED */ }; struct cli_options { @@ -75,6 +90,17 @@ char *referencefile; const char *chip_to_probe; int sacrifice_ratio; + +#if CONFIG_RPMC_ENABLED == 1 + bool rpmc_read_data; + bool rpmc_write_root_key; + bool rpmc_update_hmac_key; + bool rpmc_increment_counter; + bool rpmc_get_counter; + unsigned int rpmc_counter_address; + uint32_t rpmc_key_data, rpmc_previous_counter_value; + const char *rpmc_root_key_file; +#endif /* CONFIG_RPMC_ENABLED */ }; static void cli_classic_usage(const char *name) @@ -129,10 +155,27 @@ " operation VS the longevity of the chip. Default is\n" " longevity.\n" " DANGEROUS! It wears your chip faster!\n" +#if CONFIG_RPMC_ENABLED == 1 + "RPMC COMMANDS\n" + " --get-rpmc-status read the extended status\n" + " --write-root-key write the root key register\n" + " --update-hmac-key update the hmac key register\n" + " --increment-counter <current>\n" + " increment rpmc counter\n" + " --get-counter get rpmc counter\n" + "RPMC OPTIONS\n" + " --counter-address <address> counter address (default: 0)\n" + " --rpmc-root-key <keyfile> rpmc root key file\n" + " --key-data <value> hex number to use as key data (default: 0)\n" +#endif /* CONFIG_RPMC_ENABLED */ + "PROGRAMMER SELECTION OPTIONS\n" " -p | --programmer <name>[:<param>] specify the programmer device. One of\n"); list_programmers_linebreak(4, 80, 0); - printf(".\n\nYou can specify one of -h, -R, -L, " - "-E, -r, -w, -v or no operation.\n" + printf(".\n\nYou can specify one of -h, -R, -L, -E, -r, -w, -v" +#if CONFIG_RPMC_ENABLED == 1 + ", a RPMC command" +#endif /* CONFIG_RPMC_ENABLED */ + " or no operation.\n" "If no operation is specified, flashrom will only probe for flash chips.\n"); } @@ -405,6 +448,110 @@ return 0; } +#if CONFIG_RPMC_ENABLED == 1 +static int rpmc_cli(struct flashctx *flash, + const char *const key_file, + const uint32_t key_data, + const unsigned int counter_address, + const uint32_t previous_counter, + const bool op_read_data, + const bool op_write_root_key, + const bool op_update_hmac_key, + const bool op_increment_counter, + const bool op_get_counter) +{ + if (op_write_root_key) { + enum rpmc_result result = rpmc_write_root_key(flash, key_file, counter_address); + if (result != RPMC_SUCCESS) { + msg_gerr("Failed to write root key\n%s", rpmc_describe_result(result)); + return 1; + } + + msg_ginfo("Successfully wrote new root key for counter %u.\n", counter_address); + } + + if (op_update_hmac_key) { + enum rpmc_result result = rpmc_update_hmac_key(flash, + key_file, + key_data, + counter_address); + if (result != RPMC_SUCCESS) { + msg_gerr("Failed to update hmac key\n%s", rpmc_describe_result(result)); + return 1; + } + + msg_ginfo("Successfully updated hmac key to 0x%08x for counter %u.\n", + key_data, + counter_address); + } + + if (op_increment_counter) { + enum rpmc_result result = rpmc_increment_counter(flash, + key_file, + key_data, + counter_address, + previous_counter); + if (result != RPMC_SUCCESS) { + msg_gerr("Failed to increment the counter\n%s", rpmc_describe_result(result)); + return 1; + } + + msg_ginfo("Successfully incremented counter %u.\n", counter_address); + } + + if (op_get_counter) { + uint32_t counter_value; + enum rpmc_result result = rpmc_get_monotonic_counter(flash, + key_file, + key_data, + counter_address, + &counter_value); + if (result != RPMC_SUCCESS) { + msg_gerr("Failed to get the counter value\n%s", rpmc_describe_result(result)); + return 1; + } + + msg_ginfo("Returned counter value %u for counter %u\n", counter_value, counter_address); + } + + if (op_read_data) { + struct rpmc_status_register status; + enum rpmc_result result = rpmc_read_data(flash, &status); + if (result != RPMC_SUCCESS) { + msg_gerr("Failed to read read rpmc data\n%s", rpmc_describe_result(result)); + return 1; + } + + msg_ginfo("Reading rpmc data returned:\n"); + + char bin_buffer[9]; + uint8_t status_bits = status.status; + for (int i = 7; i >= 0; i--){ + bin_buffer[i] = '0' + (status_bits & 1); + status_bits = status_bits >> 1; + } + bin_buffer[8] = '\0'; + msg_ginfo("Extended Status: 0b%s\n", bin_buffer); + + msg_ginfo("Tag:\n"); + for (size_t i = 0; i < RPMC_TAG_LENGTH; i++){ + msg_ginfo("0x%02x ", status.tag[i]); + } + msg_ginfo("\n"); + + msg_ginfo("Counter: %u\n", status.counter_data); + + msg_ginfo("Signature:\n"); + for (size_t i = 0; i < RPMC_SIGNATURE_LENGTH; i++){ + msg_ginfo("0x%02x ", status.signature[i]); + } + msg_ginfo("\n"); + } + + return 0; +} +#endif /* CONFIG_RPMC_ENABLED */ + /** * @brief Reads content to buffer from one or more files. * @@ -824,6 +971,33 @@ /* It is okay to convert invalid input to 0. */ options->sacrifice_ratio = atoi(optarg); break; +#if CONFIG_RPMC_ENABLED == 1 + case OPTION_RPMC_READ_DATA: + options->rpmc_read_data = true; + break; + case OPTION_RPMC_WRITE_ROOT_KEY: + options->rpmc_write_root_key = true; + break; + case OPTION_RPMC_UPDATE_HMAC_KEY: + options->rpmc_update_hmac_key = true; + break; + case OPTION_RPMC_INCREMENT_COUNTER: + options->rpmc_increment_counter = true; + options->rpmc_previous_counter_value = strtoumax(optarg, NULL, 10); + break; + case OPTION_RPMC_GET_COUNTER: + options->rpmc_get_counter = true; + break; + case OPTION_RPMC_COUNTER_ADDRESS: + options->rpmc_counter_address = strtoumax(optarg, NULL, 10); + break; + case OPTION_RPMC_KEY_DATA: + options->rpmc_key_data = strtoumax(optarg, NULL, 16); + break; + case OPTION_RPMC_KEY_FILE: + options->rpmc_root_key_file = strdup(optarg); + break; +#endif /* CONFIG_RPMC_ENABLED */ default: cli_classic_abort_usage(NULL); break; @@ -894,6 +1068,16 @@ {"output", 1, NULL, 'o'}, {"progress", 0, NULL, OPTION_PROGRESS}, {"sacrifice-ratio", 1, NULL, OPTION_SACRIFICE_RATIO}, +#if CONFIG_RPMC_ENABLED == 1 + {"get-rpmc-status", 0, NULL, OPTION_RPMC_READ_DATA}, + {"write-root-key", 0, NULL, OPTION_RPMC_WRITE_ROOT_KEY}, + {"update-hmac-key", 0, NULL, OPTION_RPMC_UPDATE_HMAC_KEY}, + {"increment-counter", 1, NULL, OPTION_RPMC_INCREMENT_COUNTER}, + {"get-counter", 0, NULL, OPTION_RPMC_GET_COUNTER}, + {"counter-address", 1, NULL, OPTION_RPMC_COUNTER_ADDRESS}, + {"key-data", 1, NULL, OPTION_RPMC_KEY_DATA}, + {"rpmc-root-key", 1, NULL, OPTION_RPMC_KEY_FILE}, +#endif /* CONFIG_RPMC_ENABLED */ {NULL, 0, NULL, 0}, }; @@ -1104,9 +1288,17 @@ options.set_wp_range || options.set_wp_region || options.enable_wp || options.disable_wp || options.print_wp_status || options.print_wp_ranges; + const bool any_rpmc_op = +#if CONFIG_RPMC_ENABLED == 1 + options.rpmc_read_data || options.rpmc_write_root_key || options.rpmc_update_hmac_key || + options.rpmc_increment_counter || options.rpmc_get_counter; +#else + false; +#endif /* CONFIG_RPMC_ENABLED */ + const bool any_op = options.read_it || options.write_it || options.verify_it || options.erase_it || options.flash_name || options.flash_size || - options.extract_it || any_wp_op; + options.extract_it || any_wp_op || any_rpmc_op; if (!any_op) { msg_ginfo("No operations were specified.\n"); @@ -1250,6 +1442,21 @@ else if (options.verify_it) ret = do_verify(fill_flash, options.filename); +#if CONFIG_RPMC_ENABLED == 1 + if (any_rpmc_op && ret == 0) { + ret = rpmc_cli(fill_flash, + options.rpmc_root_key_file, + options.rpmc_key_data, + options.rpmc_counter_address, + options.rpmc_previous_counter_value, + options.rpmc_read_data, + options.rpmc_write_root_key, + options.rpmc_update_hmac_key, + options.rpmc_increment_counter, + options.rpmc_get_counter); + } +#endif /* CONFIG_RPMC_ENABLED */ + out_release: flashrom_layout_release(options.layout); out_shutdown: diff --git a/doc/classic_cli_manpage.rst b/doc/classic_cli_manpage.rst index f0879e4..47df6c7 100644 --- a/doc/classic_cli_manpage.rst +++ b/doc/classic_cli_manpage.rst @@ -19,7 +19,11 @@ | [-i <include>[:<file>]]] | [--wp-status] [--wp-list] [--wp-enable|--wp-disable] | [--wp-range <start>,<length>|--wp-region <region>] -| [-n] [-N] [-f])] +| [-n] [-N] [-f] +| [--rpmc-root-key <keyfile>] [--key-data <value>] +| [--counter-address <address>] +| [--get-rpmc-status] [--write-root-key] [--update-hmac-key] +| [--increment-counter <current>] [--get-counter])] | [-V[V[V]]] [-o <logfile>] [--progress] [--sacrifice-ratio <ratio>] @@ -39,7 +43,7 @@ OPTIONS ------- -You can specify one of ``-h``, ``-R``, ``-L``, ``-E``, ``-r``, ``-w``, ``-v`` or no operation. +You can specify one of ``-h``, ``-R``, ``-L``, ``-E``, ``-r``, ``-w``, ``-v``, a RPMC command or no operation. If no operation is specified, **flashrom** will only probe for flash chips. It is recommended that if you try **flashrom** the first time on a system, you run it in probe-only mode and check the output. Also you are advised to make a backup of your current ROM contents with ``-r`` before you try to write a new image. @@ -334,6 +338,81 @@ **-R, --version** Show version information and exit. +RPMC commands +^^^^^^^^^^^^^ + +This section describes the commands added in JESD260. They are only supported on specific chip models. +If the chip is detected correctly but you still get ``Error: RPMC commands are not supported on this device``, +try using ``-c "SFDP-capable chip"`` for automatic feature detection. + +**--get-rpmc-status** + Read the extended RPMC status by issuing a OP2 command + + Example:: + + flashrom -p prog --get-rpmc-status + + +**--write-root-key** + Write new root key from **--rpmc-root-key** file for **--counter-address**. + + Example:: + + flashrom -p prog --rpmc-root-key <keyfile> --counter-address <address> --write-root-key + +**--update-hmac-key** + Update the hmac key register for **--counter-address** with the provided **--key-data**. + Requires valid **--rpmc-root-key**. + + Example:: + + flashrom -p prog --rpmc-root-key <keyfile> --counter-address <address> --key-data <value> --update-hmac-key + +**--increment-counter <current>** + Increments the counter at **--counter-address** by one above the **<current>**. + Requires previously updated **--key-data** and valid **--rpmc-root-key**. + + Examples:: + + flashrom -p prog --rpmc-root-key <keyfile> --counter-address <address> --key-data <value> --increment-counter 12 + flashrom -p prog --rpmc-root-key <keyfile> --counter-address <address> --key-data <value> -w rom.bin --update-hmac-key --increment-counter 25 + +**--get-counter** + Get the current counter value for **--counter-address**. + Requires previously updated **--key-data** and valid **--rpmc-root-key**. + + Examples:: + + flashrom -p prog --rpmc-root-key <keyfile> --counter-address <address> --key-data <value> --get-counter + flashrom -p prog --rpmc-root-key <keyfile> --counter-address <address> --key-data <value> --update-hmac-key --get-counter + +RPMC options +^^^^^^^^^^^^ + +**--counter-address <address>** + Target the counter at **<address>** for any RPMC operations. + Addressing starts at 0. + Defaults to 0. + + Example:: + + flashrom --counter-address 2 + +**--rpmc-root-key <keyfile>** + Use **<keyfile>** as location of 32-byte root key. + + Example:: + + flashrom --rpmc-root-key /home/user/some_key.bin + +**--key-data <value>** + Hexadecimal **<value>** will be used as 4-byte key data in RPMC operations. + Defaults to 0. + + Example:: + + flashrom --key-data 12abc + .. _programmer-specific information: PROGRAMMER-SPECIFIC INFORMATION diff --git a/doc/dev_guide/building_from_source.rst b/doc/dev_guide/building_from_source.rst index b360b60..73f5c2b 100644 --- a/doc/dev_guide/building_from_source.rst +++ b/doc/dev_guide/building_from_source.rst @@ -20,10 +20,12 @@ * libftdi1 [#b2]_ * libjaylink [#b2]_ * NI-845x driver & library package [#b3]_ +* libcrypto [#b4]_ .. [#b1] | optional, for building unit testing .. [#b2] | optional, depending on the selected programmer .. [#b3] | optional, proprietary and Windows only. (See Windows build instructions) +.. [#b4] | optional, to enable RPMC commands If you are cross compiling, install the dependencies for your target. @@ -56,7 +58,8 @@ apt-get install -y \ gcc meson ninja-build pkg-config python3-sphinx \ - libcmocka-dev libpci-dev libusb-1.0-0-dev libftdi1-dev libjaylink-dev + libcmocka-dev libpci-dev libusb-1.0-0-dev libftdi1-dev libjaylink-dev \ + libssl-dev * ArchLinux / Manjaro @@ -64,7 +67,8 @@ pacman -S --noconfirm \ gcc meson ninja pkg-config python-sphinx cmocka \ - pciutils libusb libftdi libjaylink + pciutils libusb libftdi libjaylink \ + openssl * openSUSE / SUSE diff --git a/doc/release_notes/devel.rst b/doc/release_notes/devel.rst index e0c42a5..02b4e24 100644 --- a/doc/release_notes/devel.rst +++ b/doc/release_notes/devel.rst @@ -67,6 +67,16 @@ The tradeoff is the speed of programming operation VS the longevity of the chip. Default is longevity. +RPMC support added +================== + +Adding support for RPMC commands as specified by JESD260 to the cli_client. Main +implementation is in rpmc.c. Also adds new parsing capabilities for the sfdp +page carrying the necessary information. All the features are optional and +depend on libcrypto. +It currently uses automatic feature detection through the corresponding +sfdp page. + Chipset support =============== -- To view, visit https://review.coreboot.org/c/flashrom/+/84840?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I36c823bbee65f256eb6edabe6f058321c9a0cfa1 Gerrit-Change-Number: 84840 Gerrit-PatchSet: 15 Gerrit-Owner: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[L] Change in flashrom[main]: rpmc: add rpmc commands feature
by Anastasia Klimchuk (Code Review) 11 Nov '24

11 Nov '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84934?usp=email ) Change subject: rpmc: add rpmc commands feature ...................................................................... rpmc: add rpmc commands feature Added optional support for all the commands specified in JESD260. Added a new optional dependency to openssls libcrypto. Added parsing for the rpmc parameter sfdp table. Added necessary rpmc parameter information to flashchips struct and the flash hardening feature to enable rpmc commands. Enables future use of these commands in the cli_client and also libflashrom. Change-Id: I6ab3d0446e9fd674b20550fdbfaf499b8d4a9b38 Signed-off-by: Matti Finder <matti.finder(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84934 Reviewed-by: Peter Marheine <pmarheine(a)chromium.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M MAINTAINERS M include/flash.h A include/rpmc.h M meson.build M meson_options.txt A rpmc.c M sfdp.c 7 files changed, 819 insertions(+), 10 deletions(-) Approvals: Peter Marheine: Looks good to me, approved build bot (Jenkins): Verified Anastasia Klimchuk: Looks good to me, approved diff --git a/MAINTAINERS b/MAINTAINERS index c54eceb..612403b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -102,6 +102,12 @@ S: Supported F: i2c_helper_linux.c +REPLAY PROTECTED MONOTONIC COUNTER +M: Matti Finder <matti.finder(a)gmail.com> +S: Maintained +F: rpmc.c +F: include/rpmc.h + WRITEPROTECT M: Nikolai Artemiev <nartemiev(a)google.com> M: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> diff --git a/include/flash.h b/include/flash.h index f13d202..a1f1551 100644 --- a/include/flash.h +++ b/include/flash.h @@ -172,6 +172,11 @@ /* Whether chip has configuration register (RDCR/WRSR_EXT2 commands) */ #define FEATURE_CFGR (1 << 25) +/* + * Whether the chip supports serial flash hardening specified in JESD260 + */ +#define FEATURE_FLASH_HARDENING (1 << 26) + #define ERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0x00 : 0xff) #define UNERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0xff : 0x00) @@ -543,6 +548,32 @@ * and determines what protection range they select. */ enum decode_range_func decode_range; + + struct rpmc_config { + uint8_t op1_opcode; + uint8_t op2_opcode; + + unsigned int num_counters; + + /* + * Busy Polling Method : + * ‘0’: Poll for OP1 busy using OP2 Extended Status[0]. + * No OP1 Suspended State Support. + * ‘1’: Poll for OP1 busy using Read Status (05H). + * Suspended State is supported. + */ + enum busy_polling_methods { + POLL_OP2_EXTENDED_STATUS = 0, + POLL_READ_STATUS = 1 + } busy_polling_method; + + unsigned int update_rate; + + /* All times in microsecond (us) */ + unsigned int polling_delay_read_counter_us; + unsigned int polling_short_delay_write_counter_us; + unsigned int polling_long_delay_write_counter_us; + } rpmc_ctx; }; typedef int (*chip_restore_fn_cb_t)(struct flashctx *flash, void *data); diff --git a/include/rpmc.h b/include/rpmc.h new file mode 100644 index 0000000..271aaef --- /dev/null +++ b/include/rpmc.h @@ -0,0 +1,165 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2024 Matti Finder + * (written by Matti Finder <matti.finder(a)gmail.com>) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __RPMC_H__ +#define __RPMC_H__ 1 + +#include <stdint.h> +#include "flash.h" // for flashctx + +/** + * @defgroup flashrom-rpmc RPMC operations + * @{ + */ + +#define RPMC_OP1_MSG_HEADER_LENGTH 4 +#define RPMC_SIGNATURE_LENGTH 32 +#define RPMC_COUNTER_LENGTH 4 +#define RPMC_KEY_DATA_LENGTH 4 +#define RPMC_TAG_LENGTH 12 +#define RPMC_HMAC_KEY_LENGTH 32 +#define RPMC_TRUNCATED_SIG_LENGTH 28 + +enum rpmc_result { + RPMC_SUCCESS = 0, + RPMC_ERROR_SPI_TRANSMISSION, + RPMC_ERROR_OPENSSL, + RPMC_ERROR_TAG_MISMATCH, + RPMC_ERROR_SIGNATURE_MISMATCH, + RPMC_ERROR_INTERNAL, + RPMC_ERROR_KEY_READ, + RPMC_ERROR_HARDENING_UNSUPPORTED, + RPMC_ERROR_COUNTER_OUT_OF_RANGE, + RPMC_ERROR_ROOT_KEY_OVERWRITE, + RPMC_ERROR_COUNTER_UNINITIALIZED, + RPMC_ERROR_COUNTER_DATA_MISMATCH, + RPMC_ERROR_HMAC_KEY_REGISTER_UNINITIALIZED, + RPMC_ERROR_WRONG_SIGNATURE +}; + +struct rpmc_status_register { + /* + * Values: + * 0b00000000 -> Power on state + * 0b10000000 -> Success + * 0b0xxxxxx1 -> Busy + * 0b0xxxxx1x -> Error: Root key register overwrite, + * counter Address out of range, + * truncated signature mismatch + * or monotonic counter uninitialized + * 0b0xxxx1xx -> Error: Signature mismatch, + * counter address out of range, + * cmdtype out of range + * or incorrect payload size + * 0b0xxx1xxx -> Error: Hmac key register uninitialized + * 0b0xx1xxxx -> Error: Counter data mismatch + * 0b0x1xxxxx -> Fatal device error + * + * Some bits might exclude others or their meaning might be dependent + * on previous commands. + * Read JESD260 or your device's data sheet for more details. + */ + uint8_t status; + unsigned char tag[RPMC_TAG_LENGTH]; + uint32_t counter_data; + unsigned char signature[RPMC_SIGNATURE_LENGTH]; +}; + +/** + * @brief Write root key on flashchip + * + * @param[in] flash Flash context which rpmc options will be used + * @param[in] keyfile Location of 32-byte key to use + * @param[in] counter_address Address of counter (starts at 0) + * + * @return The result of the operation + */ +enum rpmc_result rpmc_write_root_key(struct flashrom_flashctx *flash, + const char *keyfile, + unsigned int counter_address); + +/** + * @brief Update hmac key register + * + * @param[in] flash Flash context which rpmc options will be used + * @param[in] keyfile Location of 32-byte key to use + * @param[in] key_data 4-bytes of data to use as key data + * @param[in] counter_address Address of counter (starts at 0) + * + * @return The result of the operation + */ +enum rpmc_result rpmc_update_hmac_key(struct flashrom_flashctx *flash, + const char *keyfile, + uint32_t key_data, + unsigned int counter_address); + +/** + * @brief Increment monotonic counter value + * + * @param[in] flash Flash context which rpmc options will be used + * @param[in] keyfile Location of 32-byte key to use + * @param[in] key_data 4-bytes of data to use as key data + * @param[in] counter_address Address of counter (starts at 0) + * @param[in] previous_value Previous value of counter + * + * @return The result of the operation + */ +enum rpmc_result rpmc_increment_counter(struct flashrom_flashctx *flash, + const char *keyfile, + uint32_t key_data, + unsigned int counter_address, + uint32_t previous_value); + +/** + * @brief Get monotonic counter value + * + * @param[in] flash Flash context which rpmc options will be used + * @param[in] keyfile Location of 32-byte key to use + * @param[in] key_data 4-bytes of data to use as key data + * @param[in] counter_address Address of counter (starts at 0) + * @param[out] counter_value Pointer to write the counter value to + * + * @return The result of the operation + */ +enum rpmc_result rpmc_get_monotonic_counter(struct flashrom_flashctx *flash, + const char *keyfile, + uint32_t key_data, + unsigned int counter_address, + uint32_t *counter_value); + +/** + * @brief Read the full JESD260 extended status register + * + * @param[in] flash Flash context which rpmc options will be used + * @param[out] status Status register to write data into + * + * @return The result of the operation + */ +enum rpmc_result rpmc_read_data(struct flashrom_flashctx *flash, + struct rpmc_status_register *status); + +/** + * @brief Get a string description for rpmc result + * + * @param[in] value A rpmc result + * + * @return String description + */ +const char * rpmc_describe_result(enum rpmc_result value); + +/** @} */ /* end flashrom-rpmc */ + +#endif /* !__RPMC_H__ */ diff --git a/meson.build b/meson.build index 26d96d9..6c8d3d3 100644 --- a/meson.build +++ b/meson.build @@ -164,6 +164,7 @@ libusb1 = dependency('libusb-1.0', required : group_usb) libftdi1 = dependency('libftdi1', required : group_ftdi) libjaylink = dependency('libjaylink', required : group_jlink, version : '>=0.3.0') +libcrypto = dependency('libcrypto', required : get_option('rpmc'), version : '>=3.0.0') # ECAM is supported in libpci after 3.13.0 if libpci.version().version_compare('>=3.13.0') @@ -172,6 +173,13 @@ add_project_arguments('-DCONFIG_USE_LIBPCI_ECAM=0', language: 'c') endif +# Support additional rpmc commands if libcrypto is installed +if (get_option('rpmc').auto() or get_option('rpmc').enabled()) and libcrypto.found() + add_project_arguments('-DCONFIG_RPMC_ENABLED=1', language : 'c') + srcs += 'rpmc.c' + deps += libcrypto +endif + if host_machine.system() == 'windows' # Specifying an include_path that doesn't exist is an error, # but we only use this if the library is found in the same directory. diff --git a/meson_options.txt b/meson_options.txt index 6df95ba..87456a9 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -24,3 +24,4 @@ option('delay_minimum_sleep_us', type : 'integer', min : 0, value : 100, description : 'Minimum time in microseconds to suspend execution for (rather than polling) when a delay is required.' + ' Larger values may perform better on machines with low timer resolution, at the cost of increased power.') +option('rpmc', type : 'feature', value : 'auto', description : 'Support for Replay Protected Monotonic Counter (RPMC) commands as specified by JESD260') diff --git a/rpmc.c b/rpmc.c new file mode 100644 index 0000000..72b0f2f --- /dev/null +++ b/rpmc.c @@ -0,0 +1,495 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2024 Matti Finder + * (written by Matti Finder <matti.finder(a)gmail.com>) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "rpmc.h" +#include "flash.h" +#include <stdint.h> +#include <stddef.h> +#include <unistd.h> +#include <openssl/hmac.h> +#include <openssl/evp.h> +#include <openssl/rand.h> +#include <string.h> + +// OP1 commands +#define RPMC_WRITE_ROOT_KEY_MSG_LENGTH (RPMC_OP1_MSG_HEADER_LENGTH + RPMC_HMAC_KEY_LENGTH + RPMC_TRUNCATED_SIG_LENGTH) +#define RPMC_UPDATE_HMAC_KEY_MSG_LENGTH (RPMC_OP1_MSG_HEADER_LENGTH + RPMC_KEY_DATA_LENGTH + RPMC_SIGNATURE_LENGTH) +#define RPMC_INCREMENT_MONOTONIC_COUNTER_MSG_LENGTH (RPMC_OP1_MSG_HEADER_LENGTH + RPMC_COUNTER_LENGTH + RPMC_SIGNATURE_LENGTH) +#define RPMC_GET_MONOTONIC_COUNTER_MSG_LENGTH (RPMC_OP1_MSG_HEADER_LENGTH + RPMC_TAG_LENGTH + RPMC_SIGNATURE_LENGTH) + +// OP2 commands +#define RPMC_READ_DATA_MSG_LENGTH 2 +#define RPMC_READ_DATA_ANSWER_LENGTH (1 + RPMC_TAG_LENGTH + RPMC_COUNTER_LENGTH + RPMC_SIGNATURE_LENGTH) + +static enum rpmc_result rpmc_get_extended_status(struct flashrom_flashctx *flash, uint8_t *status) +{ + const unsigned char extended_status_msg[RPMC_READ_DATA_MSG_LENGTH] = { + flash->chip->rpmc_ctx.op2_opcode, + 0 // dummy + }; + + if (spi_send_command(flash, RPMC_READ_DATA_MSG_LENGTH, 1, extended_status_msg, status)) { + msg_gerr("Reading extended status failed\n"); + return RPMC_ERROR_SPI_TRANSMISSION; + } + + return RPMC_SUCCESS; +} + +static enum rpmc_result rpmc_get_extended_status_long(struct flashrom_flashctx *flash, + struct rpmc_status_register *status, + // optional to check values tag and signature against + const unsigned char *const tag, + const unsigned char *const key) +{ + const unsigned int tag_offset = 1; + const unsigned int counter_data_offset = tag_offset + RPMC_TAG_LENGTH; + const unsigned int signature_offset = counter_data_offset + RPMC_COUNTER_LENGTH; + const unsigned char cmd[RPMC_READ_DATA_MSG_LENGTH] = { + flash->chip->rpmc_ctx.op2_opcode, + 0 // dummy + }; + unsigned char answer[RPMC_READ_DATA_ANSWER_LENGTH]; + + if (spi_send_command(flash, RPMC_READ_DATA_MSG_LENGTH, RPMC_READ_DATA_ANSWER_LENGTH, cmd, answer)) { + msg_gerr("reading extended status failed\n"); + return RPMC_ERROR_SPI_TRANSMISSION; + } + + status->status = answer[0]; + + memcpy(status->tag, answer + tag_offset, RPMC_TAG_LENGTH); + + status->counter_data = answer[counter_data_offset]; + status->counter_data = (status->counter_data << 8) | answer[counter_data_offset + 1]; + status->counter_data = (status->counter_data << 8) | answer[counter_data_offset + 2]; + status->counter_data = (status->counter_data << 8) | answer[counter_data_offset + 3]; + + memcpy(status->signature, answer + signature_offset, RPMC_SIGNATURE_LENGTH); + + if (tag != NULL) { + if (memcmp(tag, status->tag, RPMC_TAG_LENGTH) != 0) { + msg_gwarn("Tag doesn't match counter might be false\n"); + return RPMC_ERROR_TAG_MISMATCH; + } + } + + if (key != NULL) { + unsigned char signature_buffer[RPMC_SIGNATURE_LENGTH]; + if (HMAC(EVP_sha256(), + key, RPMC_HMAC_KEY_LENGTH, + answer + tag_offset, RPMC_TAG_LENGTH + RPMC_COUNTER_LENGTH, + signature_buffer, NULL) == NULL) { + msg_gerr("Could not generate signature\n"); + return RPMC_ERROR_OPENSSL; + } + + if (memcmp(signature_buffer, status->signature, RPMC_SIGNATURE_LENGTH) != 0) { + msg_gwarn("Signature doesn't match, counter might be false\n"); + return RPMC_ERROR_SIGNATURE_MISMATCH; + } + } + + return RPMC_SUCCESS; +} + +static enum rpmc_result rpmc_poll_until_finished(struct flashrom_flashctx *flash) +{ + unsigned char poll_response; + + do { + const unsigned char status_poll_msg = 0x05; + + // since we aren't really a time critical application we just sleep for the longest time + programmer_delay(flash, flash->chip->rpmc_ctx.polling_long_delay_write_counter_us); + + switch (flash->chip->rpmc_ctx.busy_polling_method) { + case POLL_READ_STATUS: + if (spi_send_command(flash, 1, 1, &status_poll_msg, &poll_response)) { + msg_gerr("Polling Status-Register-1 failed\n"); + return RPMC_ERROR_SPI_TRANSMISSION; + } + break; + case POLL_OP2_EXTENDED_STATUS: + { + enum rpmc_result res = rpmc_get_extended_status(flash, &poll_response); + if (res != RPMC_SUCCESS) + return res; + break; + } + default: + msg_gerr("Unknown busy polling method found, this should not happen. Exiting...\n"); + return RPMC_ERROR_INTERNAL; + } + } while ((poll_response & 1) != 0); + + return RPMC_SUCCESS; +} + +static enum rpmc_result rpmc_calculate_hmac_key_register(const char *const keyfile, + const uint32_t key_data, + unsigned char *const hmac_key_register) +{ + unsigned char key[RPMC_HMAC_KEY_LENGTH]; + unsigned char key_data_buf[RPMC_KEY_DATA_LENGTH] = { + (key_data >> 24) & 0xff, + (key_data >> 16) & 0xff, + (key_data >> 8) & 0xff, + key_data & 0xff + }; + + if (keyfile == NULL || read_buf_from_file(key, RPMC_HMAC_KEY_LENGTH, keyfile) != 0) + return RPMC_ERROR_KEY_READ; + + if (HMAC(EVP_sha256(), + key, RPMC_HMAC_KEY_LENGTH, + key_data_buf, RPMC_KEY_DATA_LENGTH, + hmac_key_register, NULL) == NULL) { + msg_gerr("Could not calculate HMAC signature for hmac storage\n"); + return RPMC_ERROR_OPENSSL; + } + + return RPMC_SUCCESS; +} + +static enum rpmc_result rpmc_basic_checks(struct flashrom_flashctx *flash, const unsigned int counter_address) +{ + if ((flash->chip->feature_bits & FEATURE_FLASH_HARDENING) == 0) { + msg_gerr("Flash hardening is not supported on this chip, aborting.\n"); + return RPMC_ERROR_HARDENING_UNSUPPORTED; + } + + if (counter_address >= flash->chip->rpmc_ctx.num_counters) { + msg_gerr("Counter address is not in range, should be between 0 and %d.\n", + flash->chip->rpmc_ctx.num_counters - 1); + return RPMC_ERROR_COUNTER_OUT_OF_RANGE; + } + + return RPMC_SUCCESS; +} + +static enum rpmc_result rpmc_send_and_wait(struct flashrom_flashctx *flash, + const unsigned char *const msg, + const size_t length) +{ + if (spi_send_command(flash, length, 0, msg, NULL)) + return RPMC_ERROR_SPI_TRANSMISSION; + + // check operation status + return rpmc_poll_until_finished(flash); +} + +static enum rpmc_result rpmc_sign_send_wait_check(struct flashrom_flashctx *flash, + unsigned char *const msg, + const size_t msg_length, + const size_t signature_offset, + const char *const keyfile, + const uint32_t key_data, + uint8_t *return_status) +{ + unsigned char hmac_key_register[RPMC_HMAC_KEY_LENGTH]; + + enum rpmc_result ret = rpmc_calculate_hmac_key_register(keyfile, key_data, hmac_key_register); + if (ret != RPMC_SUCCESS) + return ret; + + if (HMAC(EVP_sha256(), + hmac_key_register, RPMC_HMAC_KEY_LENGTH, + msg, signature_offset, + msg + signature_offset, NULL) == NULL) { + msg_gerr("Could not generate HMAC signature\n"); + return RPMC_ERROR_OPENSSL; + } + + ret = rpmc_send_and_wait(flash, msg, msg_length); + if (ret != RPMC_SUCCESS) + return ret; + + ret = rpmc_get_extended_status(flash, return_status); + if (ret != RPMC_SUCCESS) + return ret; + + return RPMC_SUCCESS; +} + +enum rpmc_result rpmc_write_root_key(struct flashrom_flashctx *flash, + const char *const keyfile, + const unsigned int counter_address) +{ + const unsigned int key_offset = RPMC_OP1_MSG_HEADER_LENGTH; + const unsigned int signature_offset = key_offset + RPMC_HMAC_KEY_LENGTH; + const unsigned int signature_cutoff = RPMC_SIGNATURE_LENGTH - RPMC_TRUNCATED_SIG_LENGTH; + + unsigned char msg[RPMC_WRITE_ROOT_KEY_MSG_LENGTH] = { + flash->chip->rpmc_ctx.op1_opcode, // Opcode + 0x00, // CmdType + counter_address, // CounterAddr + 0 //Reserved + }; + + enum rpmc_result ret = rpmc_basic_checks(flash, counter_address); + if (ret != RPMC_SUCCESS) + return ret; + + if (keyfile == NULL || read_buf_from_file(msg + key_offset, RPMC_HMAC_KEY_LENGTH, keyfile) != 0) + return RPMC_ERROR_KEY_READ; + + unsigned char signature_buffer[RPMC_SIGNATURE_LENGTH]; + if (HMAC(EVP_sha256(), + msg + key_offset, RPMC_HMAC_KEY_LENGTH, + msg, RPMC_OP1_MSG_HEADER_LENGTH, + signature_buffer, NULL) == NULL) { + msg_gerr("Could not calculate HMAC signature for message\n"); + return RPMC_ERROR_OPENSSL; + } + + // need to truncate the signature a bit + memcpy(msg + signature_offset, signature_buffer + signature_cutoff, RPMC_TRUNCATED_SIG_LENGTH); + + ret = rpmc_send_and_wait(flash, msg, RPMC_WRITE_ROOT_KEY_MSG_LENGTH); + if (ret != RPMC_SUCCESS) + return ret; + + uint8_t status; + ret = rpmc_get_extended_status(flash, &status); + if (ret != RPMC_SUCCESS) + return ret; + + if (status & (1 << 1)) { + return RPMC_ERROR_ROOT_KEY_OVERWRITE; + } else if (status != 0x80) { + // Incorrect payload size received or we have an unexpected bit set + // This should not happen, if we wrote the code correctly + return RPMC_ERROR_INTERNAL; + } + + return RPMC_SUCCESS; +} + +enum rpmc_result rpmc_update_hmac_key(struct flashrom_flashctx *flash, + const char *const keyfile, + const uint32_t key_data, + const unsigned int counter_address) +{ + const unsigned int signature_offset = RPMC_OP1_MSG_HEADER_LENGTH + RPMC_KEY_DATA_LENGTH; + unsigned char msg[RPMC_UPDATE_HMAC_KEY_MSG_LENGTH] = { + flash->chip->rpmc_ctx.op1_opcode, // Opcode + 0x01, // CmdType + counter_address, // CounterAddr + 0, // Reserved + (key_data >> 24) & 0xff, + (key_data >> 16) & 0xff, + (key_data >> 8) & 0xff, + key_data & 0xff + }; + + enum rpmc_result ret = rpmc_basic_checks(flash, counter_address); + if (ret != RPMC_SUCCESS) + return ret; + + uint8_t status; + ret = rpmc_sign_send_wait_check(flash, + msg, + RPMC_UPDATE_HMAC_KEY_MSG_LENGTH, + signature_offset, + keyfile, + key_data, + &status); + if (ret != RPMC_SUCCESS) + return ret; + + if (status & (1 << 1)) { + return RPMC_ERROR_COUNTER_UNINITIALIZED; + } else if (status & (1 << 2)) { + // Counter address out of range or incorrect payload size received + // also possible but we check those in the code + return RPMC_ERROR_WRONG_SIGNATURE; + } else if (status != 0x80) { + // Unexpected bit is set + // This should not happen, if we wrote the code correctly + return RPMC_ERROR_INTERNAL; + } + + return RPMC_SUCCESS; +} + +enum rpmc_result rpmc_increment_counter(struct flashrom_flashctx *flash, + const char *const keyfile, + const uint32_t key_data, + const unsigned int counter_address, + const uint32_t previous_value) +{ + const unsigned int signature_offset = RPMC_OP1_MSG_HEADER_LENGTH + RPMC_COUNTER_LENGTH; + unsigned char msg[RPMC_INCREMENT_MONOTONIC_COUNTER_MSG_LENGTH] = { + flash->chip->rpmc_ctx.op1_opcode, // Opcode + 0x02, // CmdType + counter_address, // CounterAddr + 0, // Reserved + (previous_value >> 24) & 0xff, + (previous_value >> 16) & 0xff, + (previous_value >> 8) & 0xff, + previous_value & 0xff + }; + + enum rpmc_result ret = rpmc_basic_checks(flash, counter_address); + if (ret != RPMC_SUCCESS) + return ret; + + uint8_t status; + ret = rpmc_sign_send_wait_check(flash, + msg, + RPMC_INCREMENT_MONOTONIC_COUNTER_MSG_LENGTH, + signature_offset, + keyfile, + key_data, + &status); + if (ret != RPMC_SUCCESS) + return ret; + + if (status & (1 << 4)) { + return RPMC_ERROR_COUNTER_DATA_MISMATCH; + } else if (status & (1 << 3)) { + return RPMC_ERROR_HMAC_KEY_REGISTER_UNINITIALIZED; + } else if (status & (1 << 2)) { + // Counter address out of range or incorrect payload size received + // also possible but we check those in the code + return RPMC_ERROR_WRONG_SIGNATURE; + } else if (status != 0x80) { + // Unexpected bit is set + // This should not happen, if we wrote the code correctly + return RPMC_ERROR_INTERNAL; + } + + return RPMC_SUCCESS; +} + +enum rpmc_result rpmc_get_monotonic_counter(struct flashrom_flashctx *flash, + const char *const keyfile, + const uint32_t key_data, + const unsigned int counter_address, + uint32_t *const counter_value) +{ + unsigned char hmac_key_register[RPMC_HMAC_KEY_LENGTH]; + const unsigned int tag_offset = RPMC_OP1_MSG_HEADER_LENGTH; + const unsigned int signature_offset = tag_offset + RPMC_TAG_LENGTH; + unsigned char msg[RPMC_GET_MONOTONIC_COUNTER_MSG_LENGTH] = { + flash->chip->rpmc_ctx.op1_opcode, // Opcode + 0x03, // CmdType + counter_address, // CounterAddr + 0, // Reserved + }; + + enum rpmc_result ret = rpmc_basic_checks(flash, counter_address); + if (ret != RPMC_SUCCESS) + return ret; + + if (RAND_bytes(msg + tag_offset, RPMC_TAG_LENGTH) != 1) { + msg_gerr("Could not generate random tag.\n"); + return RPMC_ERROR_OPENSSL; + } + + msg_gdbg("Random tag is:"); + for (size_t i = 0; i < RPMC_TAG_LENGTH; i++) { + msg_gdbg(" 0x%02x", msg[tag_offset + i]); + } + msg_gdbg("\n"); + + ret = rpmc_calculate_hmac_key_register(keyfile, key_data, hmac_key_register); + if (ret != RPMC_SUCCESS) + return ret; + + if (HMAC(EVP_sha256(), + hmac_key_register, RPMC_HMAC_KEY_LENGTH, + msg, signature_offset, + msg + signature_offset, NULL) == NULL) { + msg_gerr("Could not generate HMAC signature\n"); + return RPMC_ERROR_OPENSSL; + } + + ret = rpmc_send_and_wait(flash, msg, RPMC_GET_MONOTONIC_COUNTER_MSG_LENGTH); + if (ret != RPMC_SUCCESS) + return ret; + + struct rpmc_status_register status; + ret = rpmc_get_extended_status_long(flash, &status, msg + tag_offset, hmac_key_register); + if (!(ret == RPMC_ERROR_TAG_MISMATCH || ret == RPMC_ERROR_SIGNATURE_MISMATCH || ret == RPMC_SUCCESS)) + return ret; + + if (status.status & (1 << 3)) { + return RPMC_ERROR_HMAC_KEY_REGISTER_UNINITIALIZED; + } else if (status.status & (1 << 2)) { + // Counter address out of range or incorrect payload size received + // also possible but we check those in the code + return RPMC_ERROR_WRONG_SIGNATURE; + } else if (status.status != 0x80) { + // Unexpected bit is set + // This should not happen, if we wrote the code correctly + return RPMC_ERROR_INTERNAL; + } + + *counter_value = status.counter_data; + return ret; +} + +enum rpmc_result rpmc_read_data(struct flashrom_flashctx *flash, struct rpmc_status_register *status) +{ + // hack around not having a counter address + enum rpmc_result ret = rpmc_basic_checks(flash, 0); + if (ret != RPMC_SUCCESS) + return ret; + + ret = rpmc_get_extended_status_long(flash, status, NULL, NULL); + if (ret != RPMC_SUCCESS) + return ret; + + return RPMC_SUCCESS; +} + +const char *rpmc_describe_result(const enum rpmc_result value) +{ + switch (value) { + case RPMC_SUCCESS: + return "Success\n"; + case RPMC_ERROR_SPI_TRANSMISSION: + return "Error: Sending spi command failed\n"; + case RPMC_ERROR_OPENSSL: + return "Error: Failure while calling into openssl\n"; + case RPMC_ERROR_TAG_MISMATCH: + return "Error: The recieved tag doesn't match the one that was sent\n"; + case RPMC_ERROR_SIGNATURE_MISMATCH: + return "Error: The recieved signature doesn't match the expected one\n"; + case RPMC_ERROR_INTERNAL: + return "Internal error: Unexpected state reached, please inform the maintainers\n"; + case RPMC_ERROR_KEY_READ: + return "Error: Failed to read the key from keyfile\n"; + case RPMC_ERROR_HARDENING_UNSUPPORTED: + return "Error: RPMC commands are not supported on this device\n"; + case RPMC_ERROR_COUNTER_OUT_OF_RANGE: + return "Error: Given counter address not in range for this device\n"; + case RPMC_ERROR_ROOT_KEY_OVERWRITE: + return "Error: Root key for this counter address can't be overwritten\n"; + case RPMC_ERROR_COUNTER_UNINITIALIZED: + return "Error: Root key for this counter is not initialized\n"; + case RPMC_ERROR_COUNTER_DATA_MISMATCH: + return "Error: Previous value of this counter is not correct\n"; + case RPMC_ERROR_HMAC_KEY_REGISTER_UNINITIALIZED: + return "Error: Hmac key register is not initialized\n"; + case RPMC_ERROR_WRONG_SIGNATURE: + return "Error: The signature doesn't match (root key or key data is wrong)\n"; + default: + return "Unknown internal error: Error code not recognised\n"; + } +} diff --git a/sfdp.c b/sfdp.c index 8683779..df05d97 100644 --- a/sfdp.c +++ b/sfdp.c @@ -252,6 +252,88 @@ return 0; } +static unsigned int bits_to_counter_delay(const uint8_t bits) +{ + unsigned int value = bits & 0xf; + + switch ((bits & (0b11 << 4)) >> 4) { + case 0b00: + value *= 1; + break; + case 0b01: + value *= 16; + break; + case 0b10: + value *= 128; + break; + case 0b11: + value *= 1000; + break; + } + + return value; +} + +static int parse_rpmc_parameter_table(struct flashchip *const chip, const uint8_t *const buf, const uint16_t len) +{ + if (len != 2 * 4) { + msg_cdbg("Length of RPMC parameter table is wrong, skipping it\n"); + return 1; + } + + msg_cdbg("Parsing rpmc parameter table...\n"); + + // first dword + uint32_t first_dword = ((unsigned int)buf[(4 * 0) + 0]); + first_dword |= ((unsigned int)buf[(4 * 0) + 1]) << 8; + first_dword |= ((unsigned int)buf[(4 * 0) + 2]) << 16; + first_dword |= ((unsigned int)buf[(4 * 0) + 3]) << 24; + + if ((first_dword & 0b1) != 0) { + // flash hardening is not supported + msg_cdbg("Flash Hardening not supported\n"); + goto done; + } + + chip->feature_bits |= FEATURE_FLASH_HARDENING; + + chip->rpmc_ctx.busy_polling_method = (first_dword & (1 << 2)) >> 2; + msg_cspew("Busy polling method: %u\n", chip->rpmc_ctx.busy_polling_method); + + chip->rpmc_ctx.num_counters = ((first_dword & (0xf << 4)) >> 4) + 1; + msg_cspew("Number of counters: %u\n", chip->rpmc_ctx.num_counters); + + chip->rpmc_ctx.op1_opcode = (first_dword & (0xff << 8)) >> 8; + msg_cspew("OP1 opcode: 0x%02x\n", chip->rpmc_ctx.op1_opcode); + + chip->rpmc_ctx.op2_opcode = (first_dword & (0xff << 16)) >> 16; + msg_cspew("OP2 opcode: 0x%02x\n", chip->rpmc_ctx.op2_opcode); + + chip->rpmc_ctx.update_rate = 5 * (1 << ((first_dword & (0xf << 24)) >> 24)); + msg_cspew("Update rate: %u seconds\n", chip->rpmc_ctx.update_rate); + + // second dword + uint32_t second_dword = ((unsigned int)buf[(4 * 1) + 0]); + second_dword |= ((unsigned int)buf[(4 * 1) + 1]) << 8; + second_dword |= ((unsigned int)buf[(4 * 1) + 2]) << 16; + second_dword |= ((unsigned int)buf[(4 * 1) + 3]) << 24; + + chip->rpmc_ctx.polling_delay_read_counter_us = bits_to_counter_delay(second_dword & 0xf); + msg_cspew("Read counter polling delay: %u us\n", chip->rpmc_ctx.polling_delay_read_counter_us); + + chip->rpmc_ctx.polling_short_delay_write_counter_us = bits_to_counter_delay((second_dword >> 8) & 0xf); + msg_cspew("Write counter short polling delay: %u us\n", + chip->rpmc_ctx.polling_short_delay_write_counter_us); + + chip->rpmc_ctx.polling_long_delay_write_counter_us = bits_to_counter_delay((second_dword >> 16) & 0xf) * 1000; + msg_cspew("Write counter long polling delay: %u us\n", + chip->rpmc_ctx.polling_long_delay_write_counter_us); + +done: + msg_cdbg("done.\n"); + return 0; +} + int probe_spi_sfdp(struct flashctx *flash) { int ret = 0; @@ -359,23 +441,44 @@ } msg_cspew("\n"); - if (i == 0) { /* Mandatory JEDEC SFDP parameter table */ - if (hdrs[i].id != 0) - msg_cdbg("ID of the mandatory JEDEC SFDP " - "parameter table is not 0 as demanded " - "by JESD216 (warning only).\n"); - - if (hdrs[i].v_major != 0x01) { + if (i == 0) { + if (hdrs[i].id != 0) { + msg_cerr("ID of the mandatory JEDEC SFDP " + "parameter table is not 0 as demanded " + "by JESD216.\n"); + } else if (hdrs[i].v_major != 0x01) { msg_cdbg("The chip contains an unknown " - "version of the JEDEC flash " - "parameters table, skipping it.\n"); + "version of the JEDEC flash " + "parameters table (Version: %u.%u), skipping it.\n", + hdrs[i].v_major, hdrs[i].v_minor); } else if (len != 4 * 4 && len < 9 * 4) { msg_cdbg("Length of the mandatory JEDEC SFDP " "parameter table is wrong (%d B), " "skipping it.\n", len); - } else if (sfdp_fill_flash(flash->chip, tbuf, len) == 0) + } else if (sfdp_fill_flash(flash->chip, tbuf, len) == 0) { ret = 1; + } + } else { + /* TODO: implement parsing for other pages */ + switch (hdrs[i].id){ + case 0x03: /* RPMC parameter table as specified in JESD260 */ + if (hdrs[i].v_major != 0x01 || hdrs[i].v_minor != 0x0) { + msg_cdbg("The chip contains an unknown " + "version of the JEDEC RPMC " + "parameters table (Version: %u.%u), skipping it.\n", + hdrs[i].v_major, hdrs[i].v_minor); + } else { + parse_rpmc_parameter_table(flash->chip, tbuf, len); + } + break; + default: + msg_cdbg("Support for SFDP Page with ID 0x%02x not implemented" + ", skipping it.\n", + hdrs[i].id); + break; + } } + free(tbuf); } -- To view, visit https://review.coreboot.org/c/flashrom/+/84934?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I6ab3d0446e9fd674b20550fdbfaf499b8d4a9b38 Gerrit-Change-Number: 84934 Gerrit-PatchSet: 10 Gerrit-Owner: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in flashrom[main]: flashchips: Skip "WP untested" message for SFDP-capable chip
by Anastasia Klimchuk (Code Review) 10 Nov '24

10 Nov '24

Attention is currently required from: Matti Finder, Nikolai Artemiev, Sergii Dmytruk, Stefan Reinauer. Anastasia Klimchuk has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/85075?usp=email ) Change subject: flashchips: Skip "WP untested" message for SFDP-capable chip ...................................................................... Patch Set 3: (2 comments) Patchset: PS2: > I wonder if `chip->tested. […] 1) Ignored in the meaning, not showing the message "flash has status untested for WP"? 2) Or ignored in the meaning, if it's set to OK, don't believe it because it can't be? I think the first one, the message still useful: people see it and sometimes wonder and sometimes add support for WP. Apart from the very edge cases, like "generic" chip entries, I would keep the message (for now... but things can change). The second option: I don't think there are such entries in flashchips at the moment. It has always been that the contributor who adds support also marks as tested. Commit Message: https://review.coreboot.org/c/flashrom/+/85075/comment/958ec65c_daeea200?us… : PS2, Line 12: SDFP chip and what would you report? > `SFDP` Thank you! And I found the same typo in the commit message of the next patch too! -- To view, visit https://review.coreboot.org/c/flashrom/+/85075?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I7e945389895a8042df3aaae72bccf73405be8651 Gerrit-Change-Number: 85075 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Matti Finder <matti.finder(a)gmail.com> Gerrit-Comment-Date: Sun, 10 Nov 2024 23:44:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>

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[S] Change in flashrom[main]: sfdp: Update the message shown when SFDP-capable chip is detected
by Anastasia Klimchuk (Code Review) 10 Nov '24

10 Nov '24

Attention is currently required from: Anastasia Klimchuk, Matti Finder. Hello Matti Finder, Peter Marheine, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/85092?usp=email to look at the new patch set (#3). Change subject: sfdp: Update the message shown when SFDP-capable chip is detected ...................................................................... sfdp: Update the message shown when SFDP-capable chip is detected Testing: flashrom -p dummy:emulate=MX25L6436 -c "SFDP-capable chip" Change-Id: If1a480ae78f158cc4626e345149ea9025443f8a7 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> --- M flashrom.c 1 file changed, 7 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/92/85092/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/85092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: If1a480ae78f158cc4626e345149ea9025443f8a7 Gerrit-Change-Number: 85092 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Matti Finder <matti.finder(a)gmail.com>

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[XS] Change in flashrom[main]: flashchips: Skip "WP untested" message for SFDP-capable chip
by Anastasia Klimchuk (Code Review) 10 Nov '24

10 Nov '24

Attention is currently required from: Anastasia Klimchuk, Matti Finder, Nikolai Artemiev, Stefan Reinauer. Hello Matti Finder, Nikolai Artemiev, Sergii Dmytruk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/85075?usp=email to look at the new patch set (#3). Change subject: flashchips: Skip "WP untested" message for SFDP-capable chip ...................................................................... flashchips: Skip "WP untested" message for SFDP-capable chip This entry in the flashchips represent a "SFDP-capable chip" and it doesn't make sense to show the message "WP operation has status untested, please report this". The entry can cover any generic SFDP chip and what would you report? Secondly, the entry "SFDP-capable chip" does not currently support WP operations anyway. Going further, we will be working with SFDP way more, so this area needs to be gradually upgraded. Testing: flashrom -p dummy:emulate=MX25L6436 -c "SFDP-capable chip" -r dump.rom Change-Id: I7e945389895a8042df3aaae72bccf73405be8651 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> --- M flashchips.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/85075/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/85075?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I7e945389895a8042df3aaae72bccf73405be8651 Gerrit-Change-Number: 85075 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Matti Finder <matti.finder(a)gmail.com>

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[XS] Change in flashrom[main]: flashchips: Skip "WP untested" message for SFDP-capable chip
by Sergii Dmytruk (Code Review) 10 Nov '24

10 Nov '24

Attention is currently required from: Anastasia Klimchuk, Matti Finder, Nikolai Artemiev, Stefan Reinauer. Sergii Dmytruk has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/85075?usp=email ) Change subject: flashchips: Skip "WP untested" message for SFDP-capable chip ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: > The comment just above the line with tested status indicates that the idea always was to mark everyt […] I wonder if `chip->tested.wp` should be ignored for chips with `chip->decode_range == NO_DECODE_RANGE_FUNC`. Commit Message: https://review.coreboot.org/c/flashrom/+/85075/comment/085cc690_1a43cab9?us… : PS2, Line 12: SDFP chip and what would you report? `SFDP` -- To view, visit https://review.coreboot.org/c/flashrom/+/85075?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I7e945389895a8042df3aaae72bccf73405be8651 Gerrit-Change-Number: 85075 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Matti Finder <matti.finder(a)gmail.com> Gerrit-Comment-Date: Sun, 10 Nov 2024 22:29:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>

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