Attention is currently required from: Felix Singer, Thomas Heijligen, Edward O'Callaghan.
Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/66343 )
Change subject: cli_classic: refactor arguments parsing into separate func
......................................................................
Patch Set 8:
(1 comment)
Patchset:
PS8:
The patch is ready for your review :)
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Gerrit-Change-Number: 66343
Gerrit-PatchSet: 8
Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net>
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Attention is currently required from: Felix Singer, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk.
Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73039 )
Change subject: flashrom: rewrite flashbuses_to_text()
......................................................................
Patch Set 6:
(1 comment)
File flashrom.c:
https://review.coreboot.org/c/flashrom/+/73039/comment/7f242791_a8db8939
PS5, Line 948: if (bustype & (1 << i))
> Oh that my question was a silly one, sorry. […]
Came back with fresh ideas, I see that it's possible to use a struct:
```
struct bus_type_info {
enum chipbustype type;
const char *name;
};
static const struct bus_type_info bustypes[] = {
{ BUS_PARALLEL, "Parallel, " },
{ BUS_LPC, "LPC, " },
{ BUS_FWH, "FWH, " },
{ BUS_SPI, "SPI, " },
{ BUS_PROG, "Programmer-specific, " },
};
```
And then:
```
for (unsigned int i = 0; i < ARRAY_SIZE(bustypes); i++)
{
if (bustype & bustypes[i].type) {
...
}
}
```
Looks like it resolves the problem that you mentioned. Do you think that's an appropriate implementation?
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Attention is currently required from: Stefan Reinauer, Anastasia Klimchuk, Alexander Goncharov.
Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/74216 )
Change subject: [WAIT FOR CB:73822]doc: Convert README to sphinx
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
the README can stay in the top level directory. The index page (first page in sphinx) include this (see doc/index.rst). You can add an .rst suffix to make it clear which formating is used.
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Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/74165 )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: tree/: Case write_granularity enum values
......................................................................
tree/: Case write_granularity enum values
Change-Id: Ic8c655225abe477c1b618dc685b743e691c16ebd
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/74165
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M at45db.c
M flashchips.c
M flashrom.c
M include/flash.h
M nicintel_eeprom.c
5 files changed, 54 insertions(+), 41 deletions(-)
Approvals:
build bot (Jenkins): Verified
Angel Pons: Looks good to me, approved
diff --git a/at45db.c b/at45db.c
index 7877330..6d66a6e 100644
--- a/at45db.c
+++ b/at45db.c
@@ -200,12 +200,12 @@
}
switch (chip->page_size) {
- case 256: chip->gran = write_gran_256bytes; break;
- case 264: chip->gran = write_gran_264bytes; break;
- case 512: chip->gran = write_gran_512bytes; break;
- case 528: chip->gran = write_gran_528bytes; break;
- case 1024: chip->gran = write_gran_1024bytes; break;
- case 1056: chip->gran = write_gran_1056bytes; break;
+ case 256: chip->gran = WRITE_GRAN_256BYTES; break;
+ case 264: chip->gran = WRITE_GRAN_264BYTES; break;
+ case 512: chip->gran = WRITE_GRAN_512BYTES; break;
+ case 528: chip->gran = WRITE_GRAN_528BYTES; break;
+ case 1024: chip->gran = WRITE_GRAN_1024BYTES; break;
+ case 1056: chip->gran = WRITE_GRAN_1056BYTES; break;
default:
msg_cerr("%s: unknown page size %d.\n", __func__, chip->page_size);
return 0;
diff --git a/flashchips.c b/flashchips.c
index dc6e882..6a5cf49 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -2762,7 +2762,7 @@
.write = SPI_WRITE_AT45DB,
.read = SPI_READ_AT45DB,
.voltage = {2700, 3600},
- .gran = write_gran_1056bytes,
+ .gran = WRITE_GRAN_1056BYTES,
},
{
@@ -3015,7 +3015,7 @@
.write = SPI_WRITE_AT45DB,
.read = SPI_READ_AT45DB_E8, /* 3 address and 4 dummy bytes */
.voltage = {2700, 3600},
- .gran = write_gran_528bytes,
+ .gran = WRITE_GRAN_528BYTES,
},
{
@@ -3638,7 +3638,7 @@
.write = EDI_CHIP_WRITE,
.read = EDI_CHIP_READ,
.voltage = {2700, 3600},
- .gran = write_gran_128bytes,
+ .gran = WRITE_GRAN_128BYTES,
},
{
diff --git a/flashrom.c b/flashrom.c
index 01c78fd..3e6e0fb 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -719,42 +719,42 @@
unsigned int i;
switch (gran) {
- case write_gran_1bit:
+ case WRITE_GRAN_1BIT:
for (i = 0; i < len; i++)
if ((have[i] & want[i]) != want[i]) {
result = 1;
break;
}
break;
- case write_gran_1byte:
+ case WRITE_GRAN_1BYTE:
for (i = 0; i < len; i++)
if ((have[i] != want[i]) && (have[i] != erased_value)) {
result = 1;
break;
}
break;
- case write_gran_128bytes:
+ case WRITE_GRAN_128BYTES:
result = need_erase_gran_bytes(have, want, len, 128, erased_value);
break;
- case write_gran_256bytes:
+ case WRITE_GRAN_256BYTES:
result = need_erase_gran_bytes(have, want, len, 256, erased_value);
break;
- case write_gran_264bytes:
+ case WRITE_GRAN_264BYTES:
result = need_erase_gran_bytes(have, want, len, 264, erased_value);
break;
- case write_gran_512bytes:
+ case WRITE_GRAN_512BYTES:
result = need_erase_gran_bytes(have, want, len, 512, erased_value);
break;
- case write_gran_528bytes:
+ case WRITE_GRAN_528BYTES:
result = need_erase_gran_bytes(have, want, len, 528, erased_value);
break;
- case write_gran_1024bytes:
+ case WRITE_GRAN_1024BYTES:
result = need_erase_gran_bytes(have, want, len, 1024, erased_value);
break;
- case write_gran_1056bytes:
+ case WRITE_GRAN_1056BYTES:
result = need_erase_gran_bytes(have, want, len, 1056, erased_value);
break;
- case write_gran_1byte_implicit_erase:
+ case WRITE_GRAN_1BYTE_IMPLICIT_ERASE:
/* Do not erase, handle content changes from anything->0xff by writing 0xff. */
result = 0;
break;
@@ -797,30 +797,30 @@
unsigned int i, limit, stride;
switch (gran) {
- case write_gran_1bit:
- case write_gran_1byte:
- case write_gran_1byte_implicit_erase:
+ case WRITE_GRAN_1BIT:
+ case WRITE_GRAN_1BYTE:
+ case WRITE_GRAN_1BYTE_IMPLICIT_ERASE:
stride = 1;
break;
- case write_gran_128bytes:
+ case WRITE_GRAN_128BYTES:
stride = 128;
break;
- case write_gran_256bytes:
+ case WRITE_GRAN_256BYTES:
stride = 256;
break;
- case write_gran_264bytes:
+ case WRITE_GRAN_264BYTES:
stride = 264;
break;
- case write_gran_512bytes:
+ case WRITE_GRAN_512BYTES:
stride = 512;
break;
- case write_gran_528bytes:
+ case WRITE_GRAN_528BYTES:
stride = 528;
break;
- case write_gran_1024bytes:
+ case WRITE_GRAN_1024BYTES:
stride = 1024;
break;
- case write_gran_1056bytes:
+ case WRITE_GRAN_1056BYTES:
stride = 1056;
break;
default:
diff --git a/include/flash.h b/include/flash.h
index f0357cb..3e9c885 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -83,17 +83,17 @@
*/
enum write_granularity {
/* We assume 256 byte granularity by default. */
- write_gran_256bytes = 0,/* If less than 256 bytes are written, the unwritten bytes are undefined. */
- write_gran_1bit, /* Each bit can be cleared individually. */
- write_gran_1byte, /* A byte can be written once. Further writes to an already written byte cause
+ WRITE_GRAN_256BYTES = 0,/* If less than 256 bytes are written, the unwritten bytes are undefined. */
+ WRITE_GRAN_1BIT, /* Each bit can be cleared individually. */
+ WRITE_GRAN_1BYTE, /* A byte can be written once. Further writes to an already written byte cause
* its contents to be either undefined or to stay unchanged. */
- write_gran_128bytes, /* If less than 128 bytes are written, the unwritten bytes are undefined. */
- write_gran_264bytes, /* If less than 264 bytes are written, the unwritten bytes are undefined. */
- write_gran_512bytes, /* If less than 512 bytes are written, the unwritten bytes are undefined. */
- write_gran_528bytes, /* If less than 528 bytes are written, the unwritten bytes are undefined. */
- write_gran_1024bytes, /* If less than 1024 bytes are written, the unwritten bytes are undefined. */
- write_gran_1056bytes, /* If less than 1056 bytes are written, the unwritten bytes are undefined. */
- write_gran_1byte_implicit_erase, /* EEPROMs and other chips with implicit erase and 1-byte writes. */
+ WRITE_GRAN_128BYTES, /* If less than 128 bytes are written, the unwritten bytes are undefined. */
+ WRITE_GRAN_264BYTES, /* If less than 264 bytes are written, the unwritten bytes are undefined. */
+ WRITE_GRAN_512BYTES, /* If less than 512 bytes are written, the unwritten bytes are undefined. */
+ WRITE_GRAN_528BYTES, /* If less than 528 bytes are written, the unwritten bytes are undefined. */
+ WRITE_GRAN_1024BYTES, /* If less than 1024 bytes are written, the unwritten bytes are undefined. */
+ WRITE_GRAN_1056BYTES, /* If less than 1056 bytes are written, the unwritten bytes are undefined. */
+ WRITE_GRAN_1BYTE_IMPLICIT_ERASE, /* EEPROMs and other chips with implicit erase and 1-byte writes. */
};
/*
diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c
index 80ccd88..2c351da 100644
--- a/nicintel_eeprom.c
+++ b/nicintel_eeprom.c
@@ -116,7 +116,7 @@
flash->chip->total_size = 4;
flash->chip->page_size = flash->chip->total_size * 1024;
flash->chip->tested = TEST_OK_PREWB;
- flash->chip->gran = write_gran_1byte_implicit_erase;
+ flash->chip->gran = WRITE_GRAN_1BYTE_IMPLICIT_ERASE;
flash->chip->block_erasers->eraseblocks[0].size = flash->chip->page_size;
flash->chip->block_erasers->eraseblocks[0].count = 1;
@@ -147,7 +147,7 @@
flash->chip->page_size = EE_PAGE_MASK + 1;
flash->chip->tested = TEST_OK_PREWB;
- flash->chip->gran = write_gran_1byte_implicit_erase;
+ flash->chip->gran = WRITE_GRAN_1BYTE_IMPLICIT_ERASE;
flash->chip->block_erasers->eraseblocks[0].size = (EE_PAGE_MASK + 1);
flash->chip->block_erasers->eraseblocks[0].count = (flash->chip->total_size * 1024) / (EE_PAGE_MASK + 1);
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ic8c655225abe477c1b618dc685b743e691c16ebd
Gerrit-Change-Number: 74165
Gerrit-PatchSet: 3
Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
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Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/73456 )
Change subject: internal: Move laptop_ok into board_cfg
......................................................................
internal: Move laptop_ok into board_cfg
Due to how internal is structured around chipset_flash_enable()
entry we need to prepare a crafted programmer_cfg that contains
a board_enable substructure with data derived from the board_enable
subsystem. While this is certainly not perfection, it does make
clear the relationships between board_enable into chipset_flash_enable
and subsequently the overall internal programmer initialisation
in a RAII fashion at the type level over closure upon global
state that is impossible to reason about.
Also flip predicate in report_nonwl_laptop_detected() and
return early with the trivial base-case.
TEST=`$ sudo ./flashrom -p internal --flash-name`.
Change-Id: I459215253845c2af73262943ce91a36464e9eb06
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/73456
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Sam McNally <sammc(a)google.com>
---
M board_enable.c
M chipset_enable.c
M flashrom.c
M include/programmer.h
M internal.c
5 files changed, 72 insertions(+), 44 deletions(-)
Approvals:
build bot (Jenkins): Verified
Sam McNally: Looks good to me, approved
diff --git a/board_enable.c b/board_enable.c
index f95430a..d9af44e 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -2293,7 +2293,7 @@
static int p2_whitelist_laptop(struct board_cfg *cfg)
{
cfg->is_laptop = 1;
- g_laptop_ok = true;
+ cfg->laptop_ok = true;
msg_pdbg("Whitelisted laptop detected.\n");
return 0;
}
diff --git a/chipset_enable.c b/chipset_enable.c
index 37a48fc..16ef0f4 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -826,7 +826,7 @@
/* Suppress unknown laptop warning if we booted from SPI. */
if (boot_buses & BUS_SPI)
- g_laptop_ok = true;
+ cfg->bcfg->laptop_ok = true;
return 0;
}
@@ -971,7 +971,7 @@
/* Suppress unknown laptop warning if we booted from SPI. */
if (!ret && (boot_buses & BUS_SPI))
- g_laptop_ok = true;
+ cfg->bcfg->laptop_ok = true;
_freepci_ret:
pci_free_dev(spi_dev);
@@ -1087,7 +1087,7 @@
/* Suppress unknown laptop warning if we booted from SPI. */
if (boot_buses & BUS_SPI)
- g_laptop_ok = true;
+ cfg->bcfg->laptop_ok = true;
return 0;
}
@@ -1676,7 +1676,7 @@
/* Suppress unknown laptop warning if we booted from SPI. */
if (!ret && want_spi)
- g_laptop_ok = true;
+ cfg->bcfg->laptop_ok = true;
return ret;
}
diff --git a/flashrom.c b/flashrom.c
index b135e58..01c78fd 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -65,10 +65,6 @@
*/
static bool may_register_shutdown = false;
-struct programmer_cfg {
- char *params;
-};
-
/* Register a function to be executed on programmer shutdown.
* The advantage over atexit() is that you can supply a void pointer which will
* be used as parameter to the registered function upon programmer shutdown.
diff --git a/include/programmer.h b/include/programmer.h
index 157de2e..5b304f5 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -30,7 +30,11 @@
USB,
OTHER,
};
-struct programmer_cfg;
+struct board_cfg;
+struct programmer_cfg {
+ char *params;
+ struct board_cfg *bcfg;
+};
struct dev_entry {
uint16_t vendor_id;
@@ -162,6 +166,7 @@
struct board_cfg {
int is_laptop;
+ bool laptop_ok;
};
struct board_match {
@@ -267,7 +272,6 @@
#endif
#if CONFIG_INTERNAL == 1
-extern bool g_laptop_ok;
extern bool force_boardmismatch;
void probe_superio(void);
int register_superio(struct superio s);
diff --git a/internal.c b/internal.c
index 1f0e6ee..faeb463 100644
--- a/internal.c
+++ b/internal.c
@@ -27,8 +27,6 @@
#include "hwaccess_x86_io.h"
#endif
-bool g_laptop_ok = false;
-
bool force_boardmismatch = false;
enum chipbustype internal_buses_supported = BUS_NONE;
@@ -107,33 +105,37 @@
return 0;
}
-static void report_nonwl_laptop_detected(int is_laptop, bool laptop_ok)
+static void report_nonwl_laptop_detected(const struct board_cfg *bcfg)
{
- if (is_laptop && !laptop_ok) {
- msg_pinfo("========================================================================\n");
- if (is_laptop == 1) {
- msg_pinfo("You seem to be running flashrom on an unknown laptop. Some\n"
- "internal buses have been disabled for safety reasons.\n\n");
- } else {
- msg_pinfo("You may be running flashrom on an unknown laptop. We could not\n"
- "detect this for sure because your vendor has not set up the SMBIOS\n"
- "tables correctly. Some internal buses have been disabled for\n"
- "safety reasons. You can enforce using all buses by adding\n"
- " -p internal:laptop=this_is_not_a_laptop\n"
- "to the command line, but please read the following warning if you\n"
- "are not sure.\n\n");
- }
- msg_perr("Laptops, notebooks and netbooks are difficult to support and we\n"
- "recommend to use the vendor flashing utility. The embedded controller\n"
- "(EC) in these machines often interacts badly with flashing.\n"
- "See the manpage and https://flashrom.org/Laptops for details.\n\n"
- "If flash is shared with the EC, erase is guaranteed to brick your laptop\n"
- "and write may brick your laptop.\n"
- "Read and probe may irritate your EC and cause fan failure, backlight\n"
- "failure and sudden poweroff.\n"
- "You have been warned.\n"
- "========================================================================\n");
+ const int is_laptop = bcfg->is_laptop;
+ const bool laptop_ok = bcfg->laptop_ok;
+
+ if (!is_laptop || laptop_ok)
+ return;
+
+ msg_pinfo("========================================================================\n");
+ if (is_laptop == 1) {
+ msg_pinfo("You seem to be running flashrom on an unknown laptop. Some\n"
+ "internal buses have been disabled for safety reasons.\n\n");
+ } else {
+ msg_pinfo("You may be running flashrom on an unknown laptop. We could not\n"
+ "detect this for sure because your vendor has not set up the SMBIOS\n"
+ "tables correctly. Some internal buses have been disabled for\n"
+ "safety reasons. You can enforce using all buses by adding\n"
+ " -p internal:laptop=this_is_not_a_laptop\n"
+ "to the command line, but please read the following warning if you\n"
+ "are not sure.\n\n");
}
+ msg_perr("Laptops, notebooks and netbooks are difficult to support and we\n"
+ "recommend to use the vendor flashing utility. The embedded controller\n"
+ "(EC) in these machines often interacts badly with flashing.\n"
+ "See the manpage and https://flashrom.org/Laptops for details.\n\n"
+ "If flash is shared with the EC, erase is guaranteed to brick your laptop\n"
+ "and write may brick your laptop.\n"
+ "Read and probe may irritate your EC and cause fan failure, backlight\n"
+ "failure and sudden poweroff.\n"
+ "You have been warned.\n"
+ "========================================================================\n");
}
static int internal_init(const struct programmer_cfg *cfg)
@@ -157,9 +159,6 @@
if (ret)
return ret;
- /* Unconditionally reset global state from previous operation. */
- g_laptop_ok = false;
-
/* Default to Parallel/LPC/FWH flash devices. If a known host controller
* is found, the host controller init routine sets the
* internal_buses_supported bitfield.
@@ -228,13 +227,15 @@
* this isn't a laptop. Board-enables may override this,
* non-legacy buses (SPI and opaque atm) are probed anyway.
*/
- if (bcfg.is_laptop && !(g_laptop_ok || force_laptop || (not_a_laptop && bcfg.is_laptop == 2)))
+ if (bcfg.is_laptop && !(bcfg.laptop_ok || force_laptop || (not_a_laptop && bcfg.is_laptop == 2)))
internal_buses_supported = BUS_NONE;
/* try to enable it. Failure IS an option, since not all motherboards
* really need this to be done, etc., etc.
*/
- ret = chipset_flash_enable(cfg);
+ struct programmer_cfg icfg = *cfg;
+ icfg.bcfg = &bcfg;
+ ret = chipset_flash_enable(&icfg);
if (ret == -2) {
msg_perr("WARNING: No chipset found. Flash detection "
"will most likely fail.\n");
@@ -258,7 +259,7 @@
internal_par_init(internal_buses_supported);
/* Report if a non-whitelisted laptop is detected that likely uses a legacy bus. */
- report_nonwl_laptop_detected(bcfg.is_laptop, g_laptop_ok);
+ report_nonwl_laptop_detected(&bcfg);
ret = 0;
--
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73822 )
Change subject: doc: Add contact page
......................................................................
Patch Set 4:
(1 comment)
File doc/index.rst:
https://review.coreboot.org/c/flashrom/+/73822/comment/1c4c741c_744d545c
PS4, Line 9: dev_guide/index
: classic_cli_manpage
: contact
I want to spend some more time thinking about order of items and nesting, and about group names. For example what `dev_guide` translates into, is this "Dev guide" group in the menu? Maybe this can be "Dev guides" plural? Also I think manpage can go into "User guides"... etc
But I assume this can be changed later right? I don't want to block this patch.
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Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/74225 )
Change subject: doc: Add doc how to add docs
......................................................................
doc: Add doc how to add docs
Change-Id: I356a286ad2f3334392efadda366b0ca0f8042752
Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org>
---
A doc/how_to_add_docs.rst
M doc/index.rst
2 files changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/25/74225/1
diff --git a/doc/how_to_add_docs.rst b/doc/how_to_add_docs.rst
new file mode 100644
index 0000000..ad5953c
--- /dev/null
+++ b/doc/how_to_add_docs.rst
@@ -0,0 +1,24 @@
+How to add or update docs
+=========================
+
+To add or update a documentation page, you need to create or modify
+an ``.rst`` file in the ``/doc`` directory and send a patch for
+review.
+
+People who are registered in MAINTAINERS file for doc/ directory will
+be automatically added to the patch as reviewers. However, you are
+very welcome to add more reviewers who know the subject. In fact, it
+is always a good idea to add someone who has knowledge of the specific
+area you are documenting.
+
+We are using Sphinx doc engine for documentation (see
+https://www.sphinx-doc.org/) and reStructured Text format for content.
+reStructuredText Primer page has more details
+https://www.sphinx-doc.org/en/master/usage/restructuredtext/basics.html#restructuredtext-primer
+
+Brand new page needs to be added to the appropriate ``index.rst`` file
+under ``/doc`` directory (that could be a root index file or nested one).
+
+To test your changes, build flashrom with documentation and open
+generated ``.html`` file in the browser. Generated ``.html`` files are
+in meson ``builddir/doc/html`` directory.
diff --git a/doc/index.rst b/doc/index.rst
index d309a03..4af7ca4 100644
--- a/doc/index.rst
+++ b/doc/index.rst
@@ -7,5 +7,6 @@
:hidden:
classic_cli_manpage
+ how_to_add_docs
.. include:: ../README
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/74216 )
Change subject: [WAIT FOR CB:73822]doc: Convert README to sphinx
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
(removing the reviewer was not intentional sorry, returning back)
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