March 2023 - flashrom-gerrit - mail.coreboot.org

[L] Change in flashrom[master]: tree/: Convert printlock func ptr into enumerate values
by Edward O'Callaghan (Code Review) 20 Mar '23

20 Mar '23

Attention is currently required from: Liam Flaherty. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69934 ) Change subject: tree/: Convert printlock func ptr into enumerate values ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/flashrom/+/69934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9131348f72c1010e2c213dca4dc4b675a8d8681e Gerrit-Change-Number: 69934 Gerrit-PatchSet: 4 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Liam Flaherty <liamflaherty(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Liam Flaherty <liamflaherty(a)chromium.org> Gerrit-Comment-Date: Mon, 20 Mar 2023 03:07:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in flashrom[master]: tree/: Convert unlock func ptr into enumerate values
by Edward O'Callaghan (Code Review) 20 Mar '23

20 Mar '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/69933 ) Change subject: tree/: Convert unlock func ptr into enumerate values ...................................................................... tree/: Convert unlock func ptr into enumerate values Converting the blockprotect unlock function pointer within the flashchip struct into enum values allows for the flashchips db to be turn into pure, declarative data. A nice side-effect of this is to reduce link-time symbol space of chipdrivers and increase modularity of the spi25_statusreg.c and related implementations. BUG=none TEST=ninja test. Change-Id: Ie5c5db1b09d07e1a549990d6f5a622fae4c83233 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/69933 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Sam McNally <sammc(a)google.com> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M 82802ab.c M flashrom.c M include/chipdrivers.h M include/flash.h M printlock.c M spi25_statusreg.c M tests/chip.c M tests/chip_wp.c 8 files changed, 154 insertions(+), 74 deletions(-) Approvals: build bot (Jenkins): Verified Sam McNally: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved diff --git a/82802ab.c b/82802ab.c index 90c9cf0..a440bd4 100644 --- a/82802ab.c +++ b/82802ab.c @@ -142,7 +142,7 @@ return 0; } -int unlock_28f004s5(struct flashctx *flash) +static int unlock_28f004s5(struct flashctx *flash) { chipaddr bios = flash->virtual_memory; uint8_t mcfg, bcfg; @@ -195,7 +195,7 @@ return 0; } -int unlock_lh28f008bjt(struct flashctx *flash) +static int unlock_lh28f008bjt(struct flashctx *flash) { chipaddr bios = flash->virtual_memory; uint8_t mcfg, bcfg; @@ -249,3 +249,12 @@ return 0; } + +blockprotect_func_t *lookup_82802ab_blockprotect_func_ptr(const struct flashchip *const chip) +{ + switch (chip->unlock) { + case UNLOCK_28F004S5: return unlock_28f004s5; + case UNLOCK_LH28F008BJT: return unlock_lh28f008bjt; + default: return NULL; /* fallthough */ + }; +} diff --git a/flashrom.c b/flashrom.c index 3cf67f1..c5b795c 100644 --- a/flashrom.c +++ b/flashrom.c @@ -2080,9 +2080,9 @@ if (ret) msg_cerr("Failed to unlock flash status reg with wp support.\n"); } - if (ret && flash->chip->unlock) { - flash->chip->unlock(flash); - } + blockprotect_func_t *bp_func = lookup_blockprotect_func_ptr(flash->chip); + if (ret && bp_func) + bp_func(flash); flash->address_high_byte = -1; flash->in_4ba_mode = false; diff --git a/include/chipdrivers.h b/include/chipdrivers.h index c485aaf..bac7785 100644 --- a/include/chipdrivers.h +++ b/include/chipdrivers.h @@ -76,11 +76,6 @@ int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash); int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash); int spi_prettyprint_status_register_bp2_tb_bpl(struct flashctx *flash); -int spi_disable_blockprotect(struct flashctx *flash); -int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash); -int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash); -int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash); -int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash); int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash); int spi_prettyprint_status_register_at25df(struct flashctx *flash); int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash); @@ -91,22 +86,12 @@ int spi_prettyprint_status_register_at25fs010(struct flashctx *flash); int spi_prettyprint_status_register_at25fs040(struct flashctx *flash); int spi_prettyprint_status_register_at26df081a(struct flashctx *flash); -int spi_disable_blockprotect_at2x_global_unprotect(struct flashctx *flash); -int spi_disable_blockprotect_at2x_global_unprotect_sec(struct flashctx *flash); -int spi_disable_blockprotect_at25f(struct flashctx *flash); -int spi_disable_blockprotect_at25f512a(struct flashctx *flash); -int spi_disable_blockprotect_at25f512b(struct flashctx *flash); -int spi_disable_blockprotect_at25fs010(struct flashctx *flash); -int spi_disable_blockprotect_at25fs040(struct flashctx *flash); int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash); int spi_prettyprint_status_register_n25q(struct flashctx *flash); -int spi_disable_blockprotect_n25q(struct flashctx *flash); int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash); -int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash); int spi_prettyprint_status_register_sst25(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash); -int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash); /* sfdp.c */ int probe_spi_sfdp(struct flashctx *flash); @@ -136,8 +121,7 @@ int erase_block_82802ab(struct flashctx *flash, unsigned int page, unsigned int pagesize); int write_82802ab(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); void print_status_82802ab(uint8_t status); -int unlock_28f004s5(struct flashctx *flash); -int unlock_lh28f008bjt(struct flashctx *flash); +blockprotect_func_t *lookup_82802ab_blockprotect_func_ptr(const struct flashchip *const chip); /* jedec.c */ uint8_t oddparity(uint8_t val); @@ -151,10 +135,7 @@ int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize); int erase_chip_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize); -int unlock_regspace2_uniform_32k(struct flashctx *flash); -int unlock_regspace2_uniform_64k(struct flashctx *flash); -int unlock_regspace2_block_eraser_0(struct flashctx *flash); -int unlock_regspace2_block_eraser_1(struct flashctx *flash); +blockprotect_func_t *lookup_jedec_blockprotect_func_ptr(const struct flashchip *const chip); int printlock_regspace2_uniform_64k(struct flashctx *flash); int printlock_regspace2_block_eraser_0(struct flashctx *flash); int printlock_regspace2_block_eraser_1(struct flashctx *flash); diff --git a/include/flash.h b/include/flash.h index 3db38d2..10c2975 100644 --- a/include/flash.h +++ b/include/flash.h @@ -322,31 +322,34 @@ TEST_ERASE_INJECTOR, /* special case must come last. */ }; -#define NO_BLOCKPROTECT_FUNC NULL -#define SPI_DISABLE_BLOCKPROTECT spi_disable_blockprotect -#define SPI_DISABLE_BLOCKPROTECT_BP2_EP_SRWD spi_disable_blockprotect_bp2_ep_srwd -#define SPI_DISABLE_BLOCKPROTECT_BP1_SRWD spi_disable_blockprotect_bp1_srwd -#define SPI_DISABLE_BLOCKPROTECT_BP2_SRWD spi_disable_blockprotect_bp2_srwd -#define SPI_DISABLE_BLOCKPROTECT_BP3_SRWD spi_disable_blockprotect_bp3_srwd -#define SPI_DISABLE_BLOCKPROTECT_BP4_SRWD spi_disable_blockprotect_bp4_srwd -#define SPI_DISABLE_BLOCKPROTECT_AT45DB spi_disable_blockprotect_at45db -#define SPI_DISABLE_BLOCKPROTECT_AT25F spi_disable_blockprotect_at25f -#define SPI_DISABLE_BLOCKPROTECT_AT25FS010 spi_disable_blockprotect_at25fs010 -#define SPI_DISABLE_BLOCKPROTECT_AT25FS040 spi_disable_blockprotect_at25fs040 -#define SPI_DISABLE_BLOCKPROTECT_AT25F512A spi_disable_blockprotect_at25f512a -#define SPI_DISABLE_BLOCKPROTECT_AT25F512B spi_disable_blockprotect_at25f512b -#define SPI_DISABLE_BLOCKPROTECT_AT2X_GLOBAL_UNPROTECT spi_disable_blockprotect_at2x_global_unprotect -#define SPI_DISABLE_BLOCKPROTECT_AT2X_GLOBAL_UNPROTECT_SEC spi_disable_blockprotect_at2x_global_unprotect_sec -#define SPI_DISABLE_BLOCKPROTECT_SST26_GLOBAL_UNPROTECT spi_disable_blockprotect_sst26_global_unprotect -#define SPI_DISABLE_BLOCKPROTECT_N25Q spi_disable_blockprotect_n25q -#define UNLOCK_REGSPACE2_BLOCK_ERASER_0 unlock_regspace2_block_eraser_0 -#define UNLOCK_REGSPACE2_BLOCK_ERASER_1 unlock_regspace2_block_eraser_1 -#define UNLOCK_REGSPACE2_UNIFORM_32K unlock_regspace2_uniform_32k -#define UNLOCK_REGSPACE2_UNIFORM_64K unlock_regspace2_uniform_64k -#define UNLOCK_28F004S5 unlock_28f004s5 -#define UNLOCK_LH28F008BJT unlock_lh28f008bjt -#define UNLOCK_SST_FWHUB unlock_sst_fwhub -#define UNPROTECT_28SF040 unprotect_28sf040 +enum blockprotect_func { + NO_BLOCKPROTECT_FUNC = 0, /* 0 indicates no unlock function set. */ + SPI_DISABLE_BLOCKPROTECT, + SPI_DISABLE_BLOCKPROTECT_BP2_EP_SRWD, + SPI_DISABLE_BLOCKPROTECT_BP1_SRWD, + SPI_DISABLE_BLOCKPROTECT_BP2_SRWD, + SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, + SPI_DISABLE_BLOCKPROTECT_AT45DB, + SPI_DISABLE_BLOCKPROTECT_AT25F, + SPI_DISABLE_BLOCKPROTECT_AT25FS010, + SPI_DISABLE_BLOCKPROTECT_AT25FS040, + SPI_DISABLE_BLOCKPROTECT_AT25F512A, + SPI_DISABLE_BLOCKPROTECT_AT25F512B, + SPI_DISABLE_BLOCKPROTECT_AT2X_GLOBAL_UNPROTECT, + SPI_DISABLE_BLOCKPROTECT_AT2X_GLOBAL_UNPROTECT_SEC, + SPI_DISABLE_BLOCKPROTECT_SST26_GLOBAL_UNPROTECT, + SPI_DISABLE_BLOCKPROTECT_N25Q, + UNLOCK_REGSPACE2_BLOCK_ERASER_0, + UNLOCK_REGSPACE2_BLOCK_ERASER_1, + UNLOCK_REGSPACE2_UNIFORM_32K, + UNLOCK_REGSPACE2_UNIFORM_64K, + UNLOCK_28F004S5, + UNLOCK_LH28F008BJT, + UNLOCK_SST_FWHUB, + UNPROTECT_28SF040, + TEST_UNLOCK_INJECTOR, /* special case must come last. */ +}; #define NO_PRINTLOCK_FUNC NULL #define PRINTLOCK_AT49F printlock_at49f @@ -458,7 +461,7 @@ } block_erasers[NUM_ERASEFUNCTIONS]; int (*printlock) (struct flashctx *flash); - int (*unlock) (struct flashctx *flash); + enum blockprotect_func unlock; enum write_func write; enum read_func read; struct voltage { @@ -510,6 +513,8 @@ }; typedef int (*chip_restore_fn_cb_t)(struct flashctx *flash, void *data); +typedef int (blockprotect_func_t)(struct flashctx *flash); +blockprotect_func_t *lookup_blockprotect_func_ptr(const struct flashchip *const chip); struct flashrom_flashctx { struct flashchip *chip; diff --git a/printlock.c b/printlock.c index d05251e..f6eea7f 100644 --- a/printlock.c +++ b/printlock.c @@ -186,17 +186,17 @@ return regspace2_walk_unlockblocks(flash, blocks, &unlock_regspace2_block_generic); } -int unlock_regspace2_uniform_64k(struct flashctx *flash) +static int unlock_regspace2_uniform_64k(struct flashctx *flash) { return unlock_regspace2_uniform(flash, 64 * 1024); } -int unlock_regspace2_uniform_32k(struct flashctx *flash) +static int unlock_regspace2_uniform_32k(struct flashctx *flash) { return unlock_regspace2_uniform(flash, 32 * 1024); } -int unlock_regspace2_block_eraser_0(struct flashctx *flash) +static int unlock_regspace2_block_eraser_0(struct flashctx *flash) { // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). const struct unlockblock *unlockblocks = @@ -204,10 +204,21 @@ return regspace2_walk_unlockblocks(flash, unlockblocks, &unlock_regspace2_block_generic); } -int unlock_regspace2_block_eraser_1(struct flashctx *flash) +static int unlock_regspace2_block_eraser_1(struct flashctx *flash) { // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). const struct unlockblock *unlockblocks = (const struct unlockblock *)flash->chip->block_erasers[1].eraseblocks; return regspace2_walk_unlockblocks(flash, unlockblocks, &unlock_regspace2_block_generic); } + +blockprotect_func_t *lookup_jedec_blockprotect_func_ptr(const struct flashchip *const chip) +{ + switch (chip->unlock) { + case UNLOCK_REGSPACE2_BLOCK_ERASER_0: return unlock_regspace2_block_eraser_0; + case UNLOCK_REGSPACE2_BLOCK_ERASER_1: return unlock_regspace2_block_eraser_1; + case UNLOCK_REGSPACE2_UNIFORM_32K: return unlock_regspace2_uniform_32k; + case UNLOCK_REGSPACE2_UNIFORM_64K: return unlock_regspace2_uniform_64k; + default: return NULL; /* fallthough */ + }; +} diff --git a/spi25_statusreg.c b/spi25_statusreg.c index d452416..21a1a15 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -363,12 +363,12 @@ } /* A common block protection disable that tries to unset the status register bits masked by 0x3C. */ -int spi_disable_blockprotect(struct flashctx *flash) +static int spi_disable_blockprotect(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF); } -int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash) +static int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash) { int result = spi_write_enable(flash); if (result) @@ -383,7 +383,7 @@ /* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and * protected/locked by bit #7. Useful when bits 4-5 may be non-0). */ -int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash) +static int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF); } @@ -391,21 +391,21 @@ /* A common block protection disable that tries to unset the status register bits masked by 0x1C (BP0-2) and * protected/locked by bit #7. Useful when bit #5 is neither a protection bit nor reserved (and hence possibly * non-0). */ -int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash) +static int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x1C, 1 << 7, 0, 0xFF); } /* A common block protection disable that tries to unset the status register bits masked by 0x3C (BP0-3) and * protected/locked by bit #7. */ -int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash) +static int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x3C, 1 << 7, 0, 0xFF); } /* A common block protection disable that tries to unset the status register bits masked by 0x7C (BP0-4) and * protected/locked by bit #7. */ -int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash) +static int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF); } @@ -825,39 +825,39 @@ * sectors at once by writing 0 not only the protection bits (2 and 3) but also completely unrelated bits (4 and * 5) which normally are not touched. * Affected are all known Atmel chips matched by AT2[56]D[FLQ]..1A? but the AT26DF041. */ -int spi_disable_blockprotect_at2x_global_unprotect(struct flashctx *flash) +static int spi_disable_blockprotect_at2x_global_unprotect(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 1 << 4, 0x00); } -int spi_disable_blockprotect_at2x_global_unprotect_sec(struct flashctx *flash) +static int spi_disable_blockprotect_at2x_global_unprotect_sec(struct flashctx *flash) { /* FIXME: We should check the security lockdown. */ msg_cinfo("Ignoring security lockdown (if present)\n"); return spi_disable_blockprotect_at2x_global_unprotect(flash); } -int spi_disable_blockprotect_at25f(struct flashctx *flash) +static int spi_disable_blockprotect_at25f(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF); } -int spi_disable_blockprotect_at25f512a(struct flashctx *flash) +static int spi_disable_blockprotect_at25f512a(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 0, 0xFF); } -int spi_disable_blockprotect_at25f512b(struct flashctx *flash) +static int spi_disable_blockprotect_at25f512b(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 1 << 4, 0xFF); } -int spi_disable_blockprotect_at25fs010(struct flashctx *flash) +static int spi_disable_blockprotect_at25fs010(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x6C, 1 << 7, 0, 0xFF); } -int spi_disable_blockprotect_at25fs040(struct flashctx *flash) +static int spi_disable_blockprotect_at25fs040(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF); } @@ -881,7 +881,7 @@ /* === Intel/Numonyx/Micron - Spansion === */ -int spi_disable_blockprotect_n25q(struct flashctx *flash) +static int spi_disable_blockprotect_n25q(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x5C, 1 << 7, 0, 0xFF); } @@ -908,11 +908,56 @@ /* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */ /* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */ -int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash) +static int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash) { return spi_disable_blockprotect_bp2_srwd(flash); } +/* special unit-test hook */ +blockprotect_func_t *g_test_unlock_injector; + +blockprotect_func_t *lookup_blockprotect_func_ptr(const struct flashchip *const chip) +{ + switch (chip->unlock) { + case SPI_DISABLE_BLOCKPROTECT: return spi_disable_blockprotect; + case SPI_DISABLE_BLOCKPROTECT_BP2_EP_SRWD: return spi_disable_blockprotect_bp2_ep_srwd; + case SPI_DISABLE_BLOCKPROTECT_BP1_SRWD: return spi_disable_blockprotect_bp1_srwd; + case SPI_DISABLE_BLOCKPROTECT_BP2_SRWD: return spi_disable_blockprotect_bp2_srwd; + case SPI_DISABLE_BLOCKPROTECT_BP3_SRWD: return spi_disable_blockprotect_bp3_srwd; + case SPI_DISABLE_BLOCKPROTECT_BP4_SRWD: return spi_disable_blockprotect_bp4_srwd; + case SPI_DISABLE_BLOCKPROTECT_AT45DB: return spi_disable_blockprotect_at45db; /* at45db.c */ + case SPI_DISABLE_BLOCKPROTECT_AT25F: return spi_disable_blockprotect_at25f; + case SPI_DISABLE_BLOCKPROTECT_AT25FS010: return spi_disable_blockprotect_at25fs010; + case SPI_DISABLE_BLOCKPROTECT_AT25FS040: return spi_disable_blockprotect_at25fs040; + case SPI_DISABLE_BLOCKPROTECT_AT25F512A: return spi_disable_blockprotect_at25f512a; + case SPI_DISABLE_BLOCKPROTECT_AT25F512B: return spi_disable_blockprotect_at25f512b; + case SPI_DISABLE_BLOCKPROTECT_AT2X_GLOBAL_UNPROTECT: return spi_disable_blockprotect_at2x_global_unprotect; + case SPI_DISABLE_BLOCKPROTECT_AT2X_GLOBAL_UNPROTECT_SEC: return spi_disable_blockprotect_at2x_global_unprotect_sec; + case SPI_DISABLE_BLOCKPROTECT_SST26_GLOBAL_UNPROTECT: return spi_disable_blockprotect_sst26_global_unprotect; + case SPI_DISABLE_BLOCKPROTECT_N25Q: return spi_disable_blockprotect_n25q; + /* fallthough to lookup_jedec_blockprotect_func_ptr() */ + case UNLOCK_REGSPACE2_BLOCK_ERASER_0: + case UNLOCK_REGSPACE2_BLOCK_ERASER_1: + case UNLOCK_REGSPACE2_UNIFORM_32K: + case UNLOCK_REGSPACE2_UNIFORM_64K: + return lookup_jedec_blockprotect_func_ptr(chip); + /* fallthough to lookup_82802ab_blockprotect_func_ptr() */ + case UNLOCK_28F004S5: + case UNLOCK_LH28F008BJT: + return lookup_82802ab_blockprotect_func_ptr(chip); + case UNLOCK_SST_FWHUB: return unlock_sst_fwhub; /* sst_fwhub.c */ + case UNPROTECT_28SF040: return unprotect_28sf040; /* sst28sf040.c */ + case TEST_UNLOCK_INJECTOR: return g_test_unlock_injector; + /* default: non-total function, 0 indicates no unlock function set. + * We explicitly do not want a default catch-all case in the switch + * to ensure unhandled enum's are compiler warnings. + */ + case NO_BLOCKPROTECT_FUNC: return NULL; + }; + + return NULL; +} + /* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */ int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash) { diff --git a/tests/chip.c b/tests/chip.c index ad0d770..6a17d86 100644 --- a/tests/chip.c +++ b/tests/chip.c @@ -149,6 +149,7 @@ extern write_func_t *g_test_write_injector; extern read_func_t *g_test_read_injector; extern erasefunc_t *g_test_erase_injector; +extern blockprotect_func_t *g_test_unlock_injector; static const struct flashchip chip_8MiB = { .vendor = "aklm", @@ -156,7 +157,7 @@ .tested = TEST_OK_PREW, .read = TEST_READ_INJECTOR, .write = TEST_WRITE_INJECTOR, - .unlock = unlock_chip, + .unlock = TEST_UNLOCK_INJECTOR, .block_erasers = {{ /* All blocks within total size of the chip. */ @@ -172,7 +173,7 @@ .tested = TEST_OK_PREW, .read = SPI_CHIP_READ, .write = SPI_CHIP_WRITE256, - .unlock = spi_disable_blockprotect, + .unlock = SPI_DISABLE_BLOCKPROTECT, .page_size = 256, .block_erasers = { @@ -210,6 +211,7 @@ g_test_write_injector = write_chip; g_test_read_injector = read_chip; g_test_erase_injector = block_erase_chip; + g_test_unlock_injector = unlock_chip; struct flashrom_flashctx flashctx = { 0 }; struct flashrom_layout *layout; struct flashchip mock_chip = chip_8MiB; @@ -269,6 +271,7 @@ g_test_write_injector = write_chip; g_test_read_injector = read_chip; g_test_erase_injector = block_erase_chip; + g_test_unlock_injector = unlock_chip; struct flashrom_flashctx flashctx = { 0 }; struct flashrom_layout *layout; struct flashchip mock_chip = chip_8MiB; @@ -344,6 +347,7 @@ g_test_write_injector = write_chip; g_test_read_injector = read_chip; g_test_erase_injector = block_erase_chip; + g_test_unlock_injector = unlock_chip; struct flashrom_flashctx flashctx = { 0 }; struct flashrom_layout *layout; struct flashchip mock_chip = chip_8MiB; @@ -535,6 +539,7 @@ g_test_write_injector = write_chip; g_test_read_injector = read_chip; g_test_erase_injector = block_erase_chip; + g_test_unlock_injector = unlock_chip; struct flashrom_flashctx flashctx = { 0 }; struct flashrom_layout *layout; struct flashchip mock_chip = chip_8MiB; diff --git a/tests/chip_wp.c b/tests/chip_wp.c index 9607a96..2686f44 100644 --- a/tests/chip_wp.c +++ b/tests/chip_wp.c @@ -67,7 +67,7 @@ .tested = TEST_OK_PREW, .read = SPI_CHIP_READ, .write = SPI_CHIP_WRITE256, - .unlock = spi_disable_blockprotect, + .unlock = SPI_DISABLE_BLOCKPROTECT, .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_WRSR2 | FEATURE_WRSR3, .block_erasers = { -- To view, visit https://review.coreboot.org/c/flashrom/+/69933 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie5c5db1b09d07e1a549990d6f5a622fae4c83233 Gerrit-Change-Number: 69933 Gerrit-PatchSet: 7 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: [WIP] tests: Add workaround to allow tests mock fileno on OpenBSD
by Anastasia Klimchuk (Code Review) 19 Mar '23

19 Mar '23

Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/73830 ) Change subject: [WIP] tests: Add workaround to allow tests mock fileno on OpenBSD ...................................................................... [WIP] tests: Add workaround to allow tests mock fileno on OpenBSD Segfault in `_cmocka_run_group_tests` before any test in run Change-Id: I305e5254f180e0d56a19ad4b17a370ce61572138 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M tests/tests.c 1 file changed, 14 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/30/73830/1 diff --git a/tests/tests.c b/tests/tests.c index d296a98..23c6abf 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -389,11 +389,11 @@ { int ret = 0; -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) +#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__OpenBSD__) /* * Pretending to be a multithreaded environment so that `fileno` * is called as a function (and not as a macro). - * fileno macro in FreeBSD is expanded into inline access of + * fileno macro in FreeBSD and OpenBSD is expanded into inline access of * private field of file descriptor, which is impossible to mock. * Calling fileno as a function allows the test to mock it. */ -- To view, visit https://review.coreboot.org/c/flashrom/+/73830 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I305e5254f180e0d56a19ad4b17a370ce61572138 Gerrit-Change-Number: 73830 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in flashrom[master]: ch341a_spi: drop validation of handle in routines
by Anastasia Klimchuk (Code Review) 18 Mar '23

18 Mar '23

Attention is currently required from: Alexander Goncharov. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72808 ) Change subject: ch341a_spi: drop validation of handle in routines ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/72808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1872495b83a522ceced331fef35d9d9d3b43fce5 Gerrit-Change-Number: 72808 Gerrit-PatchSet: 3 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Sat, 18 Mar 2023 12:08:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: ch341a_spi: Refactor singleton states into reentrant pattern
by Anastasia Klimchuk (Code Review) 18 Mar '23

18 Mar '23

Attention is currently required from: Edward O'Callaghan, Alexander Goncharov. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72807 ) Change subject: ch341a_spi: Refactor singleton states into reentrant pattern ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/72807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9fe72bff88b7f8778c1199bdab8ba43bf32e1c8c Gerrit-Change-Number: 72807 Gerrit-PatchSet: 6 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Sat, 18 Mar 2023 12:07:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: flashrom: rewrite flashbuses_to_text()
by Anastasia Klimchuk (Code Review) 18 Mar '23

18 Mar '23

Attention is currently required from: Felix Singer, Edward O'Callaghan, Angel Pons, Alexander Goncharov. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73039 ) Change subject: flashrom: rewrite flashbuses_to_text() ...................................................................... Patch Set 6: Code-Review+1 (1 comment) File flashrom.c: https://review.coreboot.org/c/flashrom/+/73039/comment/ad7b74ce_bfcee8f5 PS5, Line 948: if (bustype & (1 << i)) > This condition checks if a specific bus is enabled (`bustype` is a bit flag variable). […] Oh that my question was a silly one, sorry. Of course the condition is needed because there is one specific `bustype` which is a function argument. I got another thing in mind instead. At the moment code relies on the order of `bustypes` values being the same as in `chipbustype` enum. At the very least, this needs a comment. I don't know if there are better ways. I am worried there are two ordered lists in two different files, but they have to be in the same order. However, we have a unit test which should fail when the order is broken. That's good. In any case, please add a comment about the order of `bustypes`. Maybe that's enough :) -- To view, visit https://review.coreboot.org/c/flashrom/+/73039 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I59b9044c99b4ba6c00d8c97f1e91af09d70dce2c Gerrit-Change-Number: 73039 Gerrit-PatchSet: 6 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Sat, 18 Mar 2023 11:25:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Alexander Goncharov <chat(a)joursoir.net> Gerrit-MessageType: comment

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[L] Change in flashrom[master]: printf: Use inttype.h macros for format strings
by Thomas Heijligen (Code Review) 18 Mar '23

18 Mar '23

Attention is currently required from: Edward O'Callaghan, Angel Pons, Arthur Heymans, Alexander Goncharov. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73040 ) Change subject: printf: Use inttype.h macros for format strings ...................................................................... Patch Set 8: (1 comment) Patchset: PS8: > I am wondering is this should be in guidelines somewhere. […] yes, we should put this in the developer guidelines. I'll also search for the possibility of automatic testing this. This would make keeping track of it much easier. -- To view, visit https://review.coreboot.org/c/flashrom/+/73040 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia75b6df981ce60c891161fe553c7ceab8570178d Gerrit-Change-Number: 73040 Gerrit-PatchSet: 8 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Sat, 18 Mar 2023 10:17:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: meson_cross: Introduce meson cross file for DJGPP/DOS
by Anastasia Klimchuk (Code Review) 18 Mar '23

18 Mar '23

Attention is currently required from: Thomas Heijligen. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73439 ) Change subject: meson_cross: Introduce meson cross file for DJGPP/DOS ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/73439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iabda73942c1e64cd46604c78533982374f78e1a4 Gerrit-Change-Number: 73439 Gerrit-PatchSet: 4 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Sat, 18 Mar 2023 09:53:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: meson.build: Add 'dos' as option for pci_based programmer
by Anastasia Klimchuk (Code Review) 18 Mar '23

18 Mar '23

Attention is currently required from: Thomas Heijligen. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73156 ) Change subject: meson.build: Add 'dos' as option for pci_based programmer ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/73156 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If4907a3fd1852ef60d06ef1625ad8a106d89a126 Gerrit-Change-Number: 73156 Gerrit-PatchSet: 6 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Sat, 18 Mar 2023 09:52:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in flashrom[master]: printf: Use inttype.h macros for format strings
by Anastasia Klimchuk (Code Review) 18 Mar '23

18 Mar '23

Attention is currently required from: Thomas Heijligen, Edward O'Callaghan, Angel Pons, Arthur Heymans, Alexander Goncharov. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73040 ) Change subject: printf: Use inttype.h macros for format strings ...................................................................... Patch Set 8: Code-Review+2 (1 comment) Patchset: PS8: I am wondering is this should be in guidelines somewhere. Or maybe the default rule "look at previous examples and do the same" is sufficient...? -- To view, visit https://review.coreboot.org/c/flashrom/+/73040 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia75b6df981ce60c891161fe553c7ceab8570178d Gerrit-Change-Number: 73040 Gerrit-PatchSet: 8 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Sat, 18 Mar 2023 09:50:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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