March 2023 - flashrom-gerrit - mail.coreboot.org

[XL] Change in flashrom[master]: data/flashchips.json: Add JSON flashchips db variant
by Edward O'Callaghan (Code Review) 29 Mar '23

29 Mar '23

Attention is currently required from: Thomas Heijligen, Angel Pons. Hello build bot (Jenkins), Thomas Heijligen, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/74071 to look at the new patch set (#2). Change subject: data/flashchips.json: Add JSON flashchips db variant ...................................................................... data/flashchips.json: Add JSON flashchips db variant Generated from flashchips.c at commit 73e47091. Change-Id: I7fceac8a285c8ecf3f3a09a90cc1ae369e8a9429 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- A data/flashchips.json 1 file changed, 177,912 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/71/74071/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/74071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7fceac8a285c8ecf3f3a09a90cc1ae369e8a9429 Gerrit-Change-Number: 74071 Gerrit-PatchSet: 2 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[XL] Change in flashrom[master]: data/flashchips.json: Add JSON flashchips db variant
by Edward O'Callaghan (Code Review) 29 Mar '23

29 Mar '23

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/74071 ) Change subject: data/flashchips.json: Add JSON flashchips db variant ...................................................................... data/flashchips.json: Add JSON flashchips db variant Generated from flashchips.c at commit 73e47091. Change-Id: I7fceac8a285c8ecf3f3a09a90cc1ae369e8a9429 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- A data/flashchips.json 1 file changed, 145,458 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/71/74071/1 -- To view, visit https://review.coreboot.org/c/flashrom/+/74071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7fceac8a285c8ecf3f3a09a90cc1ae369e8a9429 Gerrit-Change-Number: 74071 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in flashrom[master]: flashchips.c: Drop 'unlock' func for chips with WP topologies
by Angel Pons (Code Review) 29 Mar '23

29 Mar '23

Attention is currently required from: Edward O'Callaghan, Nikolai Artemiev. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73714 ) Change subject: flashchips.c: Drop 'unlock' func for chips with WP topologies ...................................................................... Patch Set 3: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/73714/comment/dc08ff71_9cd8ee45 PS3, Line 10: boutique What does "boutique" mean in this context? -- To view, visit https://review.coreboot.org/c/flashrom/+/73714 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib24e91b28cb3d87ba74019e23f88209b95a21c5d Gerrit-Change-Number: 73714 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 29 Mar 2023 08:36:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in flashrom[master]: util/flashchips_db_jsoniser: Initial version
by Angel Pons (Code Review) 29 Mar '23

29 Mar '23

Attention is currently required from: Thomas Heijligen, Edward O'Callaghan. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/74065 ) Change subject: util/flashchips_db_jsoniser: Initial version ...................................................................... Patch Set 1: Code-Review+1 (7 comments) Patchset: PS1: Interesting idea! It looks nice, although coding style is rather inconsistent. File util/flashchips_db_jsoniser/main.c: https://review.coreboot.org/c/flashrom/+/74065/comment/dc0d6e5f_2e879cb6 PS1, Line 65: ret = realloc(ret, strlen(ret) + 1); Is this needed? https://review.coreboot.org/c/flashrom/+/74065/comment/328a4e54_f21e07f9 PS1, Line 69: static char *decode_test_state(enum test_state ts) : { : switch (ts) { : case OK: return "OK"; : case NT: return "NT"; : case BAD: return "BAD"; : case DEP: return "DEP"; : case NA: return "NA"; : } : return NULL; : }; : : static char *decode_cmdset(int cmdset) : { : switch (cmdset) { : case SPI25: return "SPI25"; : case SPI_EDI: return "SPI_EDI"; : } : return NULL; : } Indentation: please use tabs instead of spaces https://review.coreboot.org/c/flashrom/+/74065/comment/12c8accb_a615dfe8 PS1, Line 113: return NULL; Indentation https://review.coreboot.org/c/flashrom/+/74065/comment/e0b00009_80bc6d44 PS1, Line 162: printf("\t\t\t\t\"block_erasers\": [\n"); : : for (unsigned i = 0; i < NUM_ERASEFUNCTIONS; i++) { : const struct block_eraser *be = &bes[i]; : : if (i) printf(",\n"); : printf("\t\t\t\t\t{\n"); : printf("\t\t\t\t\t\t\"%d\": [\n", i); : for (unsigned j = 0; j < NUM_ERASEREGIONS; j++) { : struct eraseblock block = be->eraseblocks[j]; : if (j) printf(",\n"); : printf("\t\t\t\t\t\t\t{\n"); : printf("\t\t\t\t\t\t\t\t\"size\": %d,\n", block.size); : printf("\t\t\t\t\t\t\t\t\"count\": %d\n", block.size); : printf("\t\t\t\t\t\t\t}"); : } : printf("\t\t\t\t\t\t],\n"); : : enum block_erase_func block_erase = be->block_erase; : const char *block_erase_type = decode_block_eraser_type(block_erase); : printf("\t\t\t\t\t\t\"block_erase\": \"%s\"\n", block_erase_type); : : printf("\t\t\t\t\t}\n"); : } : : printf("\t\t\t\t],\n"); Indentation https://review.coreboot.org/c/flashrom/+/74065/comment/62486a27_ffbb40e2 PS1, Line 194: case WRITE_JEDEC1: return "WRITE_JEDEC_1"; Indentation (this one uses 8 spaces) https://review.coreboot.org/c/flashrom/+/74065/comment/5d76195a_5c834fea PS1, Line 228: printf("{\n\t\t\"flashchips\": [\n"); : : for (unsigned int i = 0; i < flashchips_size; i++) { : if (i) printf(",\n"); : printf("\t\t\t{\n"); : : printf("\t\t\t\t\"vendor\": \"%s\",\n", flashchips[i].vendor); : printf("\t\t\t\t\"name\": \"%s\",\n", flashchips[i].name); : : // bustype : char *bustype = flashbuses_to_text_copy(flashchips[i].bustype); : printf("\t\t\t\t\"bustype\": \"%s\",\n", bustype); : free(bustype); : : printf("\t\t\t\t\"manufacture_id\": %d,\n", flashchips[i].manufacture_id); : printf("\t\t\t\t\"model_id\": %d,\n", flashchips[i].model_id); : printf("\t\t\t\t\"total_size\": %d,\n", flashchips[i].total_size); : printf("\t\t\t\t\"page_size\": %d,\n", flashchips[i].page_size); : printf("\t\t\t\t\"feature_bits\": %d,\n", flashchips[i].feature_bits); : : // tested : char *pts = decode_test_state(flashchips[i].tested.probe); : char *rts = decode_test_state(flashchips[i].tested.read); : char *ets = decode_test_state(flashchips[i].tested.erase); : char *wts = decode_test_state(flashchips[i].tested.write); : char *wpts = decode_test_state(flashchips[i].tested.wp); : printf("\t\t\t\t\"test_state\": [\n"); : printf("\t\t\t\t\t{ \"probe\": \"%s\"},\n", pts); : printf("\t\t\t\t\t{ \"read\": \"%s\"},\n", rts); : printf("\t\t\t\t\t{ \"erase\": \"%s\"},\n", ets); : printf("\t\t\t\t\t{ \"write\": \"%s\"},\n", wts); : printf("\t\t\t\t\t{ \"wp\": \"%s\"}\n", wpts); : printf("\t\t\t\t],\n"); : : // spi_cmd_set : char *cmdset = decode_cmdset(flashchips[i].spi_cmd_set); : printf("\t\t\t\t\"spi_cmd_set\": \"%s\",\n", cmdset); : : // probe_func probe; : char *probefn = decode_probefn(flashchips[i].probe); : printf("\t\t\t\t\"probe\": \"%s\",\n", probefn); : : printf("\t\t\t\t\"probe_timing\": %d,\n", flashchips[i].probe_timing); : : // block_erasers[NUM_ERASEFUNCTIONS]; : decode_block_erasers(flashchips[i].block_erasers); : : // enum write_func write; : const char *writefn = decode_writefn(flashchips[i].write); : printf("\t\t\t\t\"write\": \"%s\",\n", writefn); : : // enum read_func read; : const char *readfn = decode_readfn(flashchips[i].read); : printf("\t\t\t\t\"read\": \"%s\",\n", readfn); : : // struct voltage { : // uint16_t min; : // uint16_t max; : // } voltage; : printf("\t\t\t\t\"voltage\": [\n"); : printf("\t\t\t\t\t{ \"min\": %d },\n", flashchips[i].voltage.min); : printf("\t\t\t\t\t{ \"max\": %d }\n", flashchips[i].voltage.max); : printf("\t\t\t\t]\n"); : : // enum write_granularity gran; : : printf("\n\t\t\t}\n"); : } : : printf("\t]\n}"); : return 0; Indentation -- To view, visit https://review.coreboot.org/c/flashrom/+/74065 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3b65caeb811ec0978091c543ccffb5a1b0d254ba Gerrit-Change-Number: 74065 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sam McNally <sammc(a)google.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Wed, 29 Mar 2023 08:33:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in flashrom[master]: util/flashchips_db_jsoniser: Initial version
by Edward O'Callaghan (Code Review) 29 Mar '23

29 Mar '23

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/74065 ) Change subject: util/flashchips_db_jsoniser: Initial version ...................................................................... util/flashchips_db_jsoniser: Initial version This is a quick hack to help with migrating the flashchips db out of C code into a pure, declarative JSON data format. This can be transformed to whatever is prefered long term later however this gets us across the bridge. Change-Id: I3b65caeb811ec0978091c543ccffb5a1b0d254ba Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- A util/flashchips_db_jsoniser/main.c A util/flashchips_db_jsoniser/meson.build 2 files changed, 322 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/65/74065/1 diff --git a/util/flashchips_db_jsoniser/main.c b/util/flashchips_db_jsoniser/main.c new file mode 100644 index 0000000..829e58e --- /dev/null +++ b/util/flashchips_db_jsoniser/main.c @@ -0,0 +1,299 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2023 Google Australia. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <stdio.h> +#include <string.h> +#include <stdlib.h> + +#include "flash.h" +#include "flashchips.h" +#include "writeprotect.h" + +static char *strcat_realloc_copy(char *dest, const char *src) +{ + dest = realloc(dest, strlen(dest) + strlen(src) + 1); + if (!dest) { + return NULL; + } + strcat(dest, src); + return dest; +} + +/* + * Return a string corresponding to the bustype parameter. + * Memory is obtained with malloc() and must be freed with free() by the caller. + */ +static char *flashbuses_to_text_copy(enum chipbustype bustype) +{ + char *ret = calloc(1, 1); + /* + * FIXME: Once all chipsets and flash chips have been updated, NONSPI + * will cease to exist and should be eliminated here as well. + */ + if (bustype == BUS_NONSPI) { + ret = strcat_realloc_copy(ret, "BUS_NONSPI, "); + } else { + if (bustype & BUS_PARALLEL) + ret = strcat_realloc_copy(ret, "BUS_PARALLEL, "); + if (bustype & BUS_LPC) + ret = strcat_realloc_copy(ret, "BUS_LPC, "); + if (bustype & BUS_FWH) + ret = strcat_realloc_copy(ret, "BUS_FWH, "); + if (bustype & BUS_SPI) + ret = strcat_realloc_copy(ret, "BUS_SPI, "); + if (bustype & BUS_PROG) + ret = strcat_realloc_copy(ret, "BUS_PROG, "); + if (bustype == BUS_NONE) + ret = strcat_realloc_copy(ret, "BUS_NONE, "); + } + /* Kill last comma. */ + ret[strlen(ret) - 2] = '\0'; + ret = realloc(ret, strlen(ret) + 1); + return ret; +} + +static char *decode_test_state(enum test_state ts) +{ + switch (ts) { + case OK: return "OK"; + case NT: return "NT"; + case BAD: return "BAD"; + case DEP: return "DEP"; + case NA: return "NA"; + } + return NULL; +}; + +static char *decode_cmdset(int cmdset) +{ + switch (cmdset) { + case SPI25: return "SPI25"; + case SPI_EDI: return "SPI_EDI"; + } + return NULL; +} + +static char *decode_probefn(enum probe_func probe) +{ + switch (probe) { + case PROBE_JEDEC: return "PROBE_JEDEC"; + case PROBE_JEDEC_29GL: return "PROBE_JEDEC_29GL"; + case PROBE_OPAQUE: return "PROBE_OPAQUE"; + case PROBE_EDI_KB9012: return "EDI_PROBE_KB9012"; + case PROBE_AT82802AB: return "PROBE_82802AB"; + case PROBE_W29EE011: return "PROBE_W29EE011"; + case PROBE_EN29LV640B: return "PROBE_EN29LV640B"; + case PROBE_SPI_AT25F: return "PROBE_SPI_AT25F"; + case PROBE_SPI_AT45DB: return "PROBE_SPI_AT45DB"; + case PROBE_SPI_BIG_SPANSION: return "PROBE_SPI_BIG_SPANSION"; + case PROBE_SPI_RDID: return "PROBE_SPI_RDID"; + case PROBE_SPI_RDID4: return "PROBE_SPI_RDID4"; + case PROBE_SPI_REMS: return "PROBE_SPI_REMS"; + case PROBE_SPI_RES1: return "PROBE_SPI_RES1"; + case PROBE_SPI_RES2: return "PROBE_SPI_RES2"; + case PROBE_SPI_SFDP: return "PROBE_SPI_SFDP"; + case PROBE_SPI_ST95: return "PROBE_SPI_ST95"; + + case NO_PROBE_FUNC: return "NO_PROBE_FUNC"; + }; + return NULL; +} + +static char *decode_block_eraser_type(int block_erase) +{ + switch (block_erase) { + case SPI_BLOCK_ERASE_EMULATION: return "SPI_BLOCK_ERASE_EMULATION"; + case SPI_BLOCK_ERASE_20: return "SPI_BLOCK_ERASE_20"; + case SPI_BLOCK_ERASE_21: return "SPI_BLOCK_ERASE_21"; + case SPI_BLOCK_ERASE_40: return "SPI_BLOCK_ERASE_40"; + case SPI_BLOCK_ERASE_50: return "SPI_BLOCK_ERASE_50"; + case SPI_BLOCK_ERASE_52: return "SPI_BLOCK_ERASE_52"; + case SPI_BLOCK_ERASE_53: return "SPI_BLOCK_ERASE_53"; + case SPI_BLOCK_ERASE_5C: return "SPI_BLOCK_ERASE_5C"; + case SPI_BLOCK_ERASE_60: return "SPI_BLOCK_ERASE_60"; + case SPI_BLOCK_ERASE_62: return "SPI_BLOCK_ERASE_62"; + case SPI_BLOCK_ERASE_81: return "SPI_BLOCK_ERASE_81"; + case SPI_BLOCK_ERASE_C4: return "SPI_BLOCK_ERASE_C4"; + case SPI_BLOCK_ERASE_C7: return "SPI_BLOCK_ERASE_C7"; + case SPI_BLOCK_ERASE_D7: return "SPI_BLOCK_ERASE_D7"; + case SPI_BLOCK_ERASE_D8: return "SPI_BLOCK_ERASE_D8"; + case SPI_BLOCK_ERASE_DB: return "SPI_BLOCK_ERASE_DB"; + case SPI_BLOCK_ERASE_DC: return "SPI_BLOCK_ERASE_DC"; + case S25FL_BLOCK_ERASE: return "S25FL_BLOCK_ERASE"; + case S25FS_BLOCK_ERASE_D8: return "S25FS_BLOCK_ERASE_D8"; + case JEDEC_SECTOR_ERASE: return "JEDEC_SECTOR_ERASE"; + case JEDEC_BLOCK_ERASE: return "JEDEC_BLOCK_ERASE"; + case JEDEC_CHIP_BLOCK_ERASE: return "JEDEC_CHIP_BLOCK_ERASE"; + case OPAQUE_ERASE: return "OPAQUE_ERASE"; + case SPI_ERASE_AT45CS_SECTOR: return "SPI_ERASE_AT45CS_SECTOr"; + case SPI_ERASE_AT45DB_BLOCK: return "SPI_ERASE_AT45DB_BLOCK"; + case SPI_ERASE_AT45DB_CHIP: return "SPI_ERASE_AT45DB_CHIP"; + case SPI_ERASE_AT45DB_PAGE: return "SPI_ERASE_AT45DB_PAGE"; + case SPI_ERASE_AT45DB_SECTOR: return "SPI_ERASE_AT45DB_SECTOR"; + case ERASE_CHIP_28SF040: return "ERASE_CHIP_28SF040"; + case ERASE_SECTOR_28SF040: return "ERASE_SECTOR_28SF040"; + case ERASE_BLOCK_82802AB: return "ERASE_BLOCK_82802AB"; + case ERASE_SECTOR_49LFXXXC: return "ERASE_SECTOR_49LFXXXC"; + case STM50_SECTOR_ERASE: return "ERASE_SECTOR_STM50"; + case EDI_CHIP_BLOCK_ERASE: return "EDI_CHIP_BLOCK_ERASE"; + + case NO_BLOCK_ERASE_FUNC: return "NO_BLOCK_ERASE_FUNC"; + }; + + return NULL; +} + +static void decode_block_erasers(const struct block_eraser *bes) +{ + printf("\t\t\t\t\"block_erasers\": [\n"); + + for (unsigned i = 0; i < NUM_ERASEFUNCTIONS; i++) { + const struct block_eraser *be = &bes[i]; + + if (i) printf(",\n"); + printf("\t\t\t\t\t{\n"); + printf("\t\t\t\t\t\t\"%d\": [\n", i); + for (unsigned j = 0; j < NUM_ERASEREGIONS; j++) { + struct eraseblock block = be->eraseblocks[j]; + if (j) printf(",\n"); + printf("\t\t\t\t\t\t\t{\n"); + printf("\t\t\t\t\t\t\t\t\"size\": %d,\n", block.size); + printf("\t\t\t\t\t\t\t\t\"count\": %d\n", block.size); + printf("\t\t\t\t\t\t\t}"); + } + printf("\t\t\t\t\t\t],\n"); + + enum block_erase_func block_erase = be->block_erase; + const char *block_erase_type = decode_block_eraser_type(block_erase); + printf("\t\t\t\t\t\t\"block_erase\": \"%s\"\n", block_erase_type); + + printf("\t\t\t\t\t}\n"); + } + + printf("\t\t\t\t],\n"); +} + +static char *decode_writefn(int write) +{ + switch (write) { + case WRITE_JEDEC: return "WRITE_JEDEC"; + case WRITE_JEDEC1: return "WRITE_JEDEC_1"; + case WRITE_OPAQUE: return "WRITE_OPAQUE"; + case SPI_CHIP_WRITE1: return "SPI_CHIP_WRITE_1"; + case SPI_CHIP_WRITE256: return "SPI_CHIP_WRITE_256"; + case SPI_WRITE_AAI: return "SPI_AAI_WRITE"; + case SPI_WRITE_AT45DB: return "SPI_WRITE_AT45DB"; + case WRITE_28SF040: return "WRITE_28SF040"; + case WRITE_82802AB: return "WRITE_82802AB"; + case WRITE_EN29LV640B: return "WRITE_EN29LV640B"; + case EDI_CHIP_WRITE: return "EDI_CHIP_WRITE"; + + case NO_WRITE_FUNC: return "NO_WRITE_FUNC"; + }; + + return NULL; +} + +static char *decode_readfn(int read) +{ + switch (read) { + case SPI_CHIP_READ: return "SPI_CHIP_READ"; + case READ_OPAQUE: return "READ_OPAQUE"; + case READ_MEMMAPPED: return "READ_MEMMAPPED"; + case EDI_CHIP_READ: return "EDI_CHIP_READ"; + case SPI_READ_AT45DB: return "SPI_READ_AT45DB"; + case SPI_READ_AT45DB_E8: return "SPI_READ_AT45DB_E8"; + + case NO_READ_FUNC: return "NO_READ_FUNC"; + }; + + return NULL; +} +int main() +{ + printf("{\n\t\t\"flashchips\": [\n"); + + for (unsigned int i = 0; i < flashchips_size; i++) { + if (i) printf(",\n"); + printf("\t\t\t{\n"); + + printf("\t\t\t\t\"vendor\": \"%s\",\n", flashchips[i].vendor); + printf("\t\t\t\t\"name\": \"%s\",\n", flashchips[i].name); + + // bustype + char *bustype = flashbuses_to_text_copy(flashchips[i].bustype); + printf("\t\t\t\t\"bustype\": \"%s\",\n", bustype); + free(bustype); + + printf("\t\t\t\t\"manufacture_id\": %d,\n", flashchips[i].manufacture_id); + printf("\t\t\t\t\"model_id\": %d,\n", flashchips[i].model_id); + printf("\t\t\t\t\"total_size\": %d,\n", flashchips[i].total_size); + printf("\t\t\t\t\"page_size\": %d,\n", flashchips[i].page_size); + printf("\t\t\t\t\"feature_bits\": %d,\n", flashchips[i].feature_bits); + + // tested + char *pts = decode_test_state(flashchips[i].tested.probe); + char *rts = decode_test_state(flashchips[i].tested.read); + char *ets = decode_test_state(flashchips[i].tested.erase); + char *wts = decode_test_state(flashchips[i].tested.write); + char *wpts = decode_test_state(flashchips[i].tested.wp); + printf("\t\t\t\t\"test_state\": [\n"); + printf("\t\t\t\t\t{ \"probe\": \"%s\"},\n", pts); + printf("\t\t\t\t\t{ \"read\": \"%s\"},\n", rts); + printf("\t\t\t\t\t{ \"erase\": \"%s\"},\n", ets); + printf("\t\t\t\t\t{ \"write\": \"%s\"},\n", wts); + printf("\t\t\t\t\t{ \"wp\": \"%s\"}\n", wpts); + printf("\t\t\t\t],\n"); + + // spi_cmd_set + char *cmdset = decode_cmdset(flashchips[i].spi_cmd_set); + printf("\t\t\t\t\"spi_cmd_set\": \"%s\",\n", cmdset); + + // probe_func probe; + char *probefn = decode_probefn(flashchips[i].probe); + printf("\t\t\t\t\"probe\": \"%s\",\n", probefn); + + printf("\t\t\t\t\"probe_timing\": %d,\n", flashchips[i].probe_timing); + + // block_erasers[NUM_ERASEFUNCTIONS]; + decode_block_erasers(flashchips[i].block_erasers); + + // enum write_func write; + const char *writefn = decode_writefn(flashchips[i].write); + printf("\t\t\t\t\"write\": \"%s\",\n", writefn); + + // enum read_func read; + const char *readfn = decode_readfn(flashchips[i].read); + printf("\t\t\t\t\"read\": \"%s\",\n", readfn); + + // struct voltage { + // uint16_t min; + // uint16_t max; + // } voltage; + printf("\t\t\t\t\"voltage\": [\n"); + printf("\t\t\t\t\t{ \"min\": %d },\n", flashchips[i].voltage.min); + printf("\t\t\t\t\t{ \"max\": %d }\n", flashchips[i].voltage.max); + printf("\t\t\t\t]\n"); + + // enum write_granularity gran; + + printf("\n\t\t\t}\n"); + } + + printf("\t]\n}"); + return 0; +} diff --git a/util/flashchips_db_jsoniser/meson.build b/util/flashchips_db_jsoniser/meson.build new file mode 100644 index 0000000..a28f047 --- /dev/null +++ b/util/flashchips_db_jsoniser/meson.build @@ -0,0 +1,8 @@ +project('json', 'c') +include_dir = include_directories('../../include') +executable('json', + include_directories : include_dir, + sources : [ + 'main.c', '../../flashchips.c' + ] +) -- To view, visit https://review.coreboot.org/c/flashrom/+/74065 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3b65caeb811ec0978091c543ccffb5a1b0d254ba Gerrit-Change-Number: 74065 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in flashrom[master]: internal: Move laptop_ok into board_cfg
by Sam McNally (Code Review) 28 Mar '23

28 Mar '23

Attention is currently required from: Thomas Heijligen, Edward O'Callaghan, Angel Pons. Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73456 ) Change subject: internal: Move laptop_ok into board_cfg ...................................................................... Patch Set 3: (1 comment) File internal.c: https://review.coreboot.org/c/flashrom/+/73456/comment/508ae6d6_ddbc8384 PS3, Line 108: struct const -- To view, visit https://review.coreboot.org/c/flashrom/+/73456 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I459215253845c2af73262943ce91a36464e9eb06 Gerrit-Change-Number: 73456 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 28 Mar 2023 09:17:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in flashrom[master]: internal: Move is_laptop into board_cfg
by Sam McNally (Code Review) 28 Mar '23

28 Mar '23

Attention is currently required from: Thomas Heijligen, Edward O'Callaghan. Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73455 ) Change subject: internal: Move is_laptop into board_cfg ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/73455 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I24e38e4457299934acdcd70325d0bf0f4b139e5f Gerrit-Change-Number: 73455 Gerrit-PatchSet: 2 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Tue, 28 Mar 2023 09:08:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: board_enables: Allow for prog cfg coupling with board cfg
by Sam McNally (Code Review) 28 Mar '23

28 Mar '23

Attention is currently required from: Thomas Heijligen, Edward O'Callaghan, Angel Pons. Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/71623 ) Change subject: board_enables: Allow for prog cfg coupling with board cfg ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/71623 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7058a693e714a6966a842ae97cc8da7296e63e5e Gerrit-Change-Number: 71623 Gerrit-PatchSet: 4 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 28 Mar 2023 09:08:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: board_enable.c: Consistent board_flash_enable() nullarity checks
by Edward O'Callaghan (Code Review) 28 Mar '23

28 Mar '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/73454 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: board_enable.c: Consistent board_flash_enable() nullarity checks ...................................................................... board_enable.c: Consistent board_flash_enable() nullarity checks Use a consistent style, as is the case in the Linux kernel, of the canonical form of nullarity checking. Thus, making the function have a overall consistent style. Change-Id: Id28b8b70d9ecc9f69a1b61684500d9c6023ca045 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73454 Reviewed-by: Thomas Heijligen <src(a)posteo.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M board_enable.c 1 file changed, 21 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved diff --git a/board_enable.c b/board_enable.c index bf7897b..abc8b09 100644 --- a/board_enable.c +++ b/board_enable.c @@ -2737,7 +2737,7 @@ const struct board_match *board = NULL; int ret = 0; - if (vendor != NULL && model != NULL) { + if (vendor && model) { board = board_match_name(vendor, model, false); if (!board) { /* If a board was given by the user it has to match, else we abort here. */ msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", @@ -2745,14 +2745,14 @@ return 1; } } - if (board == NULL && cb_vendor != NULL && cb_model != NULL) { + if (!board && cb_vendor && cb_model) { board = board_match_name(cb_vendor, cb_model, true); if (!board) { /* Failure is an option here, because many cb boards don't require an enable. */ msg_pdbg2("No board enable found matching coreboot IDs vendor=\"%s\", model=\"%s\".\n", cb_vendor, cb_model); } } - if (board == NULL) { + if (!board) { board = board_match_pci_ids(P3); if (!board) /* i.e. there is just no board enable available for this board */ return 0; @@ -2765,7 +2765,7 @@ if (board->max_rom_decode_parallel) max_rom_decode.parallel = board->max_rom_decode_parallel * 1024; - if (board->enable != NULL) { + if (board->enable) { msg_pinfo("Enabling full flash access for board \"%s %s\"... ", board->vendor_name, board->board_name); -- To view, visit https://review.coreboot.org/c/flashrom/+/73454 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id28b8b70d9ecc9f69a1b61684500d9c6023ca045 Gerrit-Change-Number: 73454 Gerrit-PatchSet: 4 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: board_enable.c: Clean up board_handle_phase()
by Edward O'Callaghan (Code Review) 28 Mar '23

28 Mar '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/73453 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: board_enable.c: Clean up board_handle_phase() ...................................................................... board_enable.c: Clean up board_handle_phase() The board_enable_safetycheck() call already checks nullarity of the function pointer. Change-Id: I956961ee7204d3a6a9066ba5945f95af1411e700 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73453 Reviewed-by: Thomas Heijligen <src(a)posteo.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M board_enable.c 1 file changed, 17 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved diff --git a/board_enable.c b/board_enable.c index 0531fab..bf7897b 100644 --- a/board_enable.c +++ b/board_enable.c @@ -2707,12 +2707,7 @@ /* FIXME: Should this be identical to board_flash_enable? */ static int board_handle_phase(enum board_match_phase phase, bool force_boardenable) { - const struct board_match *board = NULL; - - board = board_match_pci_ids(phase); - - if (!board) - return 0; + const struct board_match *board = board_match_pci_ids(phase); if (board_enable_safetycheck(board, force_boardenable)) return 0; -- To view, visit https://review.coreboot.org/c/flashrom/+/73453 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I956961ee7204d3a6a9066ba5945f95af1411e700 Gerrit-Change-Number: 73453 Gerrit-PatchSet: 4 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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