February 2023 - flashrom-gerrit

[S] Change in flashrom[master]: flashrom.c: Trivial code style fix
by Sam McNally (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Edward O'Callaghan. Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72968 ) Change subject: flashrom.c: Trivial code style fix ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/72968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iacdb62067a8d22261d4eabe73ad96168eb11417c Gerrit-Change-Number: 72968 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Mon, 13 Feb 2023 04:55:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in flashrom[master]: flashrom.c: Add functions for new erase selection algorithm
by Anastasia Klimchuk (Code Review) 13 Feb '23

13 Feb '23

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/65844 ) Change subject: flashrom.c: Add functions for new erase selection algorithm ...................................................................... flashrom.c: Add functions for new erase selection algorithm 1) Add function to flatten out the addresses of the flash chip as per the different erase functions. This function will return a list of layouts which is dynamically allocated. So after use all the layouts as well as the list itself should be freed. The free_erase_layout function does that. 2) Add function to align start and end address of the region (in struct walk_info) to some erase sector boundaries and modify the region start and end addresses to match nearest erase sector boundaries. This function will be used in the new algorithm for erase function selection. 3) Add function that returns a list of sectors (as seen by the first erase function) that need erasing. 4) Add a function to call the erase algorithm. Change-Id: Ic57ca1cca3d1646543f6b5939ba9c35db8d08256 Signed-off-by: Aarya Chaumal <aarya.chaumal(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/65844 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-by: Thomas Heijligen <src(a)posteo.de> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M Makefile A erasure_layout.c A include/erasure_layout.h M meson.build 4 files changed, 480 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved diff --git a/Makefile b/Makefile index 2ebd370..b37e807 100644 --- a/Makefile +++ b/Makefile @@ -388,7 +388,7 @@ ############################################################################### # Library code. -LIB_OBJS = libflashrom.o layout.o flashrom.o udelay.o parallel.o programmer.o programmer_table.o \ +LIB_OBJS = libflashrom.o layout.o erasure_layout.o flashrom.o udelay.o parallel.o programmer.o programmer_table.o \ helpers.o helpers_fileio.o ich_descriptors.o fmap.o platform/endian_$(ENDIAN).o platform/memaccess.o diff --git a/erasure_layout.c b/erasure_layout.c new file mode 100644 index 0000000..05376de --- /dev/null +++ b/erasure_layout.c @@ -0,0 +1,406 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2022 Aarya Chaumal + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <limits.h> +#include <stdbool.h> +#include <stdlib.h> +#include <limits.h> +#include <string.h> + +#include "include/flash.h" +#include "include/layout.h" +#include "include/erasure_layout.h" + +static size_t calculate_block_count(const struct flashchip *chip, size_t eraser_idx) +{ + size_t block_count = 0; + + chipoff_t addr = 0; + for (size_t i = 0; addr < chip->total_size * 1024; i++) { + const struct eraseblock *block = &chip->block_erasers[eraser_idx].eraseblocks[i]; + block_count += block->count; + addr += block->size * block->count; + } + + return block_count; +} + +static void init_eraseblock(struct erase_layout *layout, size_t idx, size_t block_num, + chipoff_t start_addr, chipoff_t end_addr, size_t *sub_block_index) +{ + struct eraseblock_data *edata = &layout[idx].layout_list[block_num]; + edata->start_addr = start_addr; + edata->end_addr = end_addr; + edata->selected = false; + edata->block_num = block_num; + + if (!idx) + return; + + edata->first_sub_block_index = *sub_block_index; + struct eraseblock_data *subedata = &layout[idx - 1].layout_list[*sub_block_index]; + while (subedata->start_addr >= start_addr && subedata->end_addr <= end_addr && + *sub_block_index < layout[idx-1].block_count) { + (*sub_block_index)++; + subedata++; + } + edata->last_sub_block_index = *sub_block_index - 1; +} + +/* + * @brief Function to free the created erase_layout + * + * @param layout pointer to allocated layout + * @param erasefn_count number of erase functions for which the layout was created + * + */ +void free_erase_layout(struct erase_layout *layout, unsigned int erasefn_count) +{ + if (!layout) + return; + for (size_t i = 0; i < erasefn_count; i++) { + free(layout[i].layout_list); + } + free(layout); +} + +/* + * @brief Function to create an erase layout + * + * @param flashctx flash context + * @param e_layout address to the pointer to store the layout + * @return 0 on success, + * -1 if layout creation fails + * + * This function creates a layout of which erase functions erase which regions + * of the flash chip. This helps to optimally select the erase functions for + * erase/write operations. + */ +int create_erase_layout(struct flashctx *const flashctx, struct erase_layout **e_layout) +{ + const struct flashchip *chip = flashctx->chip; + const size_t erasefn_count = count_usable_erasers(flashctx); + struct erase_layout *layout = calloc(erasefn_count, sizeof(struct erase_layout)); + + if (!layout) { + msg_gerr("Out of memory!\n"); + return -1; + } + + if (!erasefn_count) { + msg_gerr("No erase functions supported\n"); + return 0; + } + + size_t layout_idx = 0; + for (size_t eraser_idx = 0; eraser_idx < NUM_ERASEFUNCTIONS; eraser_idx++) { + if (check_block_eraser(flashctx, eraser_idx, 0)) + continue; + + layout[layout_idx].eraser = &chip->block_erasers[eraser_idx]; + const size_t block_count = calculate_block_count(flashctx->chip, eraser_idx); + size_t sub_block_index = 0; + + layout[layout_idx].block_count = block_count; + layout[layout_idx].layout_list = (struct eraseblock_data *)calloc(block_count, + sizeof(struct eraseblock_data)); + + if (!layout[layout_idx].layout_list) { + free_erase_layout(layout, layout_idx); + return -1; + } + + size_t block_num = 0; + chipoff_t start_addr = 0; + + for (int i = 0; block_num < block_count; i++) { + const struct eraseblock *block = &chip->block_erasers[eraser_idx].eraseblocks[i]; + + for (size_t num = 0; num < block->count; num++) { + chipoff_t end_addr = start_addr + block->size - 1; + init_eraseblock(layout, layout_idx, block_num, + start_addr, end_addr, &sub_block_index); + block_num += 1; + start_addr = end_addr + 1; + } + } + layout_idx++; + } + + *e_layout = layout; + return layout_idx; +} + +/* + * @brief Function to align start and address of the region boundaries + * + * @param layout erase layout + * @param flashctx flash context + * @param region_start pointer to start address of the region to align + * @param region_end pointer to end address of the region to align + * + * This function aligns start and end address of the region (in struct walk_info) + * to some erase sector boundaries and modify the region start and end addresses + * to match nearest erase sector boundaries. This function will be used in the + * new algorithm for erase function selection. + */ +static void align_region(const struct erase_layout *layout, struct flashctx *const flashctx, + chipoff_t *region_start, chipoff_t *region_end) +{ + chipoff_t start_diff = UINT_MAX, end_diff = UINT_MAX; + const size_t erasefn_count = count_usable_erasers(flashctx); + for (size_t i = 0; i < erasefn_count; i++) { + for (size_t j = 0; j < layout[i].block_count; j++) { + const struct eraseblock_data *ll = &layout[i].layout_list[j]; + if (ll->start_addr <= *region_start) + start_diff = (*region_start - ll->start_addr) > start_diff ? + start_diff : (*region_start - ll->start_addr); + if (ll->end_addr >= *region_end) + end_diff = (ll->end_addr - *region_end) > end_diff ? + end_diff : (ll->end_addr - *region_end); + } + } + + if (start_diff) { + msg_cinfo("Region start not sector aligned! Extending start boundaries...\n"); + *region_start = *region_start - start_diff; + } + if (end_diff) { + msg_cinfo("Region end not sector aligned! Extending end boundaries...\n"); + *region_end = *region_end + end_diff; + } +} + +/* + * @brief Function to select the list of sectors that need erasing + * + * @param flashctx flash context + * @param layout erase layout + * @param findex index of the erase function + * @param block_num index of the block to erase according to the erase function index + * @param curcontents buffer containg the current contents of the flash + * @param newcontents buffer containg the new contents of the flash + * @param rstart start address of the region + * @rend rend end address of the region + */ +static void select_erase_functions(struct flashctx *flashctx, const struct erase_layout *layout, + size_t findex, size_t block_num, uint8_t *curcontents, uint8_t *newcontents, + chipoff_t rstart, chipoff_t rend) +{ + struct eraseblock_data *ll = &layout[findex].layout_list[block_num]; + if (!findex) { + if (ll->start_addr >= rstart && ll->end_addr <= rend) { + chipoff_t start_addr = ll->start_addr; + chipoff_t end_addr = ll->end_addr; + const chipsize_t erase_len = end_addr - start_addr + 1; + const uint8_t erased_value = ERASED_VALUE(flashctx); + ll->selected = need_erase(curcontents + start_addr, newcontents + start_addr, erase_len, + flashctx->chip->gran, erased_value); + } + } else { + int count = 0; + const int sub_block_start = ll->first_sub_block_index; + const int sub_block_end = ll->last_sub_block_index; + + for (int j = sub_block_start; j <= sub_block_end; j++) { + select_erase_functions(flashctx, layout, findex - 1, j, curcontents, newcontents, + rstart, rend); + if (layout[findex - 1].layout_list[j].selected) + count++; + } + + const int total_blocks = sub_block_end - sub_block_start + 1; + if (count && count > total_blocks/2) { + if (ll->start_addr >= rstart && ll->end_addr <= rend) { + for (int j = sub_block_start; j <= sub_block_end; j++) + layout[findex - 1].layout_list[j].selected = false; + ll->selected = true; + } + } + } +} + +/* + * @brief wrapper to use the erase algorithm + * + * @param flashctx flash context + * @param region_start start address of the region + * @param region_end end address of the region + * @param curcontents buffer containg the current contents of the flash + * @param newcontents buffer containg the new contents of the flash + * @param erase_layout erase layout + * @param all_skipped pointer to the flag to chec if any block was erased + */ +int erase_write(struct flashctx *const flashctx, chipoff_t region_start, chipoff_t region_end, + uint8_t *curcontents, uint8_t *newcontents, + struct erase_layout *erase_layout, bool *all_skipped) +{ + const size_t erasefn_count = count_usable_erasers(flashctx); + int ret = 0; + size_t i; + chipoff_t old_start = region_start, old_end = region_end; + align_region(erase_layout, flashctx, &region_start, &region_end); + + uint8_t *old_start_buf = NULL, *old_end_buf = NULL; + old_start_buf = (uint8_t *)malloc(old_start - region_start); + if (!old_start_buf) { + msg_cerr("Not enough memory!\n"); + ret = -1; + goto _end; + } + old_end_buf = (uint8_t *)malloc(region_end - old_end); + if (!old_end_buf) { + msg_cerr("Not enough memory!\n"); + ret = -1; + goto _end; + } + + if (old_start - region_start) { + read_flash(flashctx, curcontents + region_start, region_start, old_start - region_start); + memcpy(old_start_buf, newcontents + region_start, old_start - region_start); + memcpy(newcontents + region_start, curcontents + region_start, old_start - region_start); + } + if (region_end - old_end) { + read_flash(flashctx, curcontents + old_end, old_end, region_end - old_end); + memcpy(old_end_buf, newcontents + old_end, region_end - old_end); + memcpy(newcontents + old_end, curcontents + old_end, region_end - old_end); + } + + // select erase functions + for (i = 0; i < erase_layout[erasefn_count - 1].block_count; i++) { + if (erase_layout[erasefn_count - 1].layout_list[i].start_addr <= region_end && + region_start <= erase_layout[erasefn_count - 1].layout_list[i].end_addr) + select_erase_functions(flashctx, erase_layout, + erasefn_count - 1, i, + curcontents, newcontents, + region_start, region_end); + } + + for (i = 0; i < erasefn_count; i++) { + for (size_t j = 0; j < erase_layout[i].block_count; j++) { + if (!erase_layout[i].layout_list[j].selected) continue; + + // erase + chipoff_t start_addr = erase_layout[i].layout_list[j].start_addr; + unsigned int block_len = erase_layout[i].layout_list[j].end_addr - start_addr + 1; + const uint8_t erased_value = ERASED_VALUE(flashctx); + // execute erase + erasefunc_t *erasefn = lookup_erase_func_ptr(erase_layout[i].eraser); + + if (!flashctx->flags.skip_unwritable_regions) { + if (check_for_unwritable_regions(flashctx, start_addr, block_len)) + goto _end; + } + + unsigned int len; + for (unsigned int addr = start_addr; addr < start_addr + block_len; addr += len) { + struct flash_region region; + get_flash_region(flashctx, addr, &region); + + len = min(start_addr + block_len, region.end) - addr; + + if (region.write_prot) { + msg_gdbg("%s: cannot erase inside %s " + "region (%#08x..%#08x), skipping range (%#08x..%#08x).\n", + __func__, region.name, + region.start, region.end - 1, + addr, addr + len - 1); + free(region.name); + continue; + } + + msg_gdbg("%s: %s region (%#08x..%#08x) is " + "writable, erasing range (%#08x..%#08x).\n", + __func__, region.name, + region.start, region.end - 1, + addr, addr + len - 1); + free(region.name); + + if (erasefn(flashctx, addr, len)) + goto _end; + if (check_erased_range(flashctx, addr, len)) { + msg_cerr("ERASE FAILED!\n"); + goto _end; + } + } + + ret = erasefn(flashctx, start_addr, block_len); + if (ret) { + msg_cerr("Failed to execute erase command " + "for offset %#x to %#x.\n", + start_addr, start_addr + block_len); + ret = -1; + goto _end; + } + + // adjust curcontents + memset(curcontents+start_addr, erased_value, block_len); + // after erase make it unselected again + erase_layout[i].layout_list[j].selected = false; + msg_cdbg("E(%x:%x)", start_addr, start_addr + block_len - 1); + // verify erase + ret = check_erased_range(flashctx, start_addr, block_len); + if (ret) { + msg_cerr("Verifying flash. Erase failed for range %#x : %#x, Abort.\n", + start_addr, start_addr + block_len - 1); + goto _end; + } + + *all_skipped = false; + } + } + + // write + unsigned int start_here = 0, len_here = 0, erase_len = region_end - region_start + 1; + while ((len_here = get_next_write(curcontents + region_start + start_here, + newcontents + region_start + start_here, + erase_len - start_here, &start_here, + flashctx->chip->gran))) { + // execute write + ret = write_flash(flashctx, + newcontents + region_start + start_here, + region_start + start_here, len_here); + if (ret) { + msg_cerr("Write failed at %#zx, Abort.\n", i); + ret = -1; + goto _end; + } + + // adjust curcontents + memcpy(curcontents + region_start + start_here, + newcontents + region_start + start_here, len_here); + msg_cdbg("W(%x:%x)", region_start + start_here, region_start + start_here + len_here - 1); + + *all_skipped = false; + } + // verify write + ret = verify_range(flashctx, newcontents + region_start, region_start, region_end - region_start); + if (ret) { + msg_cerr("Verifying flash. Write failed for range %#x : %#x, Abort.\n", + region_start, region_end); + goto _end; + } + +_end: + memcpy(newcontents + region_start, old_start_buf, old_start - region_start); + memcpy(newcontents + old_end, old_end_buf, region_end - old_end); + + free(old_start_buf); + free(old_end_buf); + + msg_cinfo("Erase/write done from %x to %x\n", region_start, region_end); + return ret; +} diff --git a/include/erasure_layout.h b/include/erasure_layout.h new file mode 100644 index 0000000..b8b5f08 --- /dev/null +++ b/include/erasure_layout.h @@ -0,0 +1,41 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2022 Aarya Chaumal + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ERASURE_LAYOUT_H__ +#define __ERASURE_LAYOUT_H__ 1 + +struct eraseblock_data { + chipoff_t start_addr; + chipoff_t end_addr; + bool selected; + size_t block_num; + size_t first_sub_block_index; + size_t last_sub_block_index; +}; + +struct erase_layout { + struct eraseblock_data* layout_list; + size_t block_count; + const struct block_eraser *eraser; +}; + +void free_erase_layout(struct erase_layout *layout, unsigned int erasefn_count); +int create_erase_layout(struct flashctx *const flashctx, struct erase_layout **erase_layout); +int erase_write(struct flashctx *const flashctx, chipoff_t region_start, chipoff_t region_end, + uint8_t* curcontents, uint8_t* newcontents, + struct erase_layout *erase_layout, bool *all_skipped); + +#endif /* !__ERASURE_LAYOUT_H__ */ diff --git a/meson.build b/meson.build index 57ac438..2575fe1 100644 --- a/meson.build +++ b/meson.build @@ -53,6 +53,7 @@ 'bitbang_spi.c', 'edi.c', 'en29lv640b.c', + 'erasure_layout.c', 'flashchips.c', 'flashrom.c', 'fmap.c', -- To view, visit https://review.coreboot.org/c/flashrom/+/65844 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic57ca1cca3d1646543f6b5939ba9c35db8d08256 Gerrit-Change-Number: 65844 Gerrit-PatchSet: 89 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: flashrom.c: Add switch for legacy impl of erasure path
by Anastasia Klimchuk (Code Review) 13 Feb '23

13 Feb '23

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/71119 ) Change subject: flashrom.c: Add switch for legacy impl of erasure path ...................................................................... flashrom.c: Add switch for legacy impl of erasure path As part of a GSoC project to optimise the erasure path in flashrom a completely different algorithm is used to perform erasure. Therefore we need a mechanism to have the two implementations side by side to allow for A/B testing and easy reverts should issue arise. Change-Id: Ib5660db0067c1c799dcb5c8e83b4a4826b236442 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/71119 Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-by: Thomas Heijligen <src(a)posteo.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M flashrom.c 1 file changed, 40 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved diff --git a/flashrom.c b/flashrom.c index f26bb47..1790ad9 100644 --- a/flashrom.c +++ b/flashrom.c @@ -34,6 +34,8 @@ #include "hwaccess_physmap.h" #include "chipdrivers.h" +static bool use_legacy_erase_path = true; + const char flashrom_version[] = FLASHROM_VERSION; static const struct programmer_entry *programmer = NULL; @@ -1528,13 +1530,20 @@ * @return 0 on success, * 1 if all available erase functions failed. */ -static int erase_by_layout(struct flashctx *const flashctx) +static int erase_by_layout_legacy(struct flashctx *const flashctx) { struct walk_info info = { 0 }; bool all_skipped = true; return walk_by_layout(flashctx, &info, &erase_block, &all_skipped); } +static int erase_by_layout(struct flashctx *const flashctx) +{ + if (use_legacy_erase_path) + return erase_by_layout_legacy(flashctx); + return 1; /* unimplemented. */ +} + static int read_erase_write_block(struct flashctx *const flashctx, const struct walk_info *const info, const erasefn_t erasefn, bool *all_skipped) @@ -1643,7 +1652,7 @@ * @return 0 on success, * 1 if anything has gone wrong. */ -static int write_by_layout(struct flashctx *const flashctx, +static int write_by_layout_legacy(struct flashctx *const flashctx, void *const curcontents, const void *const newcontents, bool *all_skipped) { @@ -1653,6 +1662,15 @@ return walk_by_layout(flashctx, &info, read_erase_write_block, all_skipped); } +static int write_by_layout(struct flashctx *const flashctx, + uint8_t *const curcontents, const uint8_t *const newcontents, + bool *all_skipped) +{ + if (use_legacy_erase_path) + return write_by_layout_legacy(flashctx, curcontents, newcontents, all_skipped); + return 1; /* unimplemented. */ +} + /** * @brief Compares the included layout regions with content from a buffer. * -- To view, visit https://review.coreboot.org/c/flashrom/+/71119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib5660db0067c1c799dcb5c8e83b4a4826b236442 Gerrit-Change-Number: 71119 Gerrit-PatchSet: 15 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: flashrom.c: Trivial code style fix
by Edward O'Callaghan (Code Review) 13 Feb '23

13 Feb '23

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/72968 ) Change subject: flashrom.c: Trivial code style fix ...................................................................... flashrom.c: Trivial code style fix Change-Id: Iacdb62067a8d22261d4eabe73ad96168eb11417c Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M flashrom.c 1 file changed, 11 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/68/72968/1 diff --git a/flashrom.c b/flashrom.c index f26bb47..9a0cb4c 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1279,8 +1279,7 @@ ret = 1; } } - if(curr_eraseblock_count > prev_eraseblock_count) - { + if (curr_eraseblock_count > prev_eraseblock_count) { msg_gerr("ERROR: Flash chip %s erase function %i is not " "in order. Please report a bug at flashrom(a)flashrom.org\n", chip->name, k); -- To view, visit https://review.coreboot.org/c/flashrom/+/72968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iacdb62067a8d22261d4eabe73ad96168eb11417c Gerrit-Change-Number: 72968 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in flashrom[master]: cli_classic.c: Drop spurious cast
by Sam McNally (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Edward O'Callaghan. Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72966 ) Change subject: cli_classic.c: Drop spurious cast ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/72966 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia3a658dd6f4986eb6da84a11bce66f53e1571469 Gerrit-Change-Number: 72966 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Mon, 13 Feb 2023 02:35:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: Add support for AMD Ryzen flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Arthur Heymans, Nicholas Chin. ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72058 ) Change subject: Add support for AMD Ryzen flashing ...................................................................... Patch Set 3: (1 comment) Commit Message: PS1: > Please remove the extra newlines in the commit body (everything after the commit summary and before […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/72058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ife51f7dec31b51a7416e417112b0eedb21fae6a0 Gerrit-Change-Number: 72058 Gerrit-PatchSet: 3 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 02:27:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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[L] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Patch Set 3: (1 comment) Commit Message: PS1: > Please remove the extra newlines in the commit body (everything after the commit summary and before […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 3 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 02:27:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: Add missing Intel B460 flash chip id.
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Nicholas Chin. ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72056 ) Change subject: Add missing Intel B460 flash chip id. ...................................................................... Patch Set 3: (1 comment) Commit Message: PS1: > Please remove the extra newlines in the commit body (everything after the commit summary and before […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/72056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id8fcb59d5dbafea3e79c4e3ad75484bbd163feca Gerrit-Change-Number: 72056 Gerrit-PatchSet: 3 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 02:27:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: cli_classic.c: Drop spurious cast
by Edward O'Callaghan (Code Review) 13 Feb '23

13 Feb '23

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/72966 ) Change subject: cli_classic.c: Drop spurious cast ...................................................................... cli_classic.c: Drop spurious cast This cast should not be required. Change-Id: Ia3a658dd6f4986eb6da84a11bce66f53e1571469 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M cli_classic.c 1 file changed, 13 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/66/72966/1 diff --git a/cli_classic.c b/cli_classic.c index c72836f..da68919 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -662,8 +662,7 @@ * chip when a flash device gets opened with fd 1 or 2. */ if (check_file(stdout) && check_file(stderr)) { - flashrom_set_log_callback( - (flashrom_log_callback *)&flashrom_print_cb); + flashrom_set_log_callback(&flashrom_print_cb); } print_version(); -- To view, visit https://review.coreboot.org/c/flashrom/+/72966 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia3a658dd6f4986eb6da84a11bce66f53e1571469 Gerrit-Change-Number: 72966 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[L] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Thomas Heijligen. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#2). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able read read, erase, write, verify. Only thing is the WP with the W25X10 gives a untested warning. And I changed W25X10 to RDID4 since it wouldn't work otherwise. Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M Makefile M flashchips.c M flashrom.8.tmpl M include/programmer.h M programmer_table.c A vl805.c 6 files changed, 259 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 2 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: newpatchset

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