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Change subject: ichspi: Add support for C740 PCH
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
Besides the issue Kyösti pointed out, this looks reasonable.
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Change subject: ichspi: Add support for C740 PCH
......................................................................
Patch Set 1:
(1 comment)
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/78186/comment/9a7a6b03_62046655 :
PS1, Line 1032: if (content->ISL == 0x50)
That's 80 in decimal and is hit with <= 80 above?
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Change subject: flashchips: Add write-protect support for MXIC MX25U25643G
......................................................................
Patch Set 5: Code-Review+2
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Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, Thomas Heijligen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/78142?usp=email
to look at the new patch set (#5).
Change subject: flashchips: Add write-protect support for MXIC MX25U25643G
......................................................................
flashchips: Add write-protect support for MXIC MX25U25643G
The MX25U25643G has a WPSEL bit in the security register, but the MX25U25635F does not.
Therefore, take them apart.
We have tested --wp-enable, --wp-disable, --wp-list and --wp-range
commands for write-protect feature.
The MX25U25643G has been tested by ch341a programmer : read, write,
erase and wp.
MX25U25643G datasheet is available at the following URL:
https://www.mxic.com.tw/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/spe…
MX25U25635F datasheet is available at the following URL:
https://www.macronix.com/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/sp…
Change-Id: I43de9ed123b9736c04d070754bcf9c32be5697ad
Signed-off-by: rogeryou <rogeryou(a)mxic.com.cn>
---
M flashchips.c
1 file changed, 58 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/42/78142/5
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Change subject: flashchips: Add write-protect support for MXIC MX25U25643G
......................................................................
Patch Set 4:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/78142/comment/ca23a22a_b57abdb6 :
PS2, Line 7: Test MXIC MX25U25643G wp
> replace with: […]
Done
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/78142/comment/dfaed97e_940a231b :
PS2, Line 10308: STATUS2
> Should this be CONFIG ? TB bit is defined in configuration register (Table 8). […]
Done
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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/78142?usp=email
to look at the new patch set (#4).
Change subject: flashchips: Add write-protect support for MXIC MX25U25643G
......................................................................
flashchips: Add write-protect support for MXIC MX25U25643G
The MX25U25643G has a WPSEL bit in the security register, but the MX25U25635F does not.
Therefore, take them apart.
The MX25U25643G has been tested by ch341a programmer : read, write, erase and wp.
The MX25U25643G has been tested by ch341a programmer : read, write,
erase and wp.
MX25U25643G datasheet is available at the following URL:
https://www.mxic.com.tw/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/spe…
MX25U25635F datasheet is available at the following URL:
https://www.macronix.com/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/sp…
Change-Id: I43de9ed123b9736c04d070754bcf9c32be5697ad
Signed-off-by: rogeryou <rogeryou(a)mxic.com.cn>
---
M flashchips.c
1 file changed, 58 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/42/78142/4
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Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: flashchips: Add write-protect support for MXIC MX25U25643G
......................................................................
flashchips: Add write-protect support for MXIC MX25U25643G
The MX25U25643G has a WPSEL bit in the security register, but the MX25U25635F does not.
Therefore, take them apart.
The MX25U25643G has been tested by ch341a programmer : read, write, erase and wp.
We have tested --wp-enable, --wp-disable, --wp-list and --wp-range
commands for write-protect feature.
MX25U25643G datasheet is available at the following URL:
https://www.mxic.com.tw/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/spe…
MX25U25635F datasheet is available at the following URL:
https://www.macronix.com/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/sp…
Change-Id: I43de9ed123b9736c04d070754bcf9c32be5697ad
Signed-off-by: rogeryou <rogeryou(a)mxic.com.cn>
---
M doc/contact.rst
M doc/dev_guide/development_guide.rst
M doc/index.rst
A doc/release_notes/index.rst
A doc/release_notes/v_1_3.rst
A doc/user_docs/example_partial_wp.rst
A doc/user_docs/fw_updates_vs_spi_wp.rst
A doc/user_docs/index.rst
M flashchips.c
9 files changed, 599 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/42/78142/3
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Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/78188?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: doc: Make Time of Meeting more consistent
......................................................................
doc: Make Time of Meeting more consistent
Change-Id: I8b37d2913750946c71908e94fcd3041766f1b59d
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/78188
Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M doc/contact.rst
1 file changed, 7 insertions(+), 7 deletions(-)
Approvals:
build bot (Jenkins): Verified
Anastasia Klimchuk: Looks good to me, approved
diff --git a/doc/contact.rst b/doc/contact.rst
index 5bcac3f..57a9390 100644
--- a/doc/contact.rst
+++ b/doc/contact.rst
@@ -111,19 +111,19 @@
also known as
- | Wednesday 13.00-14.00 Pacific Standard Time UTC-8
- | Wednesday 22.00-23.00 Central European Time UTC+1
- | Thursday 8.00-9.00am Australian Eastern Daylight Time UTC+11
+ | Wednesday 13:00-14:00 Pacific Standard Time UTC-8
+ | Wednesday 22:00-23:00 Central European Time UTC+1
+ | Thursday 8:00-9:00 Australian Eastern Daylight Time UTC+11
Between April and September (inclusive)
- **Thursday 6.00-7.00am UTC+0**
+ **Thursday 6:00-7:00 UTC+0**
also known as
- | Wednesday 11pm-midnight Pacific Daylight Time UTC-7
- | Thursday 8.00-9.00am Central European Summer Time UTC+2
- | Thursday 16.00-17.00 Australian Eastern Standard Time UTC+10
+ | Wednesday 23:00-midnight Pacific Daylight Time UTC-7
+ | Thursday 8:00-9:00 Central European Summer Time UTC+2
+ | Thursday 16:00-17:00 Australian Eastern Standard Time UTC+10
The last week of March and 4 weeks of October there are no meetings
This is because daylight saving time changes are happening on different dates in different locations, and setting up meeting time becomes too complicated.
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Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/77887?usp=email )
Change subject: flashrom_tester: Align WP output format with upstream
......................................................................
Patch Set 2: Code-Review+1
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