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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67354 )
Change subject: spi.c: Add erasefn and opcodes for AT45 and S25F to lookup list
......................................................................
Patch Set 9:
(2 comments)
File sfdp.c:
https://review.coreboot.org/c/flashrom/+/67354/comment/e26c7267_34b9e5fd
PS9, Line 80: add
This function fills the erasers of `chip`. So it cannot rely on existing
erasers in there.
File spi.c:
https://review.coreboot.org/c/flashrom/+/67354/comment/4e146537_5c50266f
PS9, Line 102: }
I'm sorry. I did not realize until now that it's impossible to
implement this function with the `function_opcode_list` for
spi_get_opcode_from_erasefn(). If there is no 1:1 mapping (for
this list), it just can't work. The only use of this function
is for spi25 chips and it needs exactly the signature that it
had so far.
So again, I think it's best to leave spi_get_erasefn_from_opcode()
in `spi25.c`, with the original list. We can surely rename it to
spi25_* to avoid further confusion (it's just not as generic as
the spi_ prefix suggests; doesn't have to be).
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Hello build bot (Jenkins), Simon Buhrow, Nico Huber, Thomas Heijligen,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/67354
to look at the new patch set (#10).
Change subject: spi.c: Add erasefn and opcodes for AT45 and S25F to lookup list
......................................................................
spi.c: Add erasefn and opcodes for AT45 and S25F to lookup list
Add opcode and erasefn for AT45 and S25F to the
spi_get_[opcode/erasefn]_from[erasefn/opcode] lookup list. Also
AT45CS1282 uses multiple opcodes in it's erasefn so modifying
aforementioned functions and the lookup list to use a list of opcodes
rather than a single opcode.
The lookup list and the passed lookup list must have opcodes in sorted
order and must be '0' terminated. Also size of the opcode list in the
lookup table must be one more than the maximum opcodes used by any
erasefn.
Change-Id: Ief25932120f940dea0ffe161a79219deecb2e8ab
Signed-off-by: Aarya Chaumal <aarya.chaumal(a)gmail.com>
---
M include/chipdrivers.h
M sfdp.c
M spi.c
3 files changed, 102 insertions(+), 27 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/67354/10
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Hello build bot (Jenkins), Simon Buhrow, Nico Huber, Thomas Heijligen,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/66717
to look at the new patch set (#12).
Change subject: flashrom.c: Update check_block_eraser function to use probe opcode
......................................................................
flashrom.c: Update check_block_eraser function to use probe opcode
Update the check_block_eraser function to use probe_opcode to see if the
given block_eraser is supported by the spi master. This will help to get
a real count of usable block_erasers.
Change-Id: I6591a84ae1fe5bc1648051cc30b9393450033852
Signed-off-by: Aarya Chaumal <aarya.chaumal(a)gmail.com>
---
M dummyflasher.c
M flashrom.c
M ichspi.c
M include/programmer.h
M spi.c
5 files changed, 31 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/17/66717/12
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Change subject: TEST_ERASE_ALGO: A list of test cases (patch not to be merged)
......................................................................
Patch Set 46:
(2 comments)
File Makefile:
https://review.coreboot.org/c/flashrom/+/66718/comment/c3af0f25_4f77eadb
PS44, Line 33: -g
> This is not part of the patch. Please remove it.
Done
File TEST_ERASE_ALGO.md:
https://review.coreboot.org/c/flashrom/+/66718/comment/a1f98e07_3ece0271
PS44, Line 3: </br>
> please remove those
Done
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Hello build bot (Jenkins), Simon Buhrow, Thomas Heijligen,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#46).
Change subject: TEST_ERASE_ALGO: A list of test cases (patch not to be merged)
......................................................................
TEST_ERASE_ALGO: A list of test cases (patch not to be merged)
Add a list of test cases for testing the new erase function selection
algorithm. Suggest more test cases if you can. Report success/failure of
test cases here to fix the algorithm.
Note: This patch will not be merged.
Change-Id: I5e961752b9d24d28fdd3487a1a121391f149928b
Signed-off-by: Aarya Chaumal <aarya.chaumal(a)gmail.com>
---
A TEST_ERASE_ALGO.md
1 file changed, 137 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/18/66718/46
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Aarya has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67354 )
Change subject: spi.c: Add erasefn and opcodes for AT45 and S25F to lookup list
......................................................................
Patch Set 9:
(8 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/67354/comment/3ab6a379_dfaa40a5
PS2, Line 7: spi.c: Add erasefn and opcodes for AT45 and S25F
> To what? / To which lookup list?
Done
Patchset:
PS8:
> Can you reorder the commits that this patch comes after the other spi. […]
Done
File spi.c:
https://review.coreboot.org/c/flashrom/+/67354/comment/94811df0_9b4e79ab
PS2, Line 50: &spi_erase_at45cs_sector, 0x50},
> That could work too. Given that the chip has only a single erasefunc, […]
Done
File spi.c:
https://review.coreboot.org/c/flashrom/+/67354/comment/0e9d6805_3bfbab00
PS8, Line 31: uint8_t opcode[MAX_OPCODE];
> Please add a comment how the array is working
Done
https://review.coreboot.org/c/flashrom/+/67354/comment/2737bfbb_b9709799
PS8, Line 31: [MAX_OPCODE
> This can be an inline number or defined locally.
Done
https://review.coreboot.org/c/flashrom/+/67354/comment/2da1296a_6b5d1b4e
PS8, Line 49: 0x00}
> Just use `0` to make clear it's a terminator
Done
https://review.coreboot.org/c/flashrom/+/67354/comment/f0e43da9_85fcdb90
PS8, Line 70: )
> Would be good to have the length of the list (`opcode_count`) as parameter. […]
Done
https://review.coreboot.org/c/flashrom/+/67354/comment/fd750eac_7d69ac47
PS8, Line 85:
> Please add documentation about the function that everyone who want's to use or work with it understa […]
Done
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Hello build bot (Jenkins), Simon Buhrow, Nico Huber, Thomas Heijligen,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/67354
to look at the new patch set (#9).
Change subject: spi.c: Add erasefn and opcodes for AT45 and S25F to lookup list
......................................................................
spi.c: Add erasefn and opcodes for AT45 and S25F to lookup list
Add opcode and erasefn for AT45 and S25F to the
spi_get_[opcode/erasefn]_from[erasefn/opcode] lookup list. Also
AT45CS1282 uses multiple opcodes in it's erasefn so modifying
aforementioned functions and the lookup list to use a list of opcodes
rather than a single opcode.
The lookup list and the passed lookup list must have opcodes in sorted
order and must be '0' terminated. Also size of the opcode list in the
lookup table must be one more than the maximum opcodes used by any
erasefn.
Change-Id: Ief25932120f940dea0ffe161a79219deecb2e8ab
Signed-off-by: Aarya Chaumal <aarya.chaumal(a)gmail.com>
---
M include/chipdrivers.h
M sfdp.c
M spi.c
3 files changed, 100 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/67354/9
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/66547 )
Change subject: print.c: Fix format string for Windows
......................................................................
Patch Set 6: Code-Review+2
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