Felix Singer has submitted this change. ( https://review.coreboot.org/c/flashrom/+/67873 )
Change subject: flashrom.8: add missing entry for `--flash-contents`
......................................................................
flashrom.8: add missing entry for `--flash-contents`
Change-Id: I64a8200a86329bd26a2069c5dc39430de9f8ba09
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57807
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67873
Reviewed-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
---
M flashrom.8.tmpl
1 file changed, 23 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
Angel Pons: Looks good to me, approved
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl
index aa5bcd4..959e5fd 100644
--- a/flashrom.8.tmpl
+++ b/flashrom.8.tmpl
@@ -250,6 +250,13 @@
.B "\-\-flash\-size"
Prints out the detected flash chips size.
.TP
+.B "\-\-flash\-contents <ref\-file>"
+The file contents of
+.BR <ref\-file>
+will be used to decide which parts of the flash need to be written. Providing
+this saves an initial read of the full flash chip. Be careful, if the provided
+data doesn't actually match the flash contents, results are undefined.
+.TP
.B "\-L, \-\-list\-supported"
List the flash chips, chipsets, mainboards, and external programmers
(including PCI, USB, parallel port, and serial port based devices)
--
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Gerrit-Project: flashrom
Gerrit-Branch: 1.2.x
Gerrit-Change-Id: I64a8200a86329bd26a2069c5dc39430de9f8ba09
Gerrit-Change-Number: 67873
Gerrit-PatchSet: 2
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: merged
Felix Singer has submitted this change. ( https://review.coreboot.org/c/flashrom/+/67872 )
Change subject: jlink_spi: Reduce transfer size
......................................................................
jlink_spi: Reduce transfer size
The maximum transfer size is too large for some devices and
results in an USB timeout.
Change-Id: If2c00b1524ec56740bdfe290096c3546cf375d73
Signed-off-by: Marc Schink <dev(a)zapb.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48379
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Miklós Márton <martonmiklosqdev(a)gmail.com>
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67872
Reviewed-by: Felix Singer <felixsinger(a)posteo.net>
---
M jlink_spi.c
1 file changed, 20 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
Angel Pons: Looks good to me, approved
diff --git a/jlink_spi.c b/jlink_spi.c
index 8a69b41..00e9c6d 100644
--- a/jlink_spi.c
+++ b/jlink_spi.c
@@ -34,7 +34,7 @@
* Maximum number of bytes that can be transferred at once via the JTAG
* interface, see jaylink_jtag_io().
*/
-#define JTAG_MAX_TRANSFER_SIZE (UINT16_MAX / 8)
+#define JTAG_MAX_TRANSFER_SIZE (32768 / 8)
/*
* Default base frequency in Hz. Used when the base frequency can not be
--
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Gerrit-Branch: 1.2.x
Gerrit-Change-Id: If2c00b1524ec56740bdfe290096c3546cf375d73
Gerrit-Change-Number: 67872
Gerrit-PatchSet: 2
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Reviewer: zapb <dev(a)zapb.de>
Gerrit-MessageType: merged
Felix Singer has submitted this change. ( https://review.coreboot.org/c/flashrom/+/67871 )
Change subject: linux_mtd: Disable buffering on the mtd device
......................................................................
linux_mtd: Disable buffering on the mtd device
We open the device node for the MTD device with this:
dev_fp = fopen(dev_path, "r+")
In C fopen() is allowed to provide _buffered_ access to the file.
That means that the standard library is allowed to read ahead and/or
return cached data. That's really not what we want for something like
this. Let's turn it off.
This fixes a problem where flashrom would sometimes fail to "verify"
that it erased the flash. The error message would look something like
this:
Erasing and writing flash chip... FAILED at 0x0000e220! Expected=0xff, Found=0xe9, failed byte count from 0x0000e200-0x0000e2ff: 0xdc
failed byte count from 0x0000e000-0x0000efff: 0xffffffff
ERASE_FAILED
FAILED!
Uh oh. Erase/write failed. Checking if anything changed.
After the failure I could read the flash device with a new invocation
of flashrom and I would see that, indeed, the erase had worked.
Tracing in the kernel showed that when the failure happened we saw a
pattern that looked like this:
* Read 0x0b00 bytes starting at 0x0000d000
* Read 0x1000 bytes starting at 0x0000db00
* Erase 0x1000 bytes starting at 0x0000e000
...and then there was _not_ a read after the erase. It can be assumed
that, since userspace had already read 0xdb00 - 0xeaff that it was
looking at old buffered data after the erase.
Signed-off-by: Douglas Anderson <dianders(a)chromium.org>
Change-Id: I989afd83a33013b2756a0090d6b08245613215c6
Reviewed-on: https://review.coreboot.org/c/flashrom/+/50155
Reviewed-by: Hung-Te Lin <hungte(a)chromium.org>
Reviewed-by: Patrick Rudolph <siro(a)das-labor.org>
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67871
Reviewed-by: Nikolai Artemiev <nartemiev(a)google.com>
Reviewed-by: Felix Singer <felixsinger(a)posteo.net>
---
M linux_mtd.c
1 file changed, 53 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
Angel Pons: Looks good to me, approved
Hung-Te Lin: Looks good to me, approved
Nikolai Artemiev: Looks good to me, but someone else must approve
diff --git a/linux_mtd.c b/linux_mtd.c
index d2df95e..22702e9 100644
--- a/linux_mtd.c
+++ b/linux_mtd.c
@@ -340,6 +340,10 @@
msg_perr("Cannot open file stream for %s\n", dev_path);
goto linux_mtd_setup_exit;
}
+ ret = setvbuf(dev_fp, NULL, _IONBF, 0);
+ if (ret)
+ msg_pwarn("Failed to set MTD device to unbuffered: %d\n", ret);
+
msg_pinfo("Opened %s successfully\n", dev_path);
ret = 0;
--
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Gerrit-Branch: 1.2.x
Gerrit-Change-Id: I989afd83a33013b2756a0090d6b08245613215c6
Gerrit-Change-Number: 67871
Gerrit-PatchSet: 2
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: merged
Felix Singer has submitted this change. ( https://review.coreboot.org/c/flashrom/+/67869 )
Change subject: dediprog: Fix segmentation fault on no device found
......................................................................
dediprog: Fix segmentation fault on no device found
libusb_exit() call is done by dediprog_open() under the
ret == 1 condition. Removing this line has no impact on
any flow and side effect of the program.
Change-Id: I38b3f3ee3f9d46845df1404791f4a4782320aa7c
Signed-off-by: Medicine Yeh <medicinehy(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48688
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67869
Reviewed-by: Felix Singer <felixsinger(a)posteo.net>
---
M dediprog.c
1 file changed, 21 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
Angel Pons: Looks good to me, approved
diff --git a/dediprog.c b/dediprog.c
index 175e099..99df7b0 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -1188,7 +1188,6 @@
ret = dediprog_open(i);
if (ret == -1) {
/* no dev */
- libusb_exit(usb_ctx);
return 1;
} else if (ret == -2) {
/* busy dev */
--
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Gerrit-Change-Id: I38b3f3ee3f9d46845df1404791f4a4782320aa7c
Gerrit-Change-Number: 67869
Gerrit-PatchSet: 2
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Medicine Yeh <medicinehy(a)gmail.com>
Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: merged
Felix Singer has submitted this change. ( https://review.coreboot.org/c/flashrom/+/67865 )
Change subject: spi25: Debug flashrom crash when Write Protect is ON
......................................................................
spi25: Debug flashrom crash when Write Protect is ON
When hardware write protect is applied, flashrom crashed and
generate coredump. spi_disable_blockprotect_generic() calls
flash->chip->printlock() method when disable was failed,
but this method is optional, can be NULL depends on type of
flashrom chip. NULL pointer check before call is added to
avoid crash.
BRANCH=none
BUG=b:129083894
TEST=Run on Mistral P2
(On CR50 console, run "wp disable")
flashrom --wp-range 0 0x400000
flashrom --wp-enable
(On CR50 console, run "wp enable")
flashrom -r /tmp/test.bin
Verify "Block protection could not be disabled!" is shown,
but flash read completes.
Signed-off-by: Yuji Sasaki <sasakiy(a)chromium.org>
Change-Id: I81094ab5f16a85871fc9869a2e285eddbbbdec4e
Reviewed-on: https://chromium-review.googlesource.com/1535140
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator(a)appspot.gserviceaccount.com>
Tested-by: Edward O'Callaghan <quasisec(a)chromium.org>
Reviewed-by: Stefan Reinauer <reinauer(a)google.com>
Reviewed-by: SANTHOSH JANARDHANA HASSAN <sahassan(a)google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40468
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67865
Reviewed-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
---
M spi25_statusreg.c
1 file changed, 41 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
Angel Pons: Looks good to me, approved
diff --git a/spi25_statusreg.c b/spi25_statusreg.c
index 8cd5a28..bb09e58 100644
--- a/spi25_statusreg.c
+++ b/spi25_statusreg.c
@@ -168,7 +168,8 @@
status = spi_read_status_register(flash);
if ((status & bp_mask) != 0) {
msg_cerr("Block protection could not be disabled!\n");
- flash->chip->printlock(flash);
+ if (flash->chip->printlock)
+ flash->chip->printlock(flash);
return 1;
}
msg_cdbg("disabled.\n");
--
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Gerrit-Change-Id: I81094ab5f16a85871fc9869a2e285eddbbbdec4e
Gerrit-Change-Number: 67865
Gerrit-PatchSet: 2
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: SANTHOSH JANARDHANA HASSAN <sahassan(a)google.com>
Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Yuji Sasaki <sasakiy(a)chromium.org>
Gerrit-MessageType: merged