Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/62768 )
Change subject: flashrom.8.tmpl: Add raiden_debug_spi doc entry
......................................................................
flashrom.8.tmpl: Add raiden_debug_spi doc entry
BUG=b:224358254
TEST=`man ./flashrom.8.tmpl`.
Change-Id: I186920006bdfcc7a9f89542f84b452dfc72b18e4
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62768
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Martin L Roth <martinroth(a)google.com>
Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org>
---
M flashrom.8.tmpl
1 file changed, 49 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Martin L Roth: Looks good to me, approved
Anastasia Klimchuk: Looks good to me, approved
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl
index 563ba1d..84e0fba 100644
--- a/flashrom.8.tmpl
+++ b/flashrom.8.tmpl
@@ -393,6 +393,8 @@
.sp
.BR "* rayer_spi" " (for SPI flash ROMs attached to a parallel port by one of various cable types)"
.sp
+.BR "* raiden_debug_spi" " (For Chrome EC based debug tools - SuzyQable, Servo V4, C2D2 & uServo)"
+.sp
.BR "* pony_spi" " (for SPI flash ROMs attached to a SI-Prog serial port "
bitbanging adapter)
.sp
@@ -1163,6 +1165,50 @@
The schematic of the Xilinx DLC 5 was published in
.URLB "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf" "a Xilinx user guide" .
.SS
+.BR "raiden_debug_spi " programmer
+.IP
+The target of the SPI flashing mux must be specified with the
+.B target
+parameter with the
+.sp
+.B " flashrom \-p raiden_debug_spi:target=chip"
+.sp
+syntax, where
+.B chip
+is either the
+.B ap
+or
+.B ec
+to flash, otherwise a unspecified target terminates at the end-point.
+.sp
+The default is to use the first available servo. You can use the optional
+.B serial
+parameter to specify the servo USB device serial number to use specifically with
+.sp
+.B " flashrom \-p raiden_debug_spi:serial=XXX"
+.sp
+The servo device serial number can be found via
+.B lsusb.
+.sp
+Raiden will poll the
+.B
+ap
+target waiting for the system power to settle on the AP and EC flash devices.
+.sp
+The optional
+.B custom_rst=true
+parameter changes the timeout value from 3ms to 10ms.
+.sp
+.B " flashrom \-p raiden_debug_spi:custom_rst=<true|false>"
+.sp
+syntax, where
+.B custom_rst=false
+is the implicit default timeout of 3ms.
+.sp
+More information about the ChromiumOS servo hardware is available at
+.nh
+.URLB "https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/do…" "servo website" .
+.SS
.BR "pony_spi " programmer
.IP
The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is
@@ -1544,6 +1590,9 @@
.B rayer_spi
needs raw I/O port access.
.sp
+.B raiden_debug_spi
+need access to the respective USB device via libusb API version 1.0.
+.sp
.BR satasii ", " nicintel ", " nicintel_eeprom " and " nicintel_spi
need PCI configuration space read access and raw memory access.
.sp
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49643 )
Change subject: libflashrom: Return progress state to the library user
......................................................................
Patch Set 13: Code-Review+2
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Daniel Campello has uploaded a new patch set (#13) to the change originally created by Richard Hughes. ( https://review.coreboot.org/c/flashrom/+/49643 )
Change subject: libflashrom: Return progress state to the library user
......................................................................
libflashrom: Return progress state to the library user
Projects using libflashrom like fwupd expect the user to wait for the
operation to complete. To avoid the user thinking the process has
"hung" or "got stuck" report back the progress complete of the erase,
write and read operations.
Include a test for the dummy spi25 device.
Change-Id: I7197572bb7f19e3bdb2bde855d70a0f50fd3854c
Signed-off-by: Richard Hughes <richard(a)hughsie.com>
---
M 82802ab.c
M at45db.c
M cli_classic.c
M cli_output.c
M dediprog.c
M en29lv640b.c
M include/flash.h
M include/libflashrom.h
M it87spi.c
M jedec.c
M libflashrom.c
M linux_mtd.c
M lspcon_i2c_spi.c
M realtek_mst_i2c_spi.c
M spi.c
M spi25.c
M sst28sf040.c
M tests/spi25.c
M tests/tests.c
M tests/tests.h
20 files changed, 172 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/43/49643/13
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62768 )
Change subject: flashrom.8.tmpl: Add raiden_debug_spi doc entry
......................................................................
Patch Set 9: Code-Review+2
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Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63832 )
Change subject: meson: add option to disable tests
......................................................................
Patch Set 6:
(1 comment)
File meson.build:
https://review.coreboot.org/c/flashrom/+/63832/comment/75ccd49c_8c9ae60e
PS6, Line 509: # .allowed() is introduced in 0.59.0
> Rather put this in the commit message instead here.
It should be mention in the code why we are not using the new .allowed() method. With a comment here it's easier to get the reason instead to search in the git history.
I can rework the comment.
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Change subject: meson: use `platform/` as subdir()
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
File meson.build:
https://review.coreboot.org/c/flashrom/+/63826/comment/76755d72_ec06ced6
PS2, Line 80: host_is_x86 = ['x86', 'x86_64'].contains(host_machine.cpu_family())
> Is the single sentence enough?
Yes, thanks!
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Change subject: meson: relocate source file list
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