Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/63533 )
Change subject: Revert "Print out the flash chip found after the probing loop in verbose mode"
......................................................................
Revert "Print out the flash chip found after the probing loop in verbose mode"
This reverts commit 1d947633b6ff7a3aaad954e15804fa42d2592023.
Avoid duplicate print lines as this is already done in
probe_flash().
Change-Id: Ice20b16c08ab8998f842dce2539ea827d04023a2
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M cli_classic.c
1 file changed, 0 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/33/63533/1
diff --git a/cli_classic.c b/cli_classic.c
index 0b6e79c..cda4c9b 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -666,12 +666,6 @@
}
ret = 1;
goto out_shutdown;
- } else if (!chip_to_probe) {
- /* repeat for convenience when looking at foreign logs */
- tempstr = flashbuses_to_text(flashes[0].chip->bustype);
- msg_gdbg("Found %s flash chip \"%s\" (%d kB, %s).\n",
- flashes[0].chip->vendor, flashes[0].chip->name, flashes[0].chip->total_size, tempstr);
- free(tempstr);
}
fill_flash = &flashes[0];
--
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Gerrit-Change-Id: Ice20b16c08ab8998f842dce2539ea827d04023a2
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Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37777 )
Change subject: chipset_enable.c: Enable Tiger Lake U support
......................................................................
chipset_enable.c: Enable Tiger Lake U support
Did a basic local test with --flash-name and -r bios and
ran strings to see if the bios contained reasonable data.
BUG=b:146089922
Change-Id: I2c13e0173c9b5e17d2ae197f4a4ab9aa2825c1b3
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M chipset_enable.c
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/37777/1
diff --git a/chipset_enable.c b/chipset_enable.c
index b55852c..d5a2f03 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1996,6 +1996,7 @@
{0x8086, 0x9d56, B_S, NT, "Intel", "Kaby Lake Y Premium", enable_flash_pch100},
{0x8086, 0x9d58, B_S, NT, "Intel", "Kaby Lake U Premium", enable_flash_pch100},
{0x8086, 0x9d84, B_S, DEP, "Intel", "Cannon Lake U Premium", enable_flash_pch300},
+ {0x8086, 0xa082, B_FS, NT, "Intel", "Tiger Lake U", enable_flash_pch300},
{0x8086, 0xa141, B_S, NT, "Intel", "Sunrise Point Desktop Sample", enable_flash_pch100},
{0x8086, 0xa142, B_S, NT, "Intel", "Sunrise Point Unknown Sample", enable_flash_pch100},
{0x8086, 0xa143, B_S, NT, "Intel", "H110", enable_flash_pch100},
--
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Hello build bot (Jenkins), Light, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/63130
to look at the new patch set (#5).
Change subject: pony_spi.c: Extract out get_params to simplify init
......................................................................
pony_spi.c: Extract out get_params to simplify init
In light of `commit caa0335114a81 (pony_spi.c: Fix memory leak in function pony_init_spi)`,
extract out the get_param logic to its own function to simplify the number of
cleanup paths.
BUG=none
TEST=builds
Change-Id: I364febc05c870683cbad114583762b0c006f4bac
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M pony_spi.c
1 file changed, 55 insertions(+), 43 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/30/63130/5
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63130 )
Change subject: pony_spi.c: Extract out get_params to simplify init
......................................................................
Patch Set 3:
(6 comments)
File pony_spi.c:
https://review.coreboot.org/c/flashrom/+/63130/comment/c0fe3ba7_6f04244e
PS3, Line 153: {
> nit: add space before opening brace
Done
https://review.coreboot.org/c/flashrom/+/63130/comment/75b443bb_db815a82
PS3, Line 167: bool have_device;
> > From my point of view: Review doesn't scale well with the size of […]
The concept here was that the function type-sigture was the new invariant, mathematically speaking, and therefore call logic is modified to inhabit the new type hence considering the change atomic.
I do understand what you are saying however "small change" has a certain amount of perspective variability to it. In any case, this was just meant to be a quick cleanup so I reverted leave it as it was for the sake of reviewers.
https://review.coreboot.org/c/flashrom/+/63130/comment/11b81eb8_efb06393
PS3, Line 171: return 1;
> If the `dev` parameter is correct (i.e. […]
Done. serialport could do with a better internal API from the looks of it.
https://review.coreboot.org/c/flashrom/+/63130/comment/d975a0e2_a9d9ae42
PS3, Line 181: return 1;
> Serial port can also leak here.
Done
https://review.coreboot.org/c/flashrom/+/63130/comment/e1fa8357_0c13217f
PS3, Line 232: true
> This is unrelated. Please do it in a separate commit.
Done
https://review.coreboot.org/c/flashrom/+/63130/comment/bc503d5f_20594b5c
PS3, Line 237: true
> Ditto
Done
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Hello build bot (Jenkins), Light, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/63130
to look at the new patch set (#4).
Change subject: pony_spi.c: Extract out get_params to simplify init
......................................................................
pony_spi.c: Extract out get_params to simplify init
In light of `commit caa0335114a81`, extract out the get_param
logic to its own function to simplify the number of cleanup
paths.
BUG=none
TEST=builds
Change-Id: I364febc05c870683cbad114583762b0c006f4bac
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M pony_spi.c
1 file changed, 57 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/30/63130/4
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62948 )
Change subject: tests: Remove mock struct pci_dev, use real pci symbols in tests
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/62948/comment/2bca6aef_72296289
PS1, Line 7: real pci symbols
What implications could this have on side-effects during unit-test runs on hardware?
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62320 )
Change subject: tests/: Add file path and flags validation to open() calls
......................................................................
Patch Set 14:
(1 comment)
File tests/chip.c:
https://review.coreboot.org/c/flashrom/+/62320/comment/11ecb00c_2d74b62c
PS14, Line 201: io_mock_register(&chip_io);
> `io_mock_register(&chip_io)` can be moved into `setup_chip`. […]
related: https://review.coreboot.org/c/flashrom/+/63231
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Change subject: tests/: Factor out all link-time wrapped func
......................................................................
Patch Set 3:
(1 comment)
File tests/wraps.c:
https://review.coreboot.org/c/flashrom/+/62777/comment/5020ba9d_50263335
PS2, Line 78: NON_ZERO
> Maybe rebase on top of CB:63193
Done
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