Attention is currently required from: Simon Buhrow, Nico Huber, Aarya.
Hello build bot (Jenkins), Simon Buhrow, Nico Huber, Thomas Heijligen,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/66717
to look at the new patch set (#18).
Change subject: flashrom.c: Update check_block_eraser function to use probe opcode
......................................................................
flashrom.c: Update check_block_eraser function to use probe opcode
Update the check_block_eraser function to use probe_opcode to see if the
given block_eraser is supported by the spi master. This will help to get
a real count of usable block_erasers.
Change-Id: I6591a84ae1fe5bc1648051cc30b9393450033852
Signed-off-by: Aarya Chaumal <aarya.chaumal(a)gmail.com>
---
M flashrom.c
1 file changed, 26 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/17/66717/18
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Gerrit-Project: flashrom
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Gerrit-Change-Number: 66717
Gerrit-PatchSet: 18
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Aarya has uploaded a new patch set (#5) to the change originally created by Thomas Heijligen. ( https://review.coreboot.org/c/flashrom/+/67717 )
Change subject: spi.c: Add AT45 & SF25F erasefn opcode mapping
......................................................................
spi.c: Add AT45 & SF25F erasefn opcode mapping
Change-Id: I798a91f1e20b63662715c68e6d43d03fc6005d51
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M include/chipdrivers.h
M spi.c
2 files changed, 56 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/17/67717/5
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Aarya has uploaded a new patch set (#5) to the change originally created by Thomas Heijligen. ( https://review.coreboot.org/c/flashrom/+/67716 )
Change subject: spi25.c: Rename spi_get_erasefn_from_opcode to spi25_get_erasefn_from_opcode
......................................................................
spi25.c: Rename spi_get_erasefn_from_opcode to spi25_get_erasefn_from_opcode
This function works only with spi25 chips
Change-Id: Ie054160b0fdd34bcb128285c6a047e3a3fa8be0c
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M include/chipdrivers.h
M sfdp.c
M spi25.c
3 files changed, 19 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/16/67716/5
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Aarya has uploaded a new patch set (#5) to the change originally created by Thomas Heijligen. ( https://review.coreboot.org/c/flashrom/+/67715 )
Change subject: spi25.c: Move spi_get_opcode_from_erasefn() to spi.c
......................................................................
spi25.c: Move spi_get_opcode_from_erasefn() to spi.c
Split spi_get_opcode_from_erasefn() out into spi.c to add support for
non spi25 flashes next.
Change-Id: Id654e998d0af2d3f5845336bb98b38d724519038
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M spi.c
M spi25.c
2 files changed, 47 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/15/67715/5
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69620 )
Change subject: tests: Add selfcheck to unit tests
......................................................................
Patch Set 8: Code-Review+1
(2 comments)
File tests/selfcheck.c:
https://review.coreboot.org/c/flashrom/+/69620/comment/7c28333d_2b2f58be
PS7, Line 68: assert_table(chip->bustype != BUS_NONE, "chip bustype is BUS_NONE", i,
: chip->name);
The full story is here: https://www.flashrom.org/Development_Guidelines#Coding_style
> 80-columns soft limit for most code and comments. This is to encourage simple design and concise naming.
> 112-columns hard limit. Use this to reduce line breaks in cases where they harm grep-ability or overall readability, such as print statements and function signatures. Don't abuse this for long variable/function names or deep nesting.
The reason I asked you is because I think this falls under "Use this to reduce line breaks in cases where they harm grep-ability or overall readability".
In general, of course not all the lines should be long! :) If a line is nice and readable within 80 chars, that's perfect.
File tests/selfcheck.c:
https://review.coreboot.org/c/flashrom/+/69620/comment/4d4fcf37_14e9ced5
PS8, Line 25: #define assert_table(assertion, message, index, name) \
: do { \
: if (!(assertion)) \
: fail_msg(message " for index:%zu name:%s", (index), (name) ? (name) : "unknown"); \
: } while (0)
The macro has changed with lot more new lines and \ why?
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Gerrit-Change-Id: I41cd014d9bf909296b6c28e3e00548e6883ff41a
Gerrit-Change-Number: 69620
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70140 )
Change subject: flashchips: Add support for IS25WP016
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/70140/comment/4274a8bb_d938c95d
PS2, Line 9: Tested using `linux_spi` programmer on Raspberry Pi CM4.
Please test reading, writing and erasing.
https://review.coreboot.org/c/flashrom/+/70140/comment/8957d127_9adecf60
PS2, Line 11: Datasheet: https://www.issi.com/WW/pdf/25LP-WP016D.pdf
Vendors often remove datasheets from their websites. I suggest using a caching service, e.g. `https://web.archive.org/web/20221129211027/https://www.issi.com/WW/pdf/25LP-WP016D.pdf`.
Patchset:
PS2:
Thanks for contributing. Just did a quick review, didn't check the values yet.
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