Attention is currently required from: Edward O'Callaghan.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69196 )
Change subject: layout: Factor out flash_region structure from romentry
......................................................................
Patch Set 2:
(1 comment)
File include/layout.h:
https://review.coreboot.org/c/flashrom/+/69196/comment/2ed656db_abf085a4
PS2, Line 42: bool read_prot;
: bool write_prot;
> @Nik, when you hijack this patch maybe drop these in this patch and add in a subsequent patch when y […]
+1
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Gerrit-Change-Number: 69196
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Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/69451 )
Change subject: cli_classic.c: Be consistent with pointer types
......................................................................
cli_classic.c: Be consistent with pointer types
With `i586-pc-msdosdjgpp-gcc (GCC) 12.2.0`, `uint32_t` is defined as
`long unsigned int`, which is not the same as `unsigned int`. As the
`flashrom_layout_get_region_range()` function is part of libflashrom
API, adjust `cli_classic.c` instead to avoid type mismatches.
Change-Id: Ie8f5bc0d9296f7c6b8f8a351b53052f5fe86b09d
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M cli_classic.c
1 file changed, 17 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/51/69451/1
diff --git a/cli_classic.c b/cli_classic.c
index 574afff..d6b14bf 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -127,7 +127,7 @@
return true;
}
-static int parse_wp_range(uint32_t *start, uint32_t *len)
+static int parse_wp_range(unsigned int *start, unsigned int *len)
{
char *endptr = NULL, *token = NULL;
@@ -569,7 +569,7 @@
int namelen, opt, i, j;
int startchip = -1, chipcount = 0, option_index = 0;
int operation_specified = 0;
- uint32_t wp_start = 0, wp_len = 0;
+ unsigned int wp_start = 0, wp_len = 0;
bool force = false, ifd = false, fmap = false;
#if CONFIG_PRINT_WIKI == 1
bool list_supported_wiki = false;
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69422 )
Change subject: ichspi: clear byte count in ich_start_hwseq_xfer()
......................................................................
Patch Set 2: Code-Review+1
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Attention is currently required from: Nikolai Artemiev.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69422 )
Change subject: ichspi: clear byte count in ich_start_hwseq_xfer()
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
Did you test if `ich_hwseq_block_erase()` still works? Looking at CB:62869 it did not clear the byte count before.
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Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/69131 )
(
2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: tree/: Convert flashchips db to use indirection for erase_block
......................................................................
tree/: Convert flashchips db to use indirection for erase_block
This paves the way to allow for the conversion of flashchip erase_block
func ptr to enumerate values. This change should be a NOP.
TEST=`diff -u <(objdump -D flashchips.o_bk) <(objdump -D flashchips.o)`.
Change-Id: I122295ec9add0fe0efd27273c9725e5d64f6dbe2
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/69131
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M at45db.c
M atapromise.c
M flashchips.c
M flashrom.c
M include/flash.h
M sfdp.c
M spi25.c
M tests/chip.c
M tests/chip_wp.c
9 files changed, 2,026 insertions(+), 1,971 deletions(-)
Approvals:
build bot (Jenkins): Verified
Angel Pons: Looks good to me, approved
Anastasia Klimchuk: Looks good to me, approved
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Evan Benn has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69417 )
Change subject: flashrom_tester: Change the wp_toggle semantics
......................................................................
Patch Set 3:
(1 comment)
File util/flashrom_tester/flashrom/src/flashromlib.rs:
https://review.coreboot.org/c/flashrom/+/69417/comment/23a4bdfe_c372dc05
PS3, Line 104: fn wp_toggle(&self, en: bool) -> Result<bool, FlashromError> {
Sorry Nik, somehow I dropped the part where I was changing the libflashrom behaviour too. Took a while to debug that.
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Hello build bot (Jenkins), Nikolai Artemiev,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/69417
to look at the new patch set (#3).
Change subject: flashrom_tester: Change the wp_toggle semantics
......................................................................
flashrom_tester: Change the wp_toggle semantics
wp_toggle and wp_range had some confusing behaviour where enabling wp
would set a range, but disabling wp would not unset the range
(explicitly). This was a way to workaround the MTD kernel driver
semantics. Now make things very explicit, enabling software write
protect will set the range to the whole chip. Disabling write protect
will set the range to 0,0. This makes all drivers behave the same as
MTD, and documents the exact behaviour explicitly.
BUG=b:244663741
BRANCH=None
TEST=flashrom_tester --libflashrom host # MTD and non-MTD
TEST=flashrom_tester --flashrom_binary # MTD and non-MTD
Change-Id: Ia01d612d988e6580a7c5f0fd448ccc319ce9b181
Signed-off-by: Evan Benn <evanbenn(a)chromium.org>
---
M util/flashrom_tester/flashrom/src/cmd.rs
M util/flashrom_tester/flashrom/src/flashromlib.rs
M util/flashrom_tester/flashrom/src/lib.rs
3 files changed, 37 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/17/69417/3
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