October 2022 - flashrom-gerrit

[S] Change in flashrom[master]: bitbang_spi.c: Fix unchecked heap allocation
by Edward O'Callaghan (Code Review) 24 Oct '22

24 Oct '22

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/68775 ) Change subject: bitbang_spi.c: Fix unchecked heap allocation ...................................................................... bitbang_spi.c: Fix unchecked heap allocation Change-Id: Ib64b1fe67fa1874875453ab9e1700e468c579e7c Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M bitbang_spi.c 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/68775/1 diff --git a/bitbang_spi.c b/bitbang_spi.c index 10c1087..5e4b566 100644 --- a/bitbang_spi.c +++ b/bitbang_spi.c @@ -165,6 +165,9 @@ } struct bitbang_spi_master_data *data = calloc(1, sizeof(*data)); + if (!data) + return ERROR_FATAL; + data->master = master; if (spi_data) data->spi_data = spi_data; -- To view, visit https://review.coreboot.org/c/flashrom/+/68775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib64b1fe67fa1874875453ab9e1700e468c579e7c Gerrit-Change-Number: 68775 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in flashrom[master]: ichspi.c: heap allocate hwseq_data to remove global
by Felix Singer (Code Review) 24 Oct '22

24 Oct '22

Attention is currently required from: Edward O'Callaghan, Angel Pons, Anastasia Klimchuk. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/68774 ) Change subject: ichspi.c: heap allocate hwseq_data to remove global ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/68774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib362c5ab2d3e8afee2c3c7d3135cc4414d6bd6c3 Gerrit-Change-Number: 68774 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Mon, 24 Oct 2022 23:35:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: ichspi.c: derive hsfc_fcycle from ctx in ich_start_hwseq_xfer()
by Felix Singer (Code Review) 24 Oct '22

24 Oct '22

Attention is currently required from: Edward O'Callaghan, Angel Pons, Anastasia Klimchuk. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/68773 ) Change subject: ichspi.c: derive hsfc_fcycle from ctx in ich_start_hwseq_xfer() ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/68773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib0ccf4b32fd1e2be2ecc3a4a4c6e397c8e901a0a Gerrit-Change-Number: 68773 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Mon, 24 Oct 2022 23:31:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: ichspi.c: plumb flashctx though hwseq xfer helper
by Felix Singer (Code Review) 24 Oct '22

24 Oct '22

Attention is currently required from: Edward O'Callaghan, Angel Pons, Anastasia Klimchuk. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/68772 ) Change subject: ichspi.c: plumb flashctx though hwseq xfer helper ...................................................................... Patch Set 1: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/68772/comment/da99ebf0_ea61f2aa PS1, Line 7: though th*r*ough https://review.coreboot.org/c/flashrom/+/68772/comment/bffa25d6_7206a41b PS1, Line 9: prepare ichspi to remove hwseq_data being : a global symbol. Please mention the patch where this is done. CB:68774. -- To view, visit https://review.coreboot.org/c/flashrom/+/68772 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I67b5aa6350930d912e5036473ac3e792debac0bd Gerrit-Change-Number: 68772 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Mon, 24 Oct 2022 23:30:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: ichspi.c: heap allocate hwseq_data to remove global
by Edward O'Callaghan (Code Review) 24 Oct '22

24 Oct '22

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/68774 ) Change subject: ichspi.c: heap allocate hwseq_data to remove global ...................................................................... ichspi.c: heap allocate hwseq_data to remove global Align hwseq path in ichspi with the rest of the flashrom tree by making hwseq_data a heap allocation within the life-time of the driver managed by the driver registration API. Change-Id: Ib362c5ab2d3e8afee2c3c7d3135cc4414d6bd6c3 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M ichspi.c 1 file changed, 32 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/68774/1 diff --git a/ichspi.c b/ichspi.c index bbd2c91..b3beaea 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1255,13 +1255,13 @@ return result; } -static struct hwseq_data { +struct hwseq_data { uint32_t size_comp0; uint32_t size_comp1; uint32_t addr_mask; bool only_4k; uint32_t hsfc_fcycle; -} g_hwseq_data; +}; static struct hwseq_data *get_hwseq_data_from_context(const struct flashctx *flash) { @@ -1591,6 +1591,12 @@ return 0; } +static int ich_hwseq_shutdown(void *data) +{ + free(data); + return 0; +} + static int ich_spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds) { @@ -1804,6 +1810,7 @@ .erase = ich_hwseq_block_erase, .read_register = ich_hwseq_read_status, .write_register = ich_hwseq_write_status, + .shutdown = ich_hwseq_shutdown, }; static int init_ich7_spi(void *spibar, enum ich_chipset ich_gen) @@ -1947,7 +1954,8 @@ enum ich_spi_mode ich_spi_mode = ich_auto; size_t num_freg, num_pr, reg_pr0; - init_chipset_properties(&swseq_data, &g_hwseq_data, &num_freg, &num_pr, &reg_pr0, ich_gen); + struct hwseq_data hwseq_data; + init_chipset_properties(&swseq_data, &hwseq_data, &num_freg, &num_pr, &reg_pr0, ich_gen); int ret = get_ich_spi_mode_param(cfg, &ich_spi_mode); if (ret) @@ -2167,16 +2175,20 @@ msg_perr("Could not determine density of flash component %d.\n", 0); return ERROR_FATAL; } - g_hwseq_data.size_comp0 = tmpi; + hwseq_data.size_comp0 = tmpi; tmpi = getFCBA_component_density(ich_gen, &desc, 1); if (tmpi < 0) { msg_perr("Could not determine density of flash component %d.\n", 1); return ERROR_FATAL; } - g_hwseq_data.size_comp1 = tmpi; + hwseq_data.size_comp1 = tmpi; - register_opaque_master(&opaque_master_ich_hwseq, &g_hwseq_data); + struct hwseq_data *opaque_hwseq_data = calloc(1, sizeof(struct hwseq_data)); + if (!opaque_hwseq_data) + return ERROR_FATAL; + memcpy(opaque_hwseq_data, &hwseq_data, sizeof(*opaque_hwseq_data)); + register_opaque_master(&opaque_master_ich_hwseq, opaque_hwseq_data); } else { register_spi_master(&spi_master_ich9, NULL); } -- To view, visit https://review.coreboot.org/c/flashrom/+/68774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib362c5ab2d3e8afee2c3c7d3135cc4414d6bd6c3 Gerrit-Change-Number: 68774 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in flashrom[master]: ichspi.c: derive hsfc_fcycle from ctx in ich_start_hwseq_xfer()
by Edward O'Callaghan (Code Review) 24 Oct '22

24 Oct '22

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/68773 ) Change subject: ichspi.c: derive hsfc_fcycle from ctx in ich_start_hwseq_xfer() ...................................................................... ichspi.c: derive hsfc_fcycle from ctx in ich_start_hwseq_xfer() Allow helpers to derive driver specific data from the driver specific context instead of being a closure over a static global variable. Change-Id: Ib0ccf4b32fd1e2be2ecc3a4a4c6e397c8e901a0a Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M ichspi.c 1 file changed, 16 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/73/68773/1 diff --git a/ichspi.c b/ichspi.c index 5d9fe0c..bbd2c91 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1350,6 +1350,7 @@ uint32_t addr_mask) { uint16_t hsfc; + struct hwseq_data *hwseq_data = get_hwseq_data_from_context(flash); /* Sets flash_addr in FADDR */ ich_hwseq_set_addr(flash_addr, addr_mask); @@ -1359,7 +1360,7 @@ /* Set up transaction parameters. */ hsfc = REGREAD16(ICH9_REG_HSFC); - hsfc &= ~g_hwseq_data.hsfc_fcycle; /* clear operation */ + hsfc &= ~hwseq_data->hsfc_fcycle; /* clear operation */ hsfc |= hsfc_cycle; hsfc |= HSFC_FDBC_VAL(len - 1); hsfc |= HSFC_FGO; /* start */ -- To view, visit https://review.coreboot.org/c/flashrom/+/68773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib0ccf4b32fd1e2be2ecc3a4a4c6e397c8e901a0a Gerrit-Change-Number: 68773 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in flashrom[master]: ichspi.c: plumb flashctx though hwseq xfer helper
by Edward O'Callaghan (Code Review) 24 Oct '22

24 Oct '22

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/68772 ) Change subject: ichspi.c: plumb flashctx though hwseq xfer helper ...................................................................... ichspi.c: plumb flashctx though hwseq xfer helper Change is a NOP to prepare ichspi to remove hwseq_data being a global symbol. This allows for the helper functions to derive their data from the driver data context. Change-Id: I67b5aa6350930d912e5036473ac3e792debac0bd Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M ichspi.c 1 file changed, 23 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/72/68772/1 diff --git a/ichspi.c b/ichspi.c index 6d3535c..5d9fe0c 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1345,7 +1345,8 @@ } /* Fire up a transfer using the hardware sequencer. */ -static void ich_start_hwseq_xfer(uint32_t hsfc_cycle, uint32_t flash_addr, size_t len, +static void ich_start_hwseq_xfer(const struct flashctx *flash, + uint32_t hsfc_cycle, uint32_t flash_addr, size_t len, uint32_t addr_mask) { uint16_t hsfc; @@ -1376,7 +1377,7 @@ } /* Execute SPI flash transfer */ -static int ich_exec_sync_hwseq_xfer(uint32_t hsfc_cycle, uint32_t flash_addr, +static int ich_exec_sync_hwseq_xfer(const struct flashctx *flash, uint32_t hsfc_cycle, uint32_t flash_addr, size_t len, enum ich_chipset ich_gen, uint32_t addr_mask) { if (ich_wait_for_hwseq_spi_cycle_complete()) { @@ -1384,7 +1385,7 @@ return 1; } - ich_start_hwseq_xfer(hsfc_cycle, flash_addr, len, addr_mask); + ich_start_hwseq_xfer(flash, hsfc_cycle, flash_addr, len, addr_mask); return ich_hwseq_wait_for_cycle_complete(len, ich_gen, addr_mask); } @@ -1399,7 +1400,7 @@ } msg_pdbg("Reading Status register\n"); - if (ich_exec_sync_hwseq_xfer(HSFC_CYCLE_RD_STATUS, 0, len, ich_generation, + if (ich_exec_sync_hwseq_xfer(flash, HSFC_CYCLE_RD_STATUS, 0, len, ich_generation, hwseq_data->addr_mask)) { msg_perr("Reading Status register failed\n!!"); return -1; @@ -1422,7 +1423,7 @@ ich_fill_data(&value, len, ICH9_REG_FDATA0); - if (ich_exec_sync_hwseq_xfer(HSFC_CYCLE_WR_STATUS, 0, len, ich_generation, + if (ich_exec_sync_hwseq_xfer(flash, HSFC_CYCLE_WR_STATUS, 0, len, ich_generation, hwseq_data->addr_mask)) { msg_perr("Writing Status register failed\n!!"); return -1; @@ -1518,7 +1519,7 @@ msg_pdbg("Erasing %d bytes starting at 0x%06x.\n", len, addr); - if (ich_exec_sync_hwseq_xfer(HSFC_CYCLE_BLOCK_ERASE, addr, 0, ich_generation, + if (ich_exec_sync_hwseq_xfer(flash, HSFC_CYCLE_BLOCK_ERASE, addr, 0, ich_generation, hwseq_data->addr_mask)) return -1; return 0; @@ -1546,7 +1547,7 @@ /* as well as flash chip page borders as demanded in the Intel datasheets. */ block_len = min(block_len, 256 - (addr & 0xFF)); - if (ich_exec_sync_hwseq_xfer(HSFC_CYCLE_READ, addr, block_len, ich_generation, + if (ich_exec_sync_hwseq_xfer(flash, HSFC_CYCLE_READ, addr, block_len, ich_generation, hwseq_data->addr_mask)) return 1; ich_read_data(buf, block_len, ICH9_REG_FDATA0); @@ -1579,7 +1580,7 @@ block_len = min(block_len, 256 - (addr & 0xFF)); ich_fill_data(buf, block_len, ICH9_REG_FDATA0); - if (ich_exec_sync_hwseq_xfer(HSFC_CYCLE_WRITE, addr, block_len, ich_generation, + if (ich_exec_sync_hwseq_xfer(flash, HSFC_CYCLE_WRITE, addr, block_len, ich_generation, hwseq_data->addr_mask)) return -1; addr += block_len; -- To view, visit https://review.coreboot.org/c/flashrom/+/68772 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I67b5aa6350930d912e5036473ac3e792debac0bd Gerrit-Change-Number: 68772 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in flashrom[master]: flashchips.c: Add write protect support for W25Q16.V
by Khoa Hoang (Code Review) 24 Oct '22

24 Oct '22

Attention is currently required from: Felix Singer. Hello Felix Singer, build bot (Jenkins), Edward O'Callaghan, Nikolai Artemiev, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/67713 to look at the new patch set (#7). Change subject: flashchips.c: Add write protect support for W25Q16.V ...................................................................... flashchips.c: Add write protect support for W25Q16.V Enable WRSR2 feature flag and define reg_bits and decode_range for W25Q16.V to enable write protect support. Based on W25Q16DV, Revision: 1, Release: Nov 18 2014 datasheet TEST=flashrom --wp-{enable,disable,range,list,status} Change-Id: I6c0b35f82b47a1169bccfd08222e9e3b3be30d75 Signed-off-by: Khoa Hoang <admin(a)khoahoang.com> --- M flashchips.c 1 file changed, 29 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/13/67713/7 -- To view, visit https://review.coreboot.org/c/flashrom/+/67713 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6c0b35f82b47a1169bccfd08222e9e3b3be30d75 Gerrit-Change-Number: 67713 Gerrit-PatchSet: 7 Gerrit-Owner: Khoa Hoang <admin(a)khoahoang.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newpatchset

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[S] Change in flashrom[master]: flashchips.c: Add write protect support for W25Q16.V
by Khoa Hoang (Code Review) 24 Oct '22

24 Oct '22

Attention is currently required from: Felix Singer. Khoa Hoang has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67713 ) Change subject: flashchips.c: Add write protect support for W25Q16.V ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/67713/comment/b9f868d7_74aab08d PS4, Line 11: > Please add the release date and the revision of the datasheet you used to the commit message. Done -- To view, visit https://review.coreboot.org/c/flashrom/+/67713 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6c0b35f82b47a1169bccfd08222e9e3b3be30d75 Gerrit-Change-Number: 67713 Gerrit-PatchSet: 6 Gerrit-Owner: Khoa Hoang <admin(a)khoahoang.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Mon, 24 Oct 2022 21:12:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: flashchips.c: Add write protect support for W25Q16.V
by Khoa Hoang (Code Review) 24 Oct '22

24 Oct '22

Attention is currently required from: Khoa Hoang. Hello Felix Singer, build bot (Jenkins), Edward O'Callaghan, Nikolai Artemiev, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/67713 to look at the new patch set (#6). Change subject: flashchips.c: Add write protect support for W25Q16.V ...................................................................... flashchips.c: Add write protect support for W25Q16.V Enable WRSR2 feature flag and define reg_bits and decode_range for W25Q16.V to enable write protect support. Based on W25Q16DV, Revision: 1, Release: Nov 18 2014 datasheet Change-Id: I6c0b35f82b47a1169bccfd08222e9e3b3be30d75 Signed-off-by: Khoa Hoang <admin(a)khoahoang.com> --- M flashchips.c 1 file changed, 25 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/13/67713/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/67713 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6c0b35f82b47a1169bccfd08222e9e3b3be30d75 Gerrit-Change-Number: 67713 Gerrit-PatchSet: 6 Gerrit-Owner: Khoa Hoang <admin(a)khoahoang.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Khoa Hoang <admin(a)khoahoang.com> Gerrit-MessageType: newpatchset

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