Attention is currently required from: Nico Huber, Angel Pons, Sergii Dmytruk.
Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58475
to look at the new patch set (#17).
Change subject: spi25_statusreg: make register read/write functions generic
......................................................................
spi25_statusreg: make register read/write functions generic
This patch adds new spi_{read,write}_register() functions that take the
source/destination register as an argument. Currently they can only
access SR1, support for other registers will be added in another patch.
Since we're refactoring things, this commit also makes
spi_read_register() return an error code, making it possible to identify
error conditions that spi_read_status_register() concealed.
This also removes the initial 100ms delay between writing a register and
the first attempt to check the chip's status. An initial delay was added
to avoid needing to read the status register multiple times, but that is
unlikely to cause problems on modern flash chips.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I0a3951bbf993f2d8d830143b29d3ce16cc6901d7
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M chipdrivers.h
M flash.h
M spi25_statusreg.c
3 files changed, 80 insertions(+), 46 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/58475/17
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Gerrit-Change-Id: I0a3951bbf993f2d8d830143b29d3ce16cc6901d7
Gerrit-Change-Number: 58475
Gerrit-PatchSet: 17
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Attention is currently required from: Nico Huber, Sergii Dmytruk.
Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58474
to look at the new patch set (#13).
Change subject: writeprotect, cli_classic: delete old writeprotect code
......................................................................
writeprotect, cli_classic: delete old writeprotect code
Delete writeprotect code that was previously extracted from the cros tree.
This is the first of a series of commits adding writeprotect support.
Following commits incrementally implement writeprotect operations,
culminating in writeprotect support for three example chips: GD25LQ128,
GD25Q32, and GD25Q256.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I67e9b31f86465e5a8f7d3def637198671ee818a8
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M cli_classic.c
M flash.h
M s25f.c
M writeprotect.c
M writeprotect.h
5 files changed, 8 insertions(+), 570 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/58474/13
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Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60230 )
Change subject: spi25_statusreg.c: add SR3 read/write support
......................................................................
Patch Set 2:
(1 comment)
File flash.h:
https://review.coreboot.org/c/flashrom/+/60230/comment/66266d62_19978c85
PS2, Line 148: FEATURE_SR3
> Maybe it's silly question, but why the name is different from the others above? […]
SR2 can be written in two different ways, but read in one. It seems that `FEATURE_RDSR3 | FEATURE_WRSR3` would always come together, effectively being a single flag.
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