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Change subject: meson: replace target_machine by host_machine
......................................................................
Patch Set 2: Code-Review+2
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61198 )
Change subject: meson: build hwaccess only on x86
......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS3:
Peter, what is it that you use the Meson build for actually?
Meson is generally not considered supported. It's a kludge to
integrate libflashrom in fwupd and then got used for tests as
well.
File meson.build:
https://review.coreboot.org/c/flashrom/+/61198/comment/ef952fb2_867ba089
PS3, Line 357: error('RAW access is not available on non-x86 platforms. Disable the programmer which needs it. Use `meson build -Dpciutils=false -Dconfig_rayer_spi=false`')
Well, the comment about ARM is not wrong. But I have to admit it's misleading
when kept with the stub. Maybe just drop that one line.
> A relatively simple fix might be...
An even simpler fix would be to drop Meson support. We shouldn't discuss what
is simple, but what is the right thing to do.
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Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61198 )
Change subject: meson: build hwaccess only on x86
......................................................................
Patch Set 3:
(1 comment)
File meson.build:
https://review.coreboot.org/c/flashrom/+/61198/comment/abe44c83_9d358630
PS3, Line 357: error('RAW access is not available on non-x86 platforms. Disable the programmer which needs it. Use `meson build -Dpciutils=false -Dconfig_rayer_spi=false`')
> Or it seems https://review.coreboot. […]
rget_io_perms() is for gaining access to x86 I/O ports, so all programmer which calls it, need access to x86 I/O ports and can't run on other platforms. This is the current behavior. A while ago this was different, with some programmers just call the function and non x86 platforms have the empty dummy implementation. The dummy implementation is left for DOS and libpayload which does not require access privileges. The Makefile has already adapted to it, but meson is lacking behind.
This patch should restore old behavior, but is far from good. The right way would be to resolve the real dependencies for each programmer properly like in the Makefile.
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60430 )
Change subject: flashrom: Convert do_read() into a libflashrom user
......................................................................
Patch Set 2:
(1 comment)
File flashrom.c:
https://review.coreboot.org/c/flashrom/+/60430/comment/a084e179_9e934783
PS1, Line 2209: write_buf_to_include_args
> If you could run this once with -i arguments, to confirm "include args" work, that would be ideal! t […]
was tested before and checked again just now on HEAD. still works
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60069 )
Change subject: flashrom.c: Make {read,write}_buf_from_include_args() public
......................................................................
Patch Set 3:
(1 comment)
File flash.h:
https://review.coreboot.org/c/flashrom/+/60069/comment/45232048_dd075efe
PS3, Line 353: read_buf_from_include_args
> There are few existing include_args functions in layout.h. […]
It's a good idea in theory but read_buf_from_file() [sic. write_buf_to_file()] is used in many places in flashrom.c I think breaking up flashrom.c a bit is another orthogonal task to lifting cli upon libflashrom.
One plausible thing to do here is to expose {read,write}_buf_{from,to}_file() symbols here and then move said functions to layout however that leads to more lines and bigger headers. It would seem a bit half done if that line of thinking wasn't continued to the logical end point of breaking up flashrom.c so it wasn't so big.
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Change subject: flashrom.c: Make {read,write}_buf_from_include_args() public
......................................................................
Patch Set 3:
(1 comment)
File flash.h:
https://review.coreboot.org/c/flashrom/+/60069/comment/7272fcc8_30e8faf5
PS3, Line 353: read_buf_from_include_args
There are few existing include_args functions in layout.h. Is there any reason these two can't go into layout.h? These both work with layout, context is only used to get layout from context and nothing else.
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Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60711 )
Change subject: Add Elkhart Lake support
......................................................................
Patch Set 2:
(9 comments)
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/60711/comment/f0e343e6_af6b006f
PS1, Line 709: boot_straps = boot_straps_pch500;
> The EDS says `bbs == 1` would be "UFS". Not sure how that's connected. […]
In EDS there is just SPI defined (bbs=0), whereas bbs=1 is marked as reserved. So I guess it is more like it was on APL/GLK. I will move the case CHIPSET_ELKHART_LAKE one down.
https://review.coreboot.org/c/flashrom/+/60711/comment/59bb318f_6cb10714
PS1, Line 995: dev
> So AFAICS, this is already 1f.5. We could save us the dance to find it […]
I guess this would be something for a follow-up patch, right?
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/60711/comment/cdc888e7_1ed666be
PS1, Line 538: IFWI
> Intel likes to haunt us with this it seems. Now all the non-BIOS firmware is […]
Yeah, it is this back and forth with every new platform...
https://review.coreboot.org/c/flashrom/+/60711/comment/ab33e822_e7732301
PS1, Line 1033: return CHIPSET_500_SERIES_TIGER_POINT;
> If the SPI guide is correct and I followed it, we would end up on this path. […]
Yes, I was starring at this code back than for a while.
Your approach seems to be OK, at least I can see the value 0x6c for EHL in the docs. Will change accordingly.
https://review.coreboot.org/c/flashrom/+/60711/comment/ebde677d_075a53a5
PS1, Line 1055: case CHIPSET_GEMINI_LAKE:
> EHL here?
With the change above, yes. Will add.
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/60711/comment/7dc2342f_734c966d
PS1, Line 452: pprint_reg(HSFS, FLOCKDN, reg_val, "\n");
> Looks like there are several new SAF (slave-attached flash?) bits. We […]
I have checked the printed bits and they do match the docs.
https://review.coreboot.org/c/flashrom/+/60711/comment/b5b70256_9367a620
PS1, Line 464: case CHIPSET_500_SERIES_TIGER_POINT:
> Looks like we missed APL/GLK here? EHL should go here too it seems.
Cheked the bits in the register and they do macth with EHL. Will add.
https://review.coreboot.org/c/flashrom/+/60711/comment/74b2b55c_ad1d4abd
PS1, Line 1774: case CHIPSET_ELKHART_LAKE:
> This is tricky, the additional regs are at 0xe0. So it actually has 16.
Oh yes, I wasn't aware. Will shift back to 16 (had it in the beginning).
https://review.coreboot.org/c/flashrom/+/60711/comment/21fe4c4d_4430a4c0
PS1, Line 2027: ich_gen == CHIPSET_ELKHART_LAKE)) {
> Hmmm, would fit better below. Or maybe just merge the two if's. The idea […]
If moved below, something like this?
msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini/Elkhart Lake.\n");
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Hello build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/60711
to look at the new patch set (#2).
Change subject: Add Elkhart Lake support
......................................................................
Add Elkhart Lake support
Elkhart Lake has a chipset called Mule Creek Canyon which is quite
compatible with 300 series chipsets. There are a few differences though,
e.g. different encoding for the SPI clock values for read and write in
the FLCOMP register. In addition Elkhart Lake has a new PCI device ID
for the SPI controller which is added, too.
TEST=Read and flash complete flash on Siemens MC EHL1
Change-Id: I711e39a3ec9cd7098389231eaa1cb864d615a475
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M chipset_enable.c
M ich_descriptors.c
M ichspi.c
M programmer.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
5 files changed, 51 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/11/60711/2
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Peter Marheine has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61198 )
Change subject: meson: build hwaccess only on x86
......................................................................
Patch Set 3:
(1 comment)
File meson.build:
https://review.coreboot.org/c/flashrom/+/61198/comment/676574e0_ccedf6a0
PS3, Line 357: error('RAW access is not available on non-x86 platforms. Disable the programmer which needs it. Use `meson build -Dpciutils=false -Dconfig_rayer_spi=false`')
> A relatively simple fix might be to move the stub implementation into the header as an inline static […]
Or it seems https://review.coreboot.org/c/flashrom/+/60841 and the following changes may fix most of the issue, but then pciutils shouldn't imply need_raw_access.
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