July 2021 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: tests: Trim excessive new lines from layout test output
by Angel Pons (Code Review) 21 Jul '21

21 Jul '21

Attention is currently required from: Anastasia Klimchuk. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56439 ) Change subject: tests: Trim excessive new lines from layout test output ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/56439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I36a39505f8db508672cde5a848684a3a22f5ccc4 Gerrit-Change-Number: 56439 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Jul 2021 09:54:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: tests: Add unit tests for layout sanity checks
by Nico Huber (Code Review) 21 Jul '21

21 Jul '21

Attention is currently required from: Angel Pons, Anastasia Klimchuk. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56440 ) Change subject: tests: Add unit tests for layout sanity checks ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/56440 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia21585d60443b2741f3868d7887476090e35f79b Gerrit-Change-Number: 56440 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Jul 2021 09:36:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: tests: Trim excessive new lines from layout test output
by Nico Huber (Code Review) 21 Jul '21

21 Jul '21

Attention is currently required from: Angel Pons, Anastasia Klimchuk. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56439 ) Change subject: tests: Trim excessive new lines from layout test output ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/56439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I36a39505f8db508672cde5a848684a3a22f5ccc4 Gerrit-Change-Number: 56439 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Jul 2021 09:36:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: programmer_table: Remove space between address operator and variable
by Angel Pons (Code Review) 21 Jul '21

21 Jul '21

Attention is currently required from: Nico Huber, Thomas Heijligen, Edward O'Callaghan, Anastasia Klimchuk. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56469 ) Change subject: programmer_table: Remove space between address operator and variable ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File programmer_table.c: https://review.coreboot.org/c/flashrom/+/56469/comment/ab7282c7_460b3e64 PS1, Line 176: const size_t programmer_table_size = ARRAY_SIZE(programmer_table); > I was told to avoid new lines at the end. But don't know if there are fixed style guidelines. coreboot has a lint check for this. My editor automatically adds the newline. -- To view, visit https://review.coreboot.org/c/flashrom/+/56469 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iba29b1bc3d77b8c17c51fc0552c129e6965fa308 Gerrit-Change-Number: 56469 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Jul 2021 09:07:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: spi_master: Add default write_aai function to masters that have none
by Victor Ding (Code Review) 21 Jul '21

21 Jul '21

Attention is currently required from: Nico Huber, David Hendricks, Thomas Heijligen, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk. Victor Ding has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56102 ) Change subject: spi_master: Add default write_aai function to masters that have none ...................................................................... Patch Set 2: (1 comment) Patchset: PS1: > The last possible use of these programmers I found was Daisy, which reached EoL in June 2019 (HP Chr […] Once this patch series merged, CB:56475 and CB:56476 will delete ene_lpc and mec1308. -- To view, visit https://review.coreboot.org/c/flashrom/+/56102 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I712e74e11244e1f0ab8d8e245fcd5207ce211219 Gerrit-Change-Number: 56102 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Victor Ding <victording(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Hendricks <david.hendricks(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Jul 2021 08:23:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Victor Ding <victording(a)google.com> Comment-In-Reply-To: David Hendricks <david.hendricks(a)gmail.com> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: Allow MEC1308 to build against DOS and libpayload
by Victor Ding (Code Review) 21 Jul '21

21 Jul '21

Victor Ding has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/55890 ) Change subject: Allow MEC1308 to build against DOS and libpayload ...................................................................... Abandoned No longer needed because of CB:56476. -- To view, visit https://review.coreboot.org/c/flashrom/+/55890 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic50fa2841b9e01b008ce82462e2b7120ee490a68 Gerrit-Change-Number: 55890 Gerrit-PatchSet: 1 Gerrit-Owner: Victor Ding <victording(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in flashrom[master]: Allow ENE_LPC to build against DOS and libpayload
by Victor Ding (Code Review) 21 Jul '21

21 Jul '21

Victor Ding has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/55889 ) Change subject: Allow ENE_LPC to build against DOS and libpayload ...................................................................... Abandoned No longer needed because of CB:56475. -- To view, visit https://review.coreboot.org/c/flashrom/+/55889 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0a7e675c344a2ccac558b8c32720930c15fe92ee Gerrit-Change-Number: 55889 Gerrit-PatchSet: 1 Gerrit-Owner: Victor Ding <victording(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in flashrom[master]: mec1308: remove MEC1308 EC programmer
by Victor Ding (Code Review) 21 Jul '21

21 Jul '21

Victor Ding has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/56476 ) Change subject: mec1308: remove MEC1308 EC programmer ...................................................................... mec1308: remove MEC1308 EC programmer Last known device that uses MEC1308 Embedded Controller has reached Auto Update Expiration (AUE) a.k.a. end-of-life. BUG=none BRANCH=none TEST=builds and ninja test passes Signed-off-by: Victor Ding <victording(a)google.com> Change-Id: I535b6380846734c999474519e9e60a73eb6a2ec4 --- M Makefile D mec1308.c M meson.build M meson_options.txt M programmer.h M programmer_table.c M tests/init_shutdown.c M tests/tests.c M tests/tests.h 9 files changed, 2 insertions(+), 602 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/76/56476/1 diff --git a/Makefile b/Makefile index 96b8c1b..f83dcc6 100644 --- a/Makefile +++ b/Makefile @@ -231,7 +231,7 @@ # For now we disable all PCI-based programmers on Windows/MinGW (no libpci). $(call mark_unsupported,$(DEPENDS_ON_LIBPCI)) # And programmers that need raw access. -$(call mark_unsupported,CONFIG_MEC1308 CONFIG_RAYER_SPI) +$(call mark_unsupported,CONFIG_RAYER_SPI) else # No MinGW @@ -253,8 +253,6 @@ $(call mark_unsupported,CONFIG_BUSPIRATE_SPI CONFIG_SERPROG CONFIG_PONY_SPI) # Dediprog, Developerbox, USB-Blaster, PICkit2, CH341A and FT2232 are not supported with libpayload (missing libusb support). $(call mark_unsupported,$(DEPENDS_ON_LIBUSB1) $(DEPENDS_ON_LIBFTDI) $(DEPENDS_ON_LIBJAYLINK)) -# Odd ones. (FIXME: why?) -$(call mark_unsupported,CONFIG_MEC1308) endif # Android is handled internally as separate OS, but it supports about the same drivers as Linux. @@ -295,7 +293,7 @@ ifneq ($(ARCH), x86) $(call mark_unsupported,CONFIG_NIC3COM CONFIG_NICREALTEK CONFIG_NICNATSEMI) $(call mark_unsupported,CONFIG_RAYER_SPI CONFIG_ATAHPT CONFIG_ATAPROMISE) -$(call mark_unsupported,CONFIG_SATAMV CONFIG_MEC1308) +$(call mark_unsupported,CONFIG_SATAMV) endif # Additionally disable all drivers needing raw access (memory, PCI, port I/O) @@ -383,9 +381,6 @@ # Always enable FT2232 SPI dongles for now. CONFIG_FT2232_SPI ?= yes -# Microchip MEC1308 Embedded Controller -CONFIG_MEC1308 ?= yes - # Always enable Altera USB-Blaster dongles for now. CONFIG_USBBLASTER_SPI ?= yes @@ -529,12 +524,6 @@ endif endif -ifeq ($(CONFIG_MEC1308), yes) -FEATURE_CFLAGS += -D'CONFIG_MEC1308=1' -PROGRAMMER_OBJS += mec1308.o -NEED_RAW_ACCESS += CONFIG_MEC1308 -endif - ifeq ($(CONFIG_SERPROG), yes) FEATURE_CFLAGS += -D'CONFIG_SERPROG=1' PROGRAMMER_OBJS += serprog.o diff --git a/mec1308.c b/mec1308.c deleted file mode 100644 index e9c6214..0000000 --- a/mec1308.c +++ /dev/null @@ -1,532 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2010-2020, Google Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following disclaimer - * in the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Google Inc. nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Alternatively, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2 as published by the Free - * Software Foundation. - */ - -#if defined(__i386__) || defined(__x86_64__) -#include <inttypes.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> - -#include "flash.h" -#include "hwaccess.h" -#include "chipdrivers.h" -#include "programmer.h" -#include "spi.h" - -#define MEC1308_SIO_PORT1 0x2e -#define MEC1308_SIO_PORT2 0x4e -#define MEC1308_SIO_ENTRY_KEY 0x55 -#define MEC1308_SIO_EXIT_KEY 0xaa - -#define MEC1308_SIOCFG_LDN 0x07 /* LDN Bank Selector */ -#define MEC1308_DEVICE_ID_REG 0x20 /* Device ID Register */ -#define MEC1308_DEVICE_ID_VAL 0x4d /* Device ID Value for MEC1308 */ -#define MEC1310_DEVICE_ID_VAL 0x04 /* Device ID Value for MEC1310 */ -#define MEC1308_DEVICE_REV 0x21 /* Device Revision ID Register */ - -#define MEC1308_MBX_CMD 0x82 /* mailbox command register offset */ -#define MEC1308_MBX_EXT_CMD 0x83 /* mailbox ext. command reg offset */ -#define MEC1308_MBX_DATA_START 0x84 /* first mailbox data register offset */ -#define MEC1308_MBX_DATA_END 0x91 /* last mailbox data register offset */ - -static unsigned int mbx_data; /* Mailbox register interface data address*/ - -/* - * These command codes depend on EC firmware. The ones listed below are input - * using the mailbox interface, though others may be input using the ACPI - * interface. Some commands also have an output value (ie pass/failure code) - * which EC writes to the mailbox command register after completion. - */ -#define MEC1308_CMD_SMI_ENABLE 0x84 -#define MEC1308_CMD_SMI_DISABLE 0x85 -#define MEC1308_CMD_ACPI_ENABLE 0x86 -#define MEC1308_CMD_ACPI_DISABLE 0x87 - -/* - * Passthru commands are also input using the mailbox interface. Passthru mode - * enter/start/end commands are special since they require a command word to - * be written to the data registers. Other passthru commands are performed - * after passthru mode has been started. - * - * Multiple passthru mode commands may be issued before ending passthru mode. - * You do not need to enter, start, and end passthru mode for each SPI - * command. However, other mailbox commands might not work when passthru mode - * is enabled. For example, you may read all SPI chip content while in passthru - * mode, but you should exit passthru mode before performing other EC commands - * such as reading fan speed. - */ -#define MEC1308_CMD_PASSTHRU 0x55 /* force EC to process word */ -#define MEC1308_CMD_PASSTHRU_SUCCESS 0xaa /* success code for passthru */ -#define MEC1308_CMD_PASSTHRU_FAIL 0xfe /* failure code for passthru */ -#define MEC1308_CMD_PASSTHRU_ENTER "PathThruMode" /* not a typo... */ -#define MEC1308_CMD_PASSTHRU_START "Start" -#define MEC1308_CMD_PASSTHRU_EXIT "End_Mode" -#define MEC1308_CMD_PASSTHRU_CS_EN 0xf0 /* chip-select enable */ -#define MEC1308_CMD_PASSTHRU_CS_DIS 0xf1 /* chip-select disable */ -#define MEC1308_CMD_PASSTHRU_SEND 0xf2 /* send byte from data0 */ -#define MEC1308_CMD_PASSTHRU_READ 0xf3 /* read byte, place in data0 */ - -typedef struct -{ - unsigned int in_sio_cfgmode; - unsigned int mbx_idx; /* Mailbox register interface index address */ - unsigned int mbx_data; /* Mailbox register interface data address*/ -} mec1308_data_t; - -static void mec1308_sio_enter(mec1308_data_t *ctx_data, uint16_t port) -{ - if (ctx_data->in_sio_cfgmode) - return; - - OUTB(MEC1308_SIO_ENTRY_KEY, port); - ctx_data->in_sio_cfgmode = 1; -} - -static void mec1308_sio_exit(mec1308_data_t *ctx_data, uint16_t port) -{ - if (!ctx_data->in_sio_cfgmode) - return; - - OUTB(MEC1308_SIO_EXIT_KEY, port); - ctx_data->in_sio_cfgmode = 0; -} - -/** probe for super i/o index - * @port: allocated buffer to store port - * - * returns 0 to indicate success, <0 to indicate error - */ -static int mec1308_get_sio_index(mec1308_data_t *ctx_data, uint16_t *port) -{ - uint16_t ports[] = { MEC1308_SIO_PORT1, - MEC1308_SIO_PORT2, - }; - size_t i; - static uint16_t port_internal, port_found = 0; - - if (port_found) { - *port = port_internal; - return 0; - } - - if (rget_io_perms()) - return -1; - - for (i = 0; i < ARRAY_SIZE(ports); i++) { - uint8_t tmp8; - - /* - * Only after config mode has been successfully entered will the - * index port will read back the last value written to it. - * So we will attempt to enter config mode, set the index - * register, and see if the index register retains the value. - * - * Note: It seems to work "best" when using a device ID register - * as the index and reading from the data port before reading - * the index port. - */ - mec1308_sio_enter(ctx_data, ports[i]); - OUTB(MEC1308_DEVICE_ID_REG, ports[i]); - tmp8 = INB(ports[i] + 1); - tmp8 = INB(ports[i]); - if ((tmp8 != MEC1308_DEVICE_ID_REG)) { - ctx_data->in_sio_cfgmode = 0; - continue; - } - - port_internal = ports[i]; - port_found = 1; - break; - } - - if (!port_found) { - msg_cdbg("\nfailed to obtain super i/o index\n"); - return -1; - } - - msg_cdbg("\nsuper i/o index = 0x%04x\n", port_internal); - *port = port_internal; - return 0; -} - -static uint8_t mbx_read(mec1308_data_t *ctx_data, uint8_t idx) -{ - OUTB(idx, ctx_data->mbx_idx); - return INB(mbx_data); -} - -static int mbx_wait(mec1308_data_t *ctx_data) -{ - int i; - int max_attempts = 10000; - int rc = 0; - - for (i = 0; mbx_read(ctx_data, MEC1308_MBX_CMD); i++) { - if (i == max_attempts) { - rc = 1; - break; - } - /* FIXME: This delay adds determinism to the delay period. It - was chosen arbitrarily thru some experiments. */ - programmer_delay(2); - } - - return rc; -} - -static int mbx_write(mec1308_data_t *ctx_data, uint8_t idx, uint8_t data) -{ - int rc = 0; - - if (idx == MEC1308_MBX_CMD && mbx_wait(ctx_data)) { - msg_perr("%s: command register not clear\n", __func__); - return 1; - } - - OUTB(idx, ctx_data->mbx_idx); - OUTB(data, mbx_data); - - if (idx == MEC1308_MBX_CMD) - rc = mbx_wait(ctx_data); - - return rc; -} - -static void mbx_clear(mec1308_data_t *ctx_data) -{ - int reg; - - for (reg = MEC1308_MBX_DATA_START; reg < MEC1308_MBX_DATA_END; reg++) - mbx_write(ctx_data, reg, 0x00); - mbx_write(ctx_data, MEC1308_MBX_CMD, 0x00); -} - -static int mec1308_exit_passthru_mode(mec1308_data_t *ctx_data) -{ - uint8_t tmp8; - size_t i; - - /* exit passthru mode */ - for (i = 0; i < strlen(MEC1308_CMD_PASSTHRU_EXIT); i++) { - mbx_write(ctx_data, MEC1308_MBX_DATA_START + i, - MEC1308_CMD_PASSTHRU_EXIT[i]); - } - - if (mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_PASSTHRU)) { - msg_pdbg("%s(): exit passthru command timed out\n", __func__); - return 1; - } - - tmp8 = mbx_read(ctx_data, MEC1308_MBX_DATA_START); - msg_pdbg("%s: result: 0x%02x ", __func__, tmp8); - if (tmp8 == MEC1308_CMD_PASSTHRU_SUCCESS) { - msg_pdbg("(exited passthru mode)\n"); - } else if (tmp8 == MEC1308_CMD_PASSTHRU_FAIL) { - msg_pdbg("(failed to exit passthru mode)\n"); - } - - return 0; -} - -static int enter_passthru_mode(mec1308_data_t *ctx_data) -{ - uint8_t tmp8; - size_t i; - - /* - * Enter passthru mode. If the EC does not successfully enter passthru - * mode the first time, we'll clear the mailbox and issue the "exit - * passthru mode" command sequence up to 3 times or until it arrives in - * a known state. - * - * Note: This workaround was developed experimentally. - */ - for (i = 0; i < 3; i++) { - size_t j; - - msg_pdbg("%s(): entering passthru mode, attempt %d out of 3\n", - __func__, (int)(i + 1)); - for (j = 0; j < strlen(MEC1308_CMD_PASSTHRU_ENTER); j++) { - mbx_write(ctx_data, MEC1308_MBX_DATA_START + j, - MEC1308_CMD_PASSTHRU_ENTER[j]); - } - - if (mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_PASSTHRU)) - msg_pdbg("%s(): enter passthru command timed out\n", - __func__); - - tmp8 = mbx_read(ctx_data, MEC1308_MBX_DATA_START); - if (tmp8 == MEC1308_CMD_PASSTHRU_SUCCESS) - break; - - msg_pdbg("%s(): command failed, clearing data registers and " - "issuing full exit passthru command...\n", __func__); - mbx_clear(ctx_data); - mec1308_exit_passthru_mode(ctx_data); - } - - if (tmp8 != MEC1308_CMD_PASSTHRU_SUCCESS) { - msg_perr("%s(): failed to enter passthru mode, result=0x%02x\n", - __func__, tmp8); - return 1; - } - - msg_pdbg("%s(): enter passthru mode return code: 0x%02x\n", - __func__, tmp8); - - /* start passthru mode */ - for (i = 0; i < strlen(MEC1308_CMD_PASSTHRU_START); i++) - mbx_write(ctx_data, MEC1308_MBX_DATA_START + i, - MEC1308_CMD_PASSTHRU_START[i]); - if (mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_PASSTHRU)) { - msg_pdbg("%s(): start passthru command timed out\n", __func__); - return 1; - } - tmp8 = mbx_read(ctx_data, MEC1308_MBX_DATA_START); - if (tmp8 != MEC1308_CMD_PASSTHRU_SUCCESS) { - msg_perr("%s(): failed to enter passthru mode, result=%02x\n", - __func__, tmp8); - return 1; - } - msg_pdbg("%s(): start passthru mode return code: 0x%02x\n", - __func__, tmp8); - - return 0; -} - -static int mec1308_shutdown(void *data) -{ - mec1308_data_t *ctx_data = (mec1308_data_t *)data; - - /* Exit passthru mode before performing commands which do not affect - the SPI ROM */ - mec1308_exit_passthru_mode(ctx_data); - - /* Re-enable SMI and ACPI. - FIXME: is there an ordering dependency? */ - if (mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_SMI_ENABLE)) - msg_pdbg("%s: unable to re-enable SMI\n", __func__); - if (mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_ACPI_ENABLE)) - msg_pdbg("%s: unable to re-enable ACPI\n", __func__); - - free(data); - return 0; -} - -static int mec1308_chip_select(mec1308_data_t *ctx_data) -{ - return mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_PASSTHRU_CS_EN); -} - -static int mec1308_chip_deselect(mec1308_data_t *ctx_data) -{ - return mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_PASSTHRU_CS_DIS); -} - -/* - * MEC1308 will not allow direct access to SPI chip from host if EC is - * connected to LPC bus. This function will forward commands issued thru - * mailbox interface to the SPI flash chip. - */ -static int mec1308_spi_send_command(const struct flashctx *flash, unsigned int writecnt, - unsigned int readcnt, - const unsigned char *writearr, - unsigned char *readarr) -{ - int rc = 0; - size_t i; - mec1308_data_t *ctx_data = (mec1308_data_t *)flash->mst->spi.data; - - if (mec1308_chip_select(ctx_data)) - return 1; - - for (i = 0; i < writecnt; i++) { - if (mbx_write(ctx_data, MEC1308_MBX_DATA_START, writearr[i]) || - mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_PASSTHRU_SEND)) { - msg_pdbg("%s: failed to issue send command\n",__func__); - rc = 1; - goto mec1308_spi_send_command_exit; - } - } - - for (i = 0; i < readcnt; i++) { - if (mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_PASSTHRU_READ)) { - msg_pdbg("%s: failed to issue read command\n",__func__); - rc = 1; - goto mec1308_spi_send_command_exit; - } - readarr[i] = mbx_read(ctx_data, MEC1308_MBX_DATA_START); - } - -mec1308_spi_send_command_exit: - rc |= mec1308_chip_deselect(ctx_data); - return rc; -} - -static const struct spi_master spi_master_mec1308 = { - .max_data_read = 256, /* FIXME: should be MAX_DATA_READ_UNLIMITED? */ - .max_data_write = 256, /* FIXME: should be MAX_DATA_WRITE_UNLIMITED? */ - .command = mec1308_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - .write_aai = default_spi_write_aai, - .shutdown = mec1308_shutdown, -}; - -static int check_params(void) -{ - int ret = 0; - char *const p = extract_programmer_param("type"); - if (p && strcmp(p, "ec")) { - msg_pdbg("mec1308 only supports \"ec\" type devices\n"); - ret = 1; - } - - free(p); - return ret; -} - -static int mec1308_init(void) -{ - uint16_t sio_port; - uint8_t device_id; - uint8_t tmp8; - mec1308_data_t *ctx_data = NULL; - - msg_pdbg("%s(): entered\n", __func__); - - ctx_data = calloc(1, sizeof(mec1308_data_t)); - if (!ctx_data) { - msg_perr("Unable to allocate space for extra context data.\n"); - return 1; - } - - if (check_params()) - goto init_err_exit; - - if (mec1308_get_sio_index(ctx_data, &sio_port) < 0) { - msg_pdbg("MEC1308 not found (probe failed).\n"); - goto init_err_exit; - } - device_id = sio_read(sio_port, MEC1308_DEVICE_ID_REG); - switch(device_id) { - case MEC1308_DEVICE_ID_VAL: - msg_pdbg("Found EC: MEC1308 (ID:0x%02x,Rev:0x%02x) on " - "sio_port:0x%x.\n", device_id, - sio_read(sio_port, MEC1308_DEVICE_REV), sio_port); - break; - case MEC1310_DEVICE_ID_VAL: - msg_pdbg("Found EC: MEC1310 (ID:0x%02x,Rev:0x%02x) on " - "sio_port:0x%x.\n", device_id, - sio_read(sio_port, MEC1308_DEVICE_REV), sio_port); - break; - default: - msg_pdbg("MEC1308 not found\n"); - goto init_err_exit; - } - - /* - * setup mailbox interface at LDN 9 - */ - sio_write(sio_port, MEC1308_SIOCFG_LDN, 0x09); - tmp8 = sio_read(sio_port, 0x30); - tmp8 |= 1; - sio_write(sio_port, 0x30, tmp8); /* activate logical device */ - - ctx_data->mbx_idx = (unsigned int)sio_read(sio_port, 0x60) << 8 | - sio_read(sio_port, 0x61); - mbx_data = ctx_data->mbx_idx + 1; - msg_pdbg("%s: mbx_idx: 0x%04x, mbx_data: 0x%04x\n", - __func__, ctx_data->mbx_idx, mbx_data); - - /* Exit Super I/O config mode */ - mec1308_sio_exit(ctx_data, sio_port); - - /* Now that we can read the mailbox, we will wait for any remaining - * command to finish.*/ - if (mbx_wait(ctx_data) != 0) { - msg_perr("%s: mailbox is not available\n", __func__); - goto init_err_exit; - } - - /* Further setup -- disable SMI and ACPI. - FIXME: is there an ordering dependency? */ - if (mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_ACPI_DISABLE)) { - msg_pdbg("%s: unable to disable ACPI\n", __func__); - goto init_err_exit; - } - - if (mbx_write(ctx_data, MEC1308_MBX_CMD, MEC1308_CMD_SMI_DISABLE)) { - msg_pdbg("%s: unable to disable SMI\n", __func__); - goto init_err_exit; - } - - /* - * Enter SPI Pass-Thru Mode after commands which do not require access - * to SPI ROM are complete. We'll start by doing the exit_passthru_mode - * sequence, which is benign if the EC is already in passthru mode. - */ - mec1308_exit_passthru_mode(ctx_data); - - if (enter_passthru_mode(ctx_data)) - goto init_err_cleanup_exit; - - internal_buses_supported |= BUS_LPC; /* for LPC <--> SPI bridging */ - - return register_spi_master(&spi_master_mec1308, ctx_data); - -init_err_cleanup_exit: - mec1308_shutdown(ctx_data); - return 1; - -init_err_exit: - free(ctx_data); - return 1; -} - -const struct programmer_entry programmer_mec1308 = { - .name = "mec1308", - .type = OTHER, - .devs.note = "Microchip MEC1308 Embedded Controller.\n", - .init = mec1308_init, - .map_flash_region = fallback_map, - .unmap_flash_region = fallback_unmap, - .delay = internal_delay, -}; - -#endif diff --git a/meson.build b/meson.build index f08ec24..fcb11c6 100644 --- a/meson.build +++ b/meson.build @@ -48,7 +48,6 @@ config_it8212 = get_option('config_it8212') config_linux_mtd = get_option('config_linux_mtd') config_linux_spi = get_option('config_linux_spi') -config_mec1308 = get_option('config_mec1308') config_mstarddc_spi = get_option('config_mstarddc_spi') config_nic3com = get_option('config_nic3com') config_nicintel_eeprom = get_option('config_nicintel_eeprom') @@ -224,10 +223,6 @@ srcs += 'linux_spi.c' cargs += '-DCONFIG_LINUX_SPI=1' endif -if config_mec1308 - srcs += 'mec1308.c' - cargs += '-DCONFIG_MEC1308=1' -endif if config_mstarddc_spi srcs += 'mstarddc_spi.c' cargs += '-DCONFIG_MSTARDDC_SPI=1' diff --git a/meson_options.txt b/meson_options.txt index fa0c90a..588ed5b 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -23,7 +23,6 @@ option('config_it8212', type : 'boolean', value : true, description : 'ITE IT8212F PATA') option('config_linux_mtd', type : 'boolean', value : true, description : 'Linux MTD interfaces') option('config_linux_spi', type : 'boolean', value : true, description : 'Linux spidev interfaces') -option('config_mec1308', type : 'boolean', value : true, description : 'Microchip MEC1308 Embedded Controller') option('config_mstarddc_spi', type : 'boolean', value : false, description : 'MSTAR DDC support') option('config_nic3com', type : 'boolean', value : true, description : '3Com NICs') option('config_nicintel_eeprom', type : 'boolean', value : true, description : 'EEPROM on Intel NICs') diff --git a/programmer.h b/programmer.h index 36bc8df..2df9af6 100644 --- a/programmer.h +++ b/programmer.h @@ -76,7 +76,6 @@ extern const struct programmer_entry programmer_linux_mtd; extern const struct programmer_entry programmer_linux_spi; extern const struct programmer_entry programmer_lspcon_i2c_spi; -extern const struct programmer_entry programmer_mec1308; extern const struct programmer_entry programmer_mstarddc_spi; extern const struct programmer_entry programmer_ni845x_spi; extern const struct programmer_entry programmer_nic3com; diff --git a/programmer_table.c b/programmer_table.c index 5bf3f1c..a7a2ad0 100644 --- a/programmer_table.c +++ b/programmer_table.c @@ -24,10 +24,6 @@ &programmer_dummy, #endif -#if CONFIG_MEC1308 == 1 - &programmer_mec1308, -#endif - #if CONFIG_NIC3COM == 1 &programmer_nic3com, #endif diff --git a/tests/init_shutdown.c b/tests/init_shutdown.c index 4e55680..20b3a4e 100644 --- a/tests/init_shutdown.c +++ b/tests/init_shutdown.c @@ -41,50 +41,6 @@ #endif } -struct mec1308_io_state { - unsigned char outb_val; -}; - -void mec1308_outb(void *state, unsigned char value, unsigned short port) -{ - struct mec1308_io_state *io_state = state; - - io_state->outb_val = value; -} - -unsigned char mec1308_inb(void *state, unsigned short port) -{ - struct mec1308_io_state *io_state = state; - - return ((port == 0x2e /* MEC1308_SIO_PORT1 */ - || port == 0x4e /* MEC1308_SIO_PORT2 */) - ? 0x20 /* MEC1308_DEVICE_ID_REG */ - : ((io_state->outb_val == 0x84 /* MEC1308_MBX_DATA_START */) - ? 0xaa /* MEC1308_CMD_PASSTHRU_SUCCESS */ - : 0)); -} - -void mec1308_init_and_shutdown_test_success(void **state) -{ -#if CONFIG_MEC1308 == 1 - struct mec1308_io_state mec1308_io_state = { 0 }; - const struct io_mock mec1308_io = { - .state = &mec1308_io_state, - .outb = mec1308_outb, - .inb = mec1308_inb, - }; - - io_mock_register(&mec1308_io); - - will_return_always(__wrap_sio_read, 0x4d); /* MEC1308_DEVICE_ID_VAL */ - run_lifecycle(state, &programmer_mec1308, ""); - - io_mock_register(NULL); -#else - skip(); -#endif -} - void linux_spi_init_and_shutdown_test_success(void **state) { /* diff --git a/tests/tests.c b/tests/tests.c index 5834769..12b601b 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -171,7 +171,6 @@ const struct CMUnitTest init_shutdown_tests[] = { cmocka_unit_test(dummy_init_and_shutdown_test_success), - cmocka_unit_test(mec1308_init_and_shutdown_test_success), cmocka_unit_test(linux_spi_init_and_shutdown_test_success), }; ret |= cmocka_run_group_tests_name("init_shutdown.c tests", init_shutdown_tests, NULL, NULL); diff --git a/tests/tests.h b/tests/tests.h index e204910..16476c2 100644 --- a/tests/tests.h +++ b/tests/tests.h @@ -42,7 +42,6 @@ /* init_shutdown.c */ void dummy_init_and_shutdown_test_success(void **state); -void mec1308_init_and_shutdown_test_success(void **state); void linux_spi_init_and_shutdown_test_success(void **state); #endif /* TESTS_H */ -- To view, visit https://review.coreboot.org/c/flashrom/+/56476 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I535b6380846734c999474519e9e60a73eb6a2ec4 Gerrit-Change-Number: 56476 Gerrit-PatchSet: 1 Gerrit-Owner: Victor Ding <victording(a)google.com> Gerrit-MessageType: newchange

1 0

Change in flashrom[master]: ene_lpc: remove ENE LPC programmer
by Victor Ding (Code Review) 21 Jul '21

21 Jul '21

Victor Ding has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/56475 ) Change subject: ene_lpc: remove ENE LPC programmer ...................................................................... ene_lpc: remove ENE LPC programmer Last known device that uses ENE LPC interface keyboard controller has reached Auto Update Expiration (AUE) a.k.a. end-of-life. BUG=none BRANCH=none TEST=builds and ninja test passes Signed-off-by: Victor Ding <victording(a)google.com> Change-Id: I3f40db22c42c04ce029c4defd837e05ebb550c9b --- M Makefile D ene_lpc.c M meson.build M meson_options.txt M programmer.h M programmer_table.c M tests/init_shutdown.c M tests/tests.c M tests/tests.h 9 files changed, 3 insertions(+), 681 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/56475/1 diff --git a/Makefile b/Makefile index a021267..96b8c1b 100644 --- a/Makefile +++ b/Makefile @@ -217,8 +217,6 @@ $(call mark_unsupported,$(DEPENDS_ON_SERIAL)) # Libraries not available for DOS $(call mark_unsupported,$(DEPENDS_ON_LIBUSB1) $(DEPENDS_ON_LIBFTDI) $(DEPENDS_ON_LIBJAYLINK)) -# Odd ones (FIXME: why are they unsupported?) -$(call mark_unsupported,CONFIG_ENE_LPC CONFIG_MEC1308) endif # FIXME: Should we check for Cygwin/MSVC as well? @@ -233,7 +231,7 @@ # For now we disable all PCI-based programmers on Windows/MinGW (no libpci). $(call mark_unsupported,$(DEPENDS_ON_LIBPCI)) # And programmers that need raw access. -$(call mark_unsupported,CONFIG_ENE_LPC CONFIG_MEC1308 CONFIG_RAYER_SPI) +$(call mark_unsupported,CONFIG_MEC1308 CONFIG_RAYER_SPI) else # No MinGW @@ -256,7 +254,7 @@ # Dediprog, Developerbox, USB-Blaster, PICkit2, CH341A and FT2232 are not supported with libpayload (missing libusb support). $(call mark_unsupported,$(DEPENDS_ON_LIBUSB1) $(DEPENDS_ON_LIBFTDI) $(DEPENDS_ON_LIBJAYLINK)) # Odd ones. (FIXME: why?) -$(call mark_unsupported,CONFIG_ENE_LPC CONFIG_MEC1308) +$(call mark_unsupported,CONFIG_MEC1308) endif # Android is handled internally as separate OS, but it supports about the same drivers as Linux. @@ -297,7 +295,7 @@ ifneq ($(ARCH), x86) $(call mark_unsupported,CONFIG_NIC3COM CONFIG_NICREALTEK CONFIG_NICNATSEMI) $(call mark_unsupported,CONFIG_RAYER_SPI CONFIG_ATAHPT CONFIG_ATAPROMISE) -$(call mark_unsupported,CONFIG_SATAMV CONFIG_ENE_LPC CONFIG_MEC1308) +$(call mark_unsupported,CONFIG_SATAMV CONFIG_MEC1308) endif # Additionally disable all drivers needing raw access (memory, PCI, port I/O) @@ -382,9 +380,6 @@ # Promise ATA controller support. CONFIG_ATAPROMISE ?= no -# ENE LPC interface keyboard controller -CONFIG_ENE_LPC ?= yes - # Always enable FT2232 SPI dongles for now. CONFIG_FT2232_SPI ?= yes @@ -534,12 +529,6 @@ endif endif -ifeq ($(CONFIG_ENE_LPC), yes) -FEATURE_CFLAGS += -D'CONFIG_ENE_LPC=1' -PROGRAMMER_OBJS += ene_lpc.o -NEED_RAW_ACCESS += CONFIG_ENE_LPC -endif - ifeq ($(CONFIG_MEC1308), yes) FEATURE_CFLAGS += -D'CONFIG_MEC1308=1' PROGRAMMER_OBJS += mec1308.o diff --git a/ene_lpc.c b/ene_lpc.c deleted file mode 100644 index 374d1fd..0000000 --- a/ene_lpc.c +++ /dev/null @@ -1,591 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2012-2020, Google Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following disclaimer - * in the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Google Inc. nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Alternatively, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2 as published by the Free - * Software Foundation. - */ - -#if defined(__i386__) || defined(__x86_64__) -#include <inttypes.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> -#include <sys/time.h> - -#include "chipdrivers.h" -#include "flash.h" -#include "programmer.h" -#include "hwaccess.h" -#include "spi.h" - -/* MCU registers */ -#define REG_EC_HWVER 0xff00 -#define REG_EC_FWVER 0xff01 -#define REG_EC_EDIID 0xff24 -#define REG_8051_CTRL 0xff14 -#define REG_EC_EXTCMD 0xff10 - -#define CPU_RESET 1 - -/* MCU SPI peripheral registers */ -#define REG_SPI_DATA 0xfeab -#define REG_SPI_COMMAND 0xfeac -#define REG_SPI_CONFIG 0xfead - -#define CFG_CSn_FORCE_LOW (1 << 4) -#define CFG_COMMAND_WRITE_ENABLE (1 << 3) -#define CFG_STATUS (1 << 1) -#define CFG_ENABLE_BUSY_STATUS_CHECK (1 << 0) - -/* Timeout */ -#define EC_COMMAND_TIMEOUT 4 -#define EC_RESTART_TIMEOUT 10 -#define ENE_SPI_DELAY_CYCLE 4 -#define EC_PAUSE_TIMEOUT 12 -#define EC_RESET_TRIES 3 - -#define ENE_KB94X_PAUSE_WAKEUP_PORT 0x64 - -#define MASK_INPUT_BUFFER_FULL 2 -#define MASK_OUTPUT_BUFFER_FULL 1 - -const int port_ene_bank = 1; -const int port_ene_offset = 2; -const int port_ene_data = 3; - -/* Supported ENE ECs, ENE_LAST should always be LAST member */ -enum ene_chip_id { - ENE_KB932 = 0, - ENE_KB94X, - ENE_LAST -}; - -/* EC state */ -enum ene_ec_state { - EC_STATE_NORMAL, - EC_STATE_IDLE, - EC_STATE_RESET, - EC_STATE_UNKNOWN -}; - -/* chip-specific parameters */ -typedef struct { - enum ene_chip_id chip_id; - uint8_t hwver; - uint8_t ediid; - uint32_t port_bios; - uint32_t port_ec_command; - uint32_t port_ec_data; - uint8_t ec_reset_cmd; - uint8_t ec_reset_data; - uint8_t ec_restart_cmd; - uint8_t ec_restart_data; - uint8_t ec_pause_cmd; - uint8_t ec_pause_data; - uint16_t ec_status_buf; - uint8_t ec_is_stopping; - uint8_t ec_is_running; - uint8_t ec_is_pausing; - uint32_t port_io_base; -} ene_chip_t; - -typedef struct -{ - /* pointer to table entry of identified chip */ - ene_chip_t *chip; - /* current ec state */ - enum ene_ec_state ec_state; - struct timeval pause_begin; -} ene_lpc_data_t; - -/* table of supported chips + parameters */ -static ene_chip_t ene_chips[] = { - { - ENE_KB932, /* chip_id */ - 0xa2, 0x02, /* hwver + ediid */ - 0x66, /* port_bios */ - 0x6c, 0x68, /* port_ec_{command,data} */ - 0x59, 0xf2, /* ec_reset_{cmd,data} */ - 0x59, 0xf9, /* ec_restart_{cmd,data} */ - 0x59, 0xf1, /* ec_pause_{cmd,data} */ - 0xf554, /* ec_status_buf */ - 0xa5, 0x00, /* ec_is_{stopping,running} masks */ - 0x33, /* ec_is_pausing mask */ - 0xfd60 /* port_io_base */ - }, - { - ENE_KB94X, /* chip_id */ - 0xa3, 0x05, /* hwver + ediid */ - 0x66, /* port_bios */ - 0x66, 0x68, /* port_ec_{command,data} */ - 0x7d, 0x10, /* ec_reset_{cmd,data} */ - 0x7f, 0x10, /* ec_restart_{cmd,data} */ - 0x7e, 0x10, /* ec_pause_{cmd,data} */ - 0xf710, /* ec_status_buf */ - 0x02, 0x00, /* ec_is_{stopping,running} masks */ - 0x01, /* ec_is_pausing mask */ - 0x0380 /* port_io_base */ - } -}; - -static void ec_command(const ene_chip_t *chip, uint8_t cmd, uint8_t data) -{ - struct timeval begin, now; - - /* Spin wait for EC input buffer empty */ - gettimeofday(&begin, NULL); - while (INB(chip->port_ec_command) & MASK_INPUT_BUFFER_FULL) { - gettimeofday(&now, NULL); - if (now.tv_sec - begin.tv_sec >= EC_COMMAND_TIMEOUT) { - msg_pdbg("%s: buf not empty\n", __func__); - return; - } - } - - /* Write command */ - OUTB(cmd, chip->port_ec_command); - - if (chip->chip_id == ENE_KB932) { - /* Spin wait for EC input buffer empty */ - gettimeofday(&begin, NULL); - while (INB(chip->port_ec_command) & MASK_INPUT_BUFFER_FULL) { - gettimeofday(&now, NULL); - if (now.tv_sec - begin.tv_sec >= EC_COMMAND_TIMEOUT) { - msg_pdbg("%s: buf not empty\n", __func__); - return; - } - } - /* Write data */ - OUTB(data, chip->port_ec_data); - } -} - -static uint8_t ene_read(const ene_chip_t *chip, uint16_t addr) -{ - uint8_t bank; - uint8_t offset; - uint8_t data; - uint32_t port_io_base; - - bank = addr >> 8; - offset = addr & 0xff; - port_io_base = chip->port_io_base; - - OUTB(bank, port_io_base + port_ene_bank); - OUTB(offset, port_io_base + port_ene_offset); - data = INB(port_io_base + port_ene_data); - - return data; -} - -static void ene_write(const ene_chip_t *chip, uint16_t addr, uint8_t data) -{ - uint8_t bank; - uint8_t offset; - uint32_t port_io_base; - - bank = addr >> 8; - offset = addr & 0xff; - port_io_base = chip->port_io_base; - - OUTB(bank, port_io_base + port_ene_bank); - OUTB(offset, port_io_base + port_ene_offset); - - OUTB(data, port_io_base + port_ene_data); -} - -/** - * wait_cycles, wait for n LPC bus clock cycles - * - * @param n: number of LPC cycles to wait - * @return void - */ -static void wait_cycles(const ene_chip_t *chip,int n) -{ - while (n--) - INB(chip->port_io_base + port_ene_bank); -} - -static int is_spicmd_write(uint8_t cmd) -{ - switch (cmd) { - case JEDEC_WREN: - /* Chip Write Enable */ - case JEDEC_EWSR: - /* Write Status Enable */ - case JEDEC_CE_60: - /* Chip Erase 0x60 */ - case JEDEC_CE_C7: - /* Chip Erase 0xc7 */ - case JEDEC_BE_52: - /* Block Erase 0x52 */ - case JEDEC_BE_D8: - /* Block Erase 0xd8 */ - case JEDEC_BE_D7: - /* Block Erase 0xd7 */ - case JEDEC_SE: - /* Sector Erase */ - case JEDEC_BYTE_PROGRAM: - /* Write memory byte */ - case JEDEC_AAI_WORD_PROGRAM: - /* Write AAI word */ - return 1; - } - return 0; -} - -static void ene_spi_start(const ene_chip_t *chip) -{ - int cfg; - - cfg = ene_read(chip, REG_SPI_CONFIG); - cfg |= CFG_CSn_FORCE_LOW; - cfg |= CFG_COMMAND_WRITE_ENABLE; - ene_write(chip, REG_SPI_CONFIG, cfg); - - wait_cycles(chip, ENE_SPI_DELAY_CYCLE); -} - -static void ene_spi_end(const ene_chip_t *chip) -{ - int cfg; - - cfg = ene_read(chip, REG_SPI_CONFIG); - cfg &= ~CFG_CSn_FORCE_LOW; - cfg |= CFG_COMMAND_WRITE_ENABLE; - ene_write(chip, REG_SPI_CONFIG, cfg); - - wait_cycles(chip, ENE_SPI_DELAY_CYCLE); -} - -static int ene_spi_wait(const ene_chip_t *chip) -{ - struct timeval begin, now; - - gettimeofday(&begin, NULL); - while (ene_read(chip, REG_SPI_CONFIG) & CFG_STATUS) { - gettimeofday(&now, NULL); - if (now.tv_sec - begin.tv_sec >= EC_COMMAND_TIMEOUT) { - msg_pdbg("%s: spi busy\n", __func__); - return 1; - } - } - return 0; -} - -static int ene_pause_ec(ene_lpc_data_t *ctx_data) -{ - struct timeval begin, now; - const ene_chip_t *chip = ctx_data->chip; - - if (!chip->ec_pause_cmd) - return -1; - - /* EC prepare pause */ - ec_command(chip, chip->ec_pause_cmd, chip->ec_pause_data); - - gettimeofday(&begin, NULL); - /* Spin wait for EC ready */ - while (ene_read(chip, chip->ec_status_buf) != chip->ec_is_pausing) { - gettimeofday(&now, NULL); - if (now.tv_sec - begin.tv_sec >= EC_COMMAND_TIMEOUT) { - msg_pdbg("%s: unable to pause ec\n", __func__); - return -1; - } - } - - gettimeofday(&ctx_data->pause_begin, NULL); - ctx_data->ec_state = EC_STATE_IDLE; - return 0; -} - -static int ene_resume_ec(ene_lpc_data_t *ctx_data) -{ - struct timeval begin, now; - const ene_chip_t *chip = ctx_data->chip; - - if (chip->chip_id == ENE_KB94X) - OUTB(0xff, ENE_KB94X_PAUSE_WAKEUP_PORT); - else - /* Trigger 8051 interrupt to resume */ - ene_write(chip, REG_EC_EXTCMD, 0xff); - - gettimeofday(&begin, NULL); - while (ene_read(chip, chip->ec_status_buf) != chip->ec_is_running) { - gettimeofday(&now, NULL); - if (now.tv_sec - begin.tv_sec >= EC_COMMAND_TIMEOUT) { - msg_pdbg("%s: unable to resume ec\n", __func__); - return -1; - } - } - - ctx_data->ec_state = EC_STATE_NORMAL; - return 0; -} - -static int ene_pause_timeout_check(ene_lpc_data_t *ctx_data) -{ - struct timeval pause_now; - gettimeofday(&pause_now, NULL); - if (pause_now.tv_sec - ctx_data->pause_begin.tv_sec >= EC_PAUSE_TIMEOUT) { - if (ene_resume_ec(ctx_data) == 0) - ene_pause_ec(ctx_data); - } - return 0; -} - -static int ene_reset_ec(ene_lpc_data_t *ctx_data) -{ - uint8_t reg; - struct timeval begin, now; - const ene_chip_t *chip = ctx_data->chip; - - gettimeofday(&begin, NULL); - - /* EC prepare reset */ - ec_command(chip, chip->ec_reset_cmd, chip->ec_reset_data); - - /* Spin wait for EC ready */ - while (ene_read(chip, chip->ec_status_buf) != chip->ec_is_stopping) { - gettimeofday(&now, NULL); - if (now.tv_sec - begin.tv_sec >= EC_COMMAND_TIMEOUT) { - msg_pdbg("%s: unable to reset ec\n", __func__); - return -1; - } - } - - /* Wait 1 second */ - sleep(1); - - /* Reset 8051 */ - reg = ene_read(chip, REG_8051_CTRL); - reg |= CPU_RESET; - ene_write(chip, REG_8051_CTRL, reg); - - ctx_data->ec_state = EC_STATE_RESET; - return 0; -} - -static int ene_enter_flash_mode(ene_lpc_data_t *ctx_data) -{ - if (ene_pause_ec(ctx_data)) - return ene_reset_ec(ctx_data); - return 0; -} - -static int ene_spi_send_command(const struct flashctx *flash, - unsigned int writecnt, - unsigned int readcnt, - const unsigned char *writearr, - unsigned char *readarr) -{ - unsigned int i; - int tries = EC_RESET_TRIES; - ene_lpc_data_t *ctx_data = (ene_lpc_data_t *)flash->mst->spi.data; - const ene_chip_t *chip = ctx_data->chip; - - if (ctx_data->ec_state == EC_STATE_IDLE && is_spicmd_write(writearr[0])) { - do { - /* Enter reset mode if we need to write/erase */ - if (ene_resume_ec(ctx_data)) - continue; - - if (!ene_reset_ec(ctx_data)) - break; - } while (--tries > 0); - - if (!tries) { - msg_perr("%s: EC failed reset, skipping write\n", __func__); - ctx_data->ec_state = EC_STATE_IDLE; - return 1; - } - } else if (chip->chip_id == ENE_KB94X && ctx_data->ec_state == EC_STATE_IDLE) { - ene_pause_timeout_check(ctx_data); - } - - ene_spi_start(chip); - - for (i = 0; i < writecnt; i++) { - ene_write(chip, REG_SPI_COMMAND, writearr[i]); - if (ene_spi_wait(chip)) { - msg_pdbg("%s: write count %d\n", __func__, i); - return 1; - } - } - - for (i = 0; i < readcnt; i++) { - /* Push data by clock the serial bus */ - ene_write(chip, REG_SPI_COMMAND, 0); - if (ene_spi_wait(chip)) { - msg_pdbg("%s: read count %d\n", __func__, i); - return 1; - } - readarr[i] = ene_read(chip, REG_SPI_DATA); - if (ene_spi_wait(chip)) { - msg_pdbg("%s: read count %d\n", __func__, i); - return 1; - } - } - - ene_spi_end(chip); - return 0; -} - -static int ene_leave_flash_mode(void *data) -{ - ene_lpc_data_t *ctx_data = (ene_lpc_data_t *)data; - const ene_chip_t *chip = ctx_data->chip; - int rv = 0; - uint8_t reg; - struct timeval begin, now; - - if (ctx_data->ec_state == EC_STATE_RESET) { - reg = ene_read(chip, REG_8051_CTRL); - reg &= ~CPU_RESET; - ene_write(chip, REG_8051_CTRL, reg); - - gettimeofday(&begin, NULL); - /* EC restart */ - while (ene_read(chip, chip->ec_status_buf) != chip->ec_is_running) { - gettimeofday(&now, NULL); - if (now.tv_sec - begin.tv_sec >= EC_RESTART_TIMEOUT) { - msg_pdbg("%s: ec restart busy\n", __func__); - rv = 1; - goto exit; - } - } - msg_pdbg("%s: send ec restart\n", __func__); - ec_command(chip, chip->ec_restart_cmd, chip->ec_restart_data); - - ctx_data->ec_state = EC_STATE_NORMAL; - rv = 0; - goto exit; - } - - rv = ene_resume_ec(ctx_data); - -exit: - /* - * Trigger ec interrupt after pause/reset by sending 0x80 - * to bios command port. - */ - OUTB(0x80, chip->port_bios); - free(data); - return rv; -} - -static const struct spi_master spi_master_ene = { - .max_data_read = 256, - .max_data_write = 256, - .command = ene_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - .write_aai = default_spi_write_aai, - .shutdown = ene_leave_flash_mode, -}; - -static int check_params(void) -{ - int ret = 0; - char *const p = extract_programmer_param("type"); - if (p && strcmp(p, "ec")) { - msg_pdbg("ene_lpc only supports \"ec\" type devices\n"); - ret = 1; - } - - free(p); - return ret; -} - -static int ene_lpc_init() -{ - uint8_t hwver, ediid, i; - ene_lpc_data_t *ctx_data = NULL; - - msg_pdbg("%s\n", __func__); - - ctx_data = calloc(1, sizeof(ene_lpc_data_t)); - if (!ctx_data) { - msg_perr("Unable to allocate space for extra context data.\n"); - return 1; - } - ctx_data->ec_state = EC_STATE_NORMAL; - - if (check_params()) - goto init_err_exit; - - for (i = 0; i < ENE_LAST; ++i) { - ctx_data->chip = &ene_chips[i]; - - hwver = ene_read(ctx_data->chip, REG_EC_HWVER); - ediid = ene_read(ctx_data->chip, REG_EC_EDIID); - - if(hwver == ene_chips[i].hwver && - ediid == ene_chips[i].ediid) { - break; - } - } - - if (i == ENE_LAST) { - msg_pdbg("ENE EC not found (probe failed)\n"); - goto init_err_exit; - } - - /* TODO: probe the EC stop protocol - * - * Compal - ec_command(0x41, 0xa1) returns 43 4f 4d 50 41 4c 9c - */ - - ene_enter_flash_mode(ctx_data); - - internal_buses_supported |= BUS_LPC; - - return register_spi_master(&spi_master_ene, ctx_data); - -init_err_exit: - free(ctx_data); - return 1; -} - -const struct programmer_entry programmer_ene_lpc = { - .name = "ene_lpc", - .type = OTHER, - .devs.note = "ENE LPC interface keyboard controller\n", - .init = ene_lpc_init, - .map_flash_region = fallback_map, - .unmap_flash_region = fallback_unmap, - .delay = internal_delay, -}; - -#endif /* __i386__ || __x86_64__ */ diff --git a/meson.build b/meson.build index 6ebf3dc..f08ec24 100644 --- a/meson.build +++ b/meson.build @@ -41,7 +41,6 @@ config_jlink_spi = get_option('config_jlink_spi') config_drkaiser = get_option('config_drkaiser') config_dummy = get_option('config_dummy') -config_ene_lpc = get_option('config_ene_lpc') config_ft2232_spi = get_option('config_ft2232_spi') config_gfxnvidia = get_option('config_gfxnvidia') config_raiden_debug_spi = get_option('config_raiden_debug_spi') @@ -213,10 +212,6 @@ cargs += '-DCONFIG_INTERNAL_DMI=1' endif endif -if config_ene_lpc - srcs += 'ene_lpc.c' - cargs += '-DCONFIG_ENE_LPC=1' -endif if config_it8212 srcs += 'it8212.c' cargs += '-DCONFIG_IT8212=1' diff --git a/meson_options.txt b/meson_options.txt index 86a38c8..fa0c90a 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -15,7 +15,6 @@ option('config_jlink_spi', type : 'boolean', value : false, description : 'SEGGER J-Link and compatible devices') option('config_drkaiser', type : 'boolean', value : true, description : 'Dr. Kaiser') option('config_dummy', type : 'boolean', value : true, description : 'dummy tracing') -option('config_ene_lpc', type : 'boolean', value : true, description : 'ENE LPC interface keyboard controller') option('config_ft2232_spi', type : 'boolean', value : true, description : 'FT2232 SPI dongles') option('config_gfxnvidia', type : 'boolean', value : true, description : 'NVIDIA graphics cards') option('config_raiden_debug_spi', type : 'boolean', value : true, description : 'ChromiumOS Servo DUT debug board') diff --git a/programmer.h b/programmer.h index ec55987..36bc8df 100644 --- a/programmer.h +++ b/programmer.h @@ -68,7 +68,6 @@ extern const struct programmer_entry programmer_digilent_spi; extern const struct programmer_entry programmer_drkaiser; extern const struct programmer_entry programmer_dummy; -extern const struct programmer_entry programmer_ene_lpc; extern const struct programmer_entry programmer_ft2232_spi; extern const struct programmer_entry programmer_gfxnvidia; extern const struct programmer_entry programmer_internal; diff --git a/programmer_table.c b/programmer_table.c index e7f2c98..5bf3f1c 100644 --- a/programmer_table.c +++ b/programmer_table.c @@ -92,10 +92,6 @@ &programmer_developerbox, #endif -#if CONFIG_ENE_LPC == 1 - &programmer_ene_lpc, -#endif - #if CONFIG_RAYER_SPI == 1 &programmer_rayer_spi, #endif diff --git a/tests/init_shutdown.c b/tests/init_shutdown.c index 48448f8..4e55680 100644 --- a/tests/init_shutdown.c +++ b/tests/init_shutdown.c @@ -85,69 +85,6 @@ #endif } -struct ene_lpc_io_state { - unsigned char outb_val; - int pause_cmd; -}; - -void ene_lpc_outb_kb932(void *state, unsigned char value, unsigned short port) -{ - struct ene_lpc_io_state *io_state = state; - - io_state->outb_val = value; - if (value == 0x59 /* ENE_KB932.ec_pause_cmd */) - io_state->pause_cmd = 1; -} - -unsigned char ene_lpc_inb_kb932(void *state, unsigned short port) -{ - struct ene_lpc_io_state *io_state = state; - unsigned char ene_hwver_offset = 0; /* REG_EC_HWVER & 0xff */ - unsigned char ene_ediid_offset = 0x24; /* REG_EC_EDIID & 0xff */ - unsigned char ec_status_buf_offset = 0x54; /* ENE_KB932.ec_status_buf & 0xff */ - - if (port == 0xfd63 /* ENE_KB932.port_io_base + port_ene_data */) { - if (io_state->outb_val == ene_hwver_offset) - return 0xa2; /* ENE_KB932.hwver */ - if (io_state->outb_val == ene_ediid_offset) - return 0x02; /* ENE_KB932.ediid */ - if (io_state->outb_val == ec_status_buf_offset) { - if (io_state->pause_cmd == 1) { - io_state->pause_cmd = 0; - return 0x33; /* ENE_KB932.ec_is_pausing mask */ - } else { - return 0x00; /* ENE_KB932.ec_is_running mask */ - } - } - } - - return 0; -} - -void ene_lpc_init_and_shutdown_test_success(void **state) -{ -#if CONFIG_ENE_LPC == 1 - /* - * Current implementation tests for chip ENE_KB932. - * Another chip which is not tested here is ENE_KB94X. - */ - struct ene_lpc_io_state ene_lpc_io_state = { 0, 0 }; - const struct io_mock ene_lpc_io = { - .state = &ene_lpc_io_state, - .outb = ene_lpc_outb_kb932, - .inb = ene_lpc_inb_kb932, - }; - - io_mock_register(&ene_lpc_io); - - run_lifecycle(state, &programmer_ene_lpc, ""); - - io_mock_register(NULL); -#else - skip(); -#endif -} - void linux_spi_init_and_shutdown_test_success(void **state) { /* diff --git a/tests/tests.c b/tests/tests.c index dcbd5af..5834769 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -172,7 +172,6 @@ const struct CMUnitTest init_shutdown_tests[] = { cmocka_unit_test(dummy_init_and_shutdown_test_success), cmocka_unit_test(mec1308_init_and_shutdown_test_success), - cmocka_unit_test(ene_lpc_init_and_shutdown_test_success), cmocka_unit_test(linux_spi_init_and_shutdown_test_success), }; ret |= cmocka_run_group_tests_name("init_shutdown.c tests", init_shutdown_tests, NULL, NULL); diff --git a/tests/tests.h b/tests/tests.h index da4f4a9..e204910 100644 --- a/tests/tests.h +++ b/tests/tests.h @@ -43,7 +43,6 @@ /* init_shutdown.c */ void dummy_init_and_shutdown_test_success(void **state); void mec1308_init_and_shutdown_test_success(void **state); -void ene_lpc_init_and_shutdown_test_success(void **state); void linux_spi_init_and_shutdown_test_success(void **state); #endif /* TESTS_H */ -- To view, visit https://review.coreboot.org/c/flashrom/+/56475 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3f40db22c42c04ce029c4defd837e05ebb550c9b Gerrit-Change-Number: 56475 Gerrit-PatchSet: 1 Gerrit-Owner: Victor Ding <victording(a)google.com> Gerrit-MessageType: newchange

1 0

Change in flashrom[master]: programmer_table: Remove space between address operator and variable
by Paul Menzel (Code Review) 21 Jul '21

21 Jul '21

Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56469 ) Change subject: programmer_table: Remove space between address operator and variable ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/56469 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iba29b1bc3d77b8c17c51fc0552c129e6965fa308 Gerrit-Change-Number: 56469 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Jul 2021 08:02:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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flashrom-gerrit July 2021