May 2021 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: sb600spi.c: Make use of new register_spi_master() API
by Edward O'Callaghan (Code Review) 23 May '21

23 May '21

Attention is currently required from: Nico Huber, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/54713 ) Change subject: sb600spi.c: Make use of new register_spi_master() API ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/54713/comment/7121d346_1a10270f PS1, Line 13: TEST=builds > we have DUT's to test with so probably a good idea to spot check a AMD board. Ack -- To view, visit https://review.coreboot.org/c/flashrom/+/54713 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id555dc5e125309883a816e00afb26d7141fd870d Gerrit-Change-Number: 54713 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Sun, 23 May 2021 22:53:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: sb600spi.c: Move sb600_spibar into spi data instead of being global
by Edward O'Callaghan (Code Review) 23 May '21

23 May '21

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/54712 ) Change subject: sb600spi.c: Move sb600_spibar into spi data instead of being global ...................................................................... sb600spi.c: Move sb600_spibar into spi data instead of being global This driver already has sb600spi_data struct, and sb600_spibar can be its member instead of being a global variable. BUG=b:185191942 TEST=builds Change-Id: Ifaad0f0a2c0e956029d2df18ddcfd092515ca3c0 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54712 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M sb600spi.c 1 file changed, 28 insertions(+), 20 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved diff --git a/sb600spi.c b/sb600spi.c index 43bf407..80ff0eb 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -40,7 +40,6 @@ *}; */ -static uint8_t *sb600_spibar = NULL; enum amd_chipset { CHIPSET_AMD_UNKNOWN, CHIPSET_SB6XX, @@ -57,6 +56,7 @@ struct sb600spi_data { struct flashctx *flash; + uint8_t *sb600_spibar; }; static int find_smbus_dev_rev(uint16_t vendor, uint16_t device) @@ -149,7 +149,7 @@ return CHIPSET_AMD_UNKNOWN; } -static void reset_internal_fifo_pointer(void) +static void reset_internal_fifo_pointer(uint8_t *sb600_spibar) { mmio_writeb(mmio_readb(sb600_spibar + 2) | 0x10, sb600_spibar + 2); @@ -158,7 +158,7 @@ msg_pspew("reset\n"); } -static int compare_internal_fifo_pointer(uint8_t want) +static int compare_internal_fifo_pointer(uint8_t want, uint8_t *sb600_spibar) { uint8_t have = mmio_readb(sb600_spibar + 0xd) & 0x07; want %= FIFO_SIZE_OLD; @@ -192,7 +192,7 @@ return 0; } -static void execute_command(void) +static void execute_command(uint8_t *sb600_spibar) { msg_pspew("Executing... "); mmio_writeb(mmio_readb(sb600_spibar + 2) | 1, sb600_spibar + 2); @@ -206,6 +206,8 @@ const unsigned char *writearr, unsigned char *readarr) { + struct sb600spi_data *sb600_data = flash->mst->spi.data; + uint8_t *sb600_spibar = sb600_data->sb600_spibar; /* First byte is cmd which can not be sent through the FIFO. */ unsigned char cmd = *writearr++; writecnt--; @@ -226,7 +228,7 @@ uint8_t readwrite = (readcnt + readoffby1) << 4 | (writecnt); mmio_writeb(readwrite, sb600_spibar + 1); - reset_internal_fifo_pointer(); + reset_internal_fifo_pointer(sb600_spibar); msg_pspew("Filling FIFO: "); unsigned int count; for (count = 0; count < writecnt; count++) { @@ -234,16 +236,16 @@ mmio_writeb(writearr[count], sb600_spibar + 0xC); } msg_pspew("\n"); - if (compare_internal_fifo_pointer(writecnt)) + if (compare_internal_fifo_pointer(writecnt, sb600_spibar)) return SPI_PROGRAMMER_ERROR; /* * We should send the data in sequence, which means we need to reset * the FIFO pointer to the first byte we want to send. */ - reset_internal_fifo_pointer(); - execute_command(); - if (compare_internal_fifo_pointer(writecnt + readcnt)) + reset_internal_fifo_pointer(sb600_spibar); + execute_command(sb600_spibar); + if (compare_internal_fifo_pointer(writecnt + readcnt, sb600_spibar)) return SPI_PROGRAMMER_ERROR; /* @@ -257,7 +259,7 @@ * the opcode, the FIFO already stores the response from the chip. * Usually, the chip will respond with 0x00 or 0xff. */ - reset_internal_fifo_pointer(); + reset_internal_fifo_pointer(sb600_spibar); /* Skip the bytes we sent. */ msg_pspew("Skipping: "); @@ -265,7 +267,7 @@ msg_pspew("[%02x]", mmio_readb(sb600_spibar + 0xC)); } msg_pspew("\n"); - if (compare_internal_fifo_pointer(writecnt)) + if (compare_internal_fifo_pointer(writecnt, sb600_spibar)) return SPI_PROGRAMMER_ERROR; msg_pspew("Reading FIFO: "); @@ -274,7 +276,7 @@ msg_pspew("[%02x]", readarr[count]); } msg_pspew("\n"); - if (compare_internal_fifo_pointer(writecnt+readcnt)) + if (compare_internal_fifo_pointer(writecnt+readcnt, sb600_spibar)) return SPI_PROGRAMMER_ERROR; if (mmio_readb(sb600_spibar + 1) != readwrite) { @@ -292,6 +294,8 @@ const unsigned char *writearr, unsigned char *readarr) { + struct sb600spi_data *sb600_data = flash->mst->spi.data; + uint8_t *sb600_spibar = sb600_data->sb600_spibar; /* First byte is cmd which can not be sent through the buffer. */ unsigned char cmd = *writearr++; writecnt--; @@ -314,7 +318,7 @@ } msg_pspew("\n"); - execute_command(); + execute_command(sb600_spibar); msg_pspew("Reading buffer: "); for (count = 0; count < readcnt; count++) { @@ -353,7 +357,7 @@ "Fast Read", }; -static int set_speed(struct pci_dev *dev, enum amd_chipset amd_gen, uint8_t speed) +static int set_speed(struct pci_dev *dev, enum amd_chipset amd_gen, uint8_t speed, uint8_t *sb600_spibar) { bool success = false; @@ -376,7 +380,7 @@ return 0; } -static int set_mode(struct pci_dev *dev, uint8_t mode) +static int set_mode(struct pci_dev *dev, uint8_t mode, uint8_t *sb600_spibar) { msg_pdbg("Setting SPI read mode to %s (%i)... ", spireadmodes[mode], mode); uint32_t tmp = mmio_readl(sb600_spibar + 0x00); @@ -391,7 +395,7 @@ return 0; } -static int handle_speed(struct pci_dev *dev, enum amd_chipset amd_gen) +static int handle_speed(struct pci_dev *dev, enum amd_chipset amd_gen, uint8_t *sb600_spibar) { uint32_t tmp; int16_t spispeed_idx = -1; @@ -459,7 +463,7 @@ msg_perr("Warning: spireadmode not set, " "leaving spireadmode unchanged."); } - else if (set_mode(dev, spireadmode_idx) != 0) { + else if (set_mode(dev, spireadmode_idx, sb600_spibar) != 0) { return 1; } @@ -502,7 +506,7 @@ msg_perr("Warning: spispeed not set, leaving spispeed unchanged."); return 0; } - return set_speed(dev, amd_gen, spispeed_idx); + return set_speed(dev, amd_gen, spispeed_idx, sb600_spibar); } static int handle_imc(struct pci_dev *dev, enum amd_chipset amd_gen) @@ -598,9 +602,11 @@ static int sb600spi_shutdown(void *data) { - struct flashctx *flash = ((struct sb600spi_data *)data)->flash; + struct sb600spi_data *sb600_data = data; + struct flashctx *flash = sb600_data->flash; if (flash) finalize_flash_access(flash); + free(data); return 0; } @@ -610,6 +616,7 @@ struct pci_dev *smbus_dev; uint32_t tmp; uint8_t reg; + uint8_t *sb600_spibar = NULL; /* Read SPI_BaseAddr */ tmp = pci_read_long(dev, 0xa0); @@ -764,7 +771,7 @@ return 0; } - if (handle_speed(dev, amd_gen) != 0) + if (handle_speed(dev, amd_gen, sb600_spibar) != 0) return ERROR_FATAL; if (handle_imc(dev, amd_gen) != 0) @@ -777,6 +784,7 @@ } data->flash = NULL; + data->sb600_spibar = sb600_spibar; register_shutdown(sb600spi_shutdown, data); spi_master_sb600.data = data; -- To view, visit https://review.coreboot.org/c/flashrom/+/54712 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ifaad0f0a2c0e956029d2df18ddcfd092515ca3c0 Gerrit-Change-Number: 54712 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in flashrom[master]: tests: Add unit test to run init/shutdown for mec1308.c, ene_lpc.c
by Anastasia Klimchuk (Code Review) 23 May '21

23 May '21

Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/51487 ) Change subject: tests: Add unit test to run init/shutdown for mec1308.c, ene_lpc.c ...................................................................... Patch Set 18: (1 comment) Patchset: PS18: I rebased this patch on the top of the recent changes in meson.build, all good, tests are running happily. So this is ready (again :)) There are lots of +1s here, please tell me if there's anything else I can do to get a +2, I am happy to work more on that if needed. Thank you!! -- To view, visit https://review.coreboot.org/c/flashrom/+/51487 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3af612defe1af3850dfc1626a208d873e3a3eddc Gerrit-Change-Number: 51487 Gerrit-PatchSet: 18 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 23 May 2021 22:43:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: dummyflasher.c: Replace atoi() with strtoul()
by Anastasia Klimchuk (Code Review) 23 May '21

23 May '21

Attention is currently required from: Edward O'Callaghan, Angel Pons. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/54854 ) Change subject: dummyflasher.c: Replace atoi() with strtoul() ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/54854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib9e66016a2f4ce2d13b833c261f900cab80916b7 Gerrit-Change-Number: 54854 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 23 May 2021 22:10:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: drkaiser.c: Reshuffle to remove forward declarations
by Anastasia Klimchuk (Code Review) 23 May '21

23 May '21

Attention is currently required from: Edward O'Callaghan. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/54850 ) Change subject: drkaiser.c: Reshuffle to remove forward declarations ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/54850 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iee550dc8055eabfe8c7c4ad32003b6eec4f1e496 Gerrit-Change-Number: 54850 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Sun, 23 May 2021 22:07:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: dummyflasher.c: Move 'spi_write_256_chunksize' into emu_data
by Edward O'Callaghan (Code Review) 23 May '21

23 May '21

Attention is currently required from: Namyoon Woo. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/54721 ) Change subject: dummyflasher.c: Move 'spi_write_256_chunksize' into emu_data ...................................................................... Patch Set 2: (1 comment) File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/54721/comment/9e16b0ef_3c6cf6e1 PS2, Line 713: data->spi_write_256_chunksize = atoi(tmp); > For another patch: This can result in overflow because `spi_write_256_chunksize` is of an unsigned t […] Indeed, Thanks as always Angel. I noticed one other atoi rot in serprog.c too. https://review.coreboot.org/c/flashrom/+/54854 -- To view, visit https://review.coreboot.org/c/flashrom/+/54721 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I633f4df4bd47e661cd69801f21910b667899d505 Gerrit-Change-Number: 54721 Gerrit-PatchSet: 2 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Namyoon Woo <namyoon(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Namyoon Woo <namyoon(a)google.com> Gerrit-Comment-Date: Sun, 23 May 2021 12:25:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: dummyflasher.c: Replace atoi() with strtoul()
by Edward O'Callaghan (Code Review) 23 May '21

23 May '21

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/54854 ) Change subject: dummyflasher.c: Replace atoi() with strtoul() ...................................................................... dummyflasher.c: Replace atoi() with strtoul() BUG=none BRANCH=none TEST=builds Change-Id: Ib9e66016a2f4ce2d13b833c261f900cab80916b7 Spotted-by: Angel Pons <th3fanbus(a)gmail.com> Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M dummyflasher.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/54854/1 diff --git a/dummyflasher.c b/dummyflasher.c index 2f39c98..4661f3d 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -668,6 +668,7 @@ #if EMULATE_CHIP struct stat image_stat; #endif + char *endptr; struct emu_data *data = calloc(1, sizeof(struct emu_data)); if (!data) { @@ -710,9 +711,9 @@ tmp = extract_programmer_param("spi_write_256_chunksize"); if (tmp) { - data->spi_write_256_chunksize = atoi(tmp); + data->spi_write_256_chunksize = strtoul(tmp, &endptr, 0); free(tmp); - if (data->spi_write_256_chunksize < 1) { + if (*endptr != '\0' || data->spi_write_256_chunksize < 1) { msg_perr("invalid spi_write_256_chunksize\n"); return 1; } @@ -977,7 +978,6 @@ #ifdef EMULATE_SPI_CHIP status = extract_programmer_param("spi_status"); if (status) { - char *endptr; errno = 0; data->emu_status = strtoul(status, &endptr, 0); free(status); -- To view, visit https://review.coreboot.org/c/flashrom/+/54854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib9e66016a2f4ce2d13b833c261f900cab80916b7 Gerrit-Change-Number: 54854 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: dummyflasher.c: Move 'flashchip_contents' into emu_data
by Edward O'Callaghan (Code Review) 23 May '21

23 May '21

Attention is currently required from: Namyoon Woo. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/54722 ) Change subject: dummyflasher.c: Move 'flashchip_contents' into emu_data ...................................................................... Patch Set 2: (1 comment) File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/54722/comment/5df3c737_dd2bc13e PS2, Line 987: return 1; > There's lots of memory leaks here, e.g. `data` and `flashchip_contents`. […] I'll leave that for https://review.coreboot.org/c/flashrom/+/54748 to resolve. -- To view, visit https://review.coreboot.org/c/flashrom/+/54722 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I11dfe713dd2fecfd3981ab50e31c9215d00bc787 Gerrit-Change-Number: 54722 Gerrit-PatchSet: 2 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Namyoon Woo <namyoon(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Namyoon Woo <namyoon(a)google.com> Gerrit-Comment-Date: Sun, 23 May 2021 12:17:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: meson/: Add missing config for NI845_SPI drv
by Edward O'Callaghan (Code Review) 23 May '21

23 May '21

Attention is currently required from: Miklós Márton, Angel Pons. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/54849 ) Change subject: meson/: Add missing config for NI845_SPI drv ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Yes, NI-845x is only available on Windows. […] yep meson works on Windows. I have been trying to get this to work with mingw64 locally to make process with somehow get this building in the buildbot to improve build coverage. Thanks for the feedback Miklós! The dependency() call should theoretically send the toolchain the correct CFLAGS but I would be interested to hear what actually happens on a real Windows box? -- To view, visit https://review.coreboot.org/c/flashrom/+/54849 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I85387e94f1b159733d0124f1a6dfde1e3d16827f Gerrit-Change-Number: 54849 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 23 May 2021 11:51:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Miklós Márton <martonmiklosqdev(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: meson/: Add missing config for NI845_SPI drv
by Miklós Márton (Code Review) 23 May '21

23 May '21

Attention is currently required from: Edward O'Callaghan. Miklós Márton has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/54849 ) Change subject: meson/: Add missing config for NI845_SPI drv ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > AFAIK, NI845_SPI is Windows-only. […] Yes, NI-845x is only available on Windows. I am not a Meson expert, by reading the Meson's website it could ran on Windows. However: If you check the Makefile getting flashrom compiled with NI-845x support is more complicated than linking to the libni845x library. Depending on the 32/64 bit installation of the NI library separate linker and include paths needs to be passed to the compiler. -- To view, visit https://review.coreboot.org/c/flashrom/+/54849 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I85387e94f1b159733d0124f1a6dfde1e3d16827f Gerrit-Change-Number: 54849 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Sun, 23 May 2021 10:34:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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