April 2021 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: jlink_spi.c: Refactor singleton states into reentrant pattern
by Angel Pons (Code Review) 21 Apr '21

21 Apr '21

Attention is currently required from: Miklós Márton, Anastasia Klimchuk. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52560 ) Change subject: jlink_spi.c: Refactor singleton states into reentrant pattern ...................................................................... Patch Set 1: (1 comment) File jlink_spi.c: https://review.coreboot.org/c/flashrom/+/52560/comment/0f91c681_d4252739 PS1, Line 55: jaylink_c > The `jaylink_` prefix on these two members is no longer needed imho. […] I'd move the `jaylink` part to the variable name, maybe shorten it to `jlink`. For example: static bool assert_cs(struct jlink_spi_data *jlink_data) { int ret; if (jlink_data->reset_cs) { ret = jaylink_clear_reset(jlink_data->devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_clear_reset() failed: %s.\n", jaylink_strerror(ret)); return false; } } else { ret = jaylink_jtag_clear_trst(jlink_data->devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_jtag_clear_trst() failed: %s.\n", jaylink_strerror(ret)); return false; } } return true; } I would highly prefer to make a separate commit to change this. This kind of change should be reproducible. -- To view, visit https://review.coreboot.org/c/flashrom/+/52560 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If13ad0c979ccf62ca4ccbd479d471c657895ef59 Gerrit-Change-Number: 52560 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sam McNally <sammc(a)google.com> Gerrit-Attention: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Apr 2021 09:08:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: dummyflasher.c: Fix memory leak on shutdown
by Edward O'Callaghan (Code Review) 21 Apr '21

21 Apr '21

Attention is currently required from: Nico Huber, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52557 ) Change subject: dummyflasher.c: Fix memory leak on shutdown ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/52557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I36f76d84d3547d081c64857e06da23ee63cc5594 Gerrit-Change-Number: 52557 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Apr 2021 06:31:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: jlink_spi.c: Refactor singleton states into reentrant pattern
by Edward O'Callaghan (Code Review) 21 Apr '21

21 Apr '21

Attention is currently required from: Angel Pons, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52560 ) Change subject: jlink_spi.c: Refactor singleton states into reentrant pattern ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File jlink_spi.c: https://review.coreboot.org/c/flashrom/+/52560/comment/f7a3cd10_ba9b7b78 PS1, Line 55: jaylink_c The `jaylink_` prefix on these two members is no longer needed imho. Although such a change doesn't need to happen in this commit. -- To view, visit https://review.coreboot.org/c/flashrom/+/52560 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If13ad0c979ccf62ca4ccbd479d471c657895ef59 Gerrit-Change-Number: 52560 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sam McNally <sammc(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Apr 2021 06:30:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: jlink_spi.c: Refactor singleton states into reentrant pattern
by Anastasia Klimchuk (Code Review) 21 Apr '21

21 Apr '21

Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/52560 ) Change subject: jlink_spi.c: Refactor singleton states into reentrant pattern ...................................................................... jlink_spi.c: Refactor singleton states into reentrant pattern Move global singleton states into a struct and store within the spi_master data field for the life-time of the driver. This is one of the steps on the way to move spi_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". TEST=builds BUG=b:185191942 Change-Id: If13ad0c979ccf62ca4ccbd479d471c657895ef59 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M jlink_spi.c 1 file changed, 47 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/60/52560/1 diff --git a/jlink_spi.c b/jlink_spi.c index 3d86764..097b0fb 100644 --- a/jlink_spi.c +++ b/jlink_spi.c @@ -51,23 +51,25 @@ /* Minimum target voltage required for operation in mV. */ #define MIN_TARGET_VOLTAGE 1200 -static struct jaylink_context *jaylink_ctx; -static struct jaylink_device_handle *jaylink_devh; -static bool reset_cs; +struct jlink_spi_data { + struct jaylink_context *jaylink_ctx; + struct jaylink_device_handle *jaylink_devh; + bool reset_cs; +}; -static bool assert_cs(void) +static bool assert_cs(struct jlink_spi_data *spi_data) { int ret; - if (reset_cs) { - ret = jaylink_clear_reset(jaylink_devh); + if (spi_data->reset_cs) { + ret = jaylink_clear_reset(spi_data->jaylink_devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_clear_reset() failed: %s.\n", jaylink_strerror(ret)); return false; } } else { - ret = jaylink_jtag_clear_trst(jaylink_devh); + ret = jaylink_jtag_clear_trst(spi_data->jaylink_devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_jtag_clear_trst() failed: %s.\n", jaylink_strerror(ret)); @@ -78,19 +80,19 @@ return true; } -static bool deassert_cs(void) +static bool deassert_cs(struct jlink_spi_data *spi_data) { int ret; - if (reset_cs) { - ret = jaylink_set_reset(jaylink_devh); + if (spi_data->reset_cs) { + ret = jaylink_set_reset(spi_data->jaylink_devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_set_reset() failed: %s.\n", jaylink_strerror(ret)); return false; } } else { - ret = jaylink_jtag_set_trst(jaylink_devh); + ret = jaylink_jtag_set_trst(spi_data->jaylink_devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_jtag_set_trst() failed: %s.\n", jaylink_strerror(ret)); @@ -106,6 +108,7 @@ { uint32_t length; uint8_t *buffer; + struct jlink_spi_data *spi_data = flash->mst->spi.data; length = writecnt + readcnt; @@ -124,14 +127,15 @@ memset(buffer + writecnt, 0x00, readcnt); - if (!assert_cs()) { + if (!assert_cs(spi_data)) { free(buffer); return SPI_PROGRAMMER_ERROR; } int ret; - ret = jaylink_jtag_io(jaylink_devh, buffer, buffer, buffer, length * 8, JAYLINK_JTAG_VERSION_2); + ret = jaylink_jtag_io(spi_data->jaylink_devh, + buffer, buffer, buffer, length * 8, JAYLINK_JTAG_VERSION_2); if (ret != JAYLINK_OK) { msg_perr("jaylink_jtag_io() failed: %s.\n", jaylink_strerror(ret)); @@ -139,7 +143,7 @@ return SPI_PROGRAMMER_ERROR; } - if (!deassert_cs()) { + if (!deassert_cs(spi_data)) { free(buffer); return SPI_PROGRAMMER_ERROR; } @@ -151,7 +155,7 @@ return 0; } -static const struct spi_master spi_master_jlink_spi = { +static struct spi_master spi_master_jlink_spi = { /* Maximum data read size in one go (excluding opcode+address). */ .max_data_read = JTAG_MAX_TRANSFER_SIZE - 5, /* Maximum data write size in one go (excluding opcode+address). */ @@ -166,11 +170,14 @@ static int jlink_spi_shutdown(void *data) { - if (jaylink_devh) - jaylink_close(jaylink_devh); + struct jlink_spi_data *spi_data = data; + if (spi_data->jaylink_devh) + jaylink_close(spi_data->jaylink_devh); - jaylink_exit(jaylink_ctx); + jaylink_exit(spi_data->jaylink_ctx); + /* jaylink_ctx, jaylink_devh are freed by jaylink_close and jaylink_exit */ + free(spi_data); return 0; } @@ -178,6 +185,10 @@ { char *arg; unsigned long speed = 0; + struct jaylink_context *jaylink_ctx = NULL; + struct jaylink_device_handle *jaylink_devh = NULL; + bool reset_cs; + struct jlink_spi_data *spi_data = NULL; arg = extract_programmer_param("spispeed"); @@ -443,11 +454,23 @@ msg_pdbg("SPI speed: %lu kHz\n", speed); + spi_data = calloc(1, sizeof(*spi_data)); + if (!spi_data) { + msg_perr("Unable to allocate space for SPI master data\n"); + goto init_err; + } + + /* jaylink_ctx, jaylink_devh are allocated by jaylink_init and jaylink_open */ + spi_data->jaylink_ctx = jaylink_ctx; + spi_data->jaylink_devh = jaylink_devh; + spi_data->reset_cs = reset_cs; + spi_master_jlink_spi.data = spi_data; + /* Ensure that the CS signal is not active initially. */ - if (!deassert_cs()) + if (!deassert_cs(spi_data)) goto init_err; - if (register_shutdown(jlink_spi_shutdown, NULL)) + if (register_shutdown(jlink_spi_shutdown, spi_data)) goto init_err; register_spi_master(&spi_master_jlink_spi); @@ -459,5 +482,9 @@ jaylink_exit(jaylink_ctx); + /* jaylink_ctx, jaylink_devh are freed by jaylink_close and jaylink_exit */ + if (spi_data) + free(spi_data); + return 1; } -- To view, visit https://review.coreboot.org/c/flashrom/+/52560 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If13ad0c979ccf62ca4ccbd479d471c657895ef59 Gerrit-Change-Number: 52560 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: dummyflasher.c: Fix memory leak on shutdown
by Angel Pons (Code Review) 21 Apr '21

21 Apr '21

Attention is currently required from: Nico Huber, Edward O'Callaghan, Anastasia Klimchuk. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52557 ) Change subject: dummyflasher.c: Fix memory leak on shutdown ...................................................................... Patch Set 1: (2 comments) File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/52557/comment/8881bc78_27d911c1 PS1, Line 716: return 1; > Yes it does. […] Ack https://review.coreboot.org/c/flashrom/+/52557/comment/3eab97d5_373043d0 PS1, Line 986: return 1; > Yes, malloc should be at the end I think. […] Sounds good! -- To view, visit https://review.coreboot.org/c/flashrom/+/52557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I36f76d84d3547d081c64857e06da23ee63cc5594 Gerrit-Change-Number: 52557 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Apr 2021 00:19:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: dummyflasher.c: Fix memory leak on shutdown
by Anastasia Klimchuk (Code Review) 21 Apr '21

21 Apr '21

Attention is currently required from: Nico Huber, Edward O'Callaghan. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52557 ) Change subject: dummyflasher.c: Fix memory leak on shutdown ...................................................................... Patch Set 1: (3 comments) File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/52557/comment/b2790067_ae6a8915 PS1, Line 716: return 1; > Doesn't `data` leak here as well? And also in the other return paths. Yes it does. I think dummy needs refactoring of init, to allocate data at the very end of init (instead of the very beginning) and also to make sure all init failure paths do cleanup. I am doing this gradually for the tree, it's just dummy's turn hasn't come yet! https://review.coreboot.org/c/flashrom/+/52557/comment/eecb8945_70377042 PS1, Line 982: free(status); > For another patch: this is the same story as CB:46551 Thanks for the link, I will definitely look at this. https://review.coreboot.org/c/flashrom/+/52557/comment/c0321413_ec6c46dd PS1, Line 986: return 1; > `flashchip_contents` also leaks here. We could also move this check to run before the malloc() call. […] Yes, malloc should be at the end I think. I would [ideally] submit this one first, if possible, so that I won't need to merge with myself. -- To view, visit https://review.coreboot.org/c/flashrom/+/52557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I36f76d84d3547d081c64857e06da23ee63cc5594 Gerrit-Change-Number: 52557 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Wed, 21 Apr 2021 00:01:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: lspcon, realtek_mst: move i2c bus resolution from params to i2c_helper
by Peter Marheine (Code Review) 21 Apr '21

21 Apr '21

Attention is currently required from: Sam McNally, Angel Pons. Peter Marheine has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52405 ) Change subject: lspcon, realtek_mst: move i2c bus resolution from params to i2c_helper ...................................................................... Patch Set 9: (1 comment) File i2c_helper_linux.c: https://review.coreboot.org/c/flashrom/+/52405/comment/40e0f7cf_c0a42434 PS8, Line 48: { > nit: another brace that needs to be moved Done -- To view, visit https://review.coreboot.org/c/flashrom/+/52405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ieea57b2445f3aca16c87d8f839dff131009531a0 Gerrit-Change-Number: 52405 Gerrit-PatchSet: 9 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 20 Apr 2021 23:20:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: lspcon, realtek_mst: move i2c bus resolution from params to i2c_helper
by Peter Marheine (Code Review) 21 Apr '21

21 Apr '21

Attention is currently required from: Sam McNally, Peter Marheine. Hello Sam McNally, build bot (Jenkins), Edward O'Callaghan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/52405 to look at the new patch set (#9). Change subject: lspcon, realtek_mst: move i2c bus resolution from params to i2c_helper ...................................................................... lspcon, realtek_mst: move i2c bus resolution from params to i2c_helper The general pattern of taking either a bus number or device path should apply to both of these programmers, so change the I2C API to provide a common way to get the device path and reduce the duplication between the two programmers. TEST=Both programmers now accept either bus= or devpath= Change-Id: Ieea57b2445f3aca16c87d8f839dff131009531a0 --- M i2c_helper.h M i2c_helper_linux.c M lspcon_i2c_spi.c M realtek_mst_i2c_spi.c 4 files changed, 90 insertions(+), 128 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/52405/9 -- To view, visit https://review.coreboot.org/c/flashrom/+/52405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ieea57b2445f3aca16c87d8f839dff131009531a0 Gerrit-Change-Number: 52405 Gerrit-PatchSet: 9 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: dummyflasher.c: Fix memory leak on shutdown
by Angel Pons (Code Review) 21 Apr '21

21 Apr '21

Attention is currently required from: Nico Huber, Edward O'Callaghan, Anastasia Klimchuk. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52557 ) Change subject: dummyflasher.c: Fix memory leak on shutdown ...................................................................... Patch Set 1: Code-Review+2 (4 comments) Patchset: PS1: +2 because the patch does what the commit message says, but I noticed some more issues. I'm fine with fixing them in separate commits. File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/52557/comment/77c93734_f899fb6a PS1, Line 716: return 1; Doesn't `data` leak here as well? And also in the other return paths. https://review.coreboot.org/c/flashrom/+/52557/comment/e94bc837_a85b1320 PS1, Line 982: free(status); For another patch: this is the same story as CB:46551 https://review.coreboot.org/c/flashrom/+/52557/comment/dbeb100e_0053c97f PS1, Line 986: return 1; `flashchip_contents` also leaks here. We could also move this check to run before the malloc() call. I would suggest fixing this in a separate commit. -- To view, visit https://review.coreboot.org/c/flashrom/+/52557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I36f76d84d3547d081c64857e06da23ee63cc5594 Gerrit-Change-Number: 52557 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Tue, 20 Apr 2021 22:16:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: hwaccess.h: Split hwaccess.h and extract hwaccess_io.h out of it
by Anastasia Klimchuk (Code Review) 21 Apr '21

21 Apr '21

Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52499 ) Change subject: hwaccess.h: Split hwaccess.h and extract hwaccess_io.h out of it ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/52499/comment/f8ff4a32_7abedbdb PS3, Line 10: . > "by <insert mechanism here>." […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/52499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idd04c7b36b24e9da339348a015df4f43a03744f7 Gerrit-Change-Number: 52499 Gerrit-PatchSet: 4 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 20 Apr 2021 22:12:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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