Angel Pons has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/49270 )
Change subject: bitbang_spi.c: Do not set MOSI during initialization
......................................................................
Abandoned
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Drew Fustini has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/51113 )
Change subject: Add support for GD25LQ256D
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Patch Set 1:
(1 comment)
Patchset:
PS1:
I have to admit this is the first time I've looked at the flashrom source code so I may not be the best person to submit this patch. I can say though that I able able to both write and read a 32MiB binary to this part OK. I put verbose logs of reading and writing successfully to the chip in this gist: https://gist.github.com/pdp7/d3939139c07f76bb2d0bf1294b35db7a Is there additional information that would be useful for me to provide?
Thank you,
Drew
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Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/51401 )
Change subject: chipset_enable.c: Add PCI ID for Comet Lake U Base
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chipset_enable.c: Add PCI ID for Comet Lake U Base
TEST=`flashrom -r` on a kindred chromebook with a Celeron 5205U.
Change-Id: I627dcacdad167343287ac0ec26b47505c2f823ee
Signed-off-by: Sam McNally <sammc(a)chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51401
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org>
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
---
M chipset_enable.c
1 file changed, 1 insertion(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Angel Pons: Looks good to me, approved
Edward O'Callaghan: Looks good to me, approved
diff --git a/chipset_enable.c b/chipset_enable.c
index 138cb12..d5c10c4 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2020,6 +2020,7 @@
{0x8086, 0x9d58, B_S, NT, "Intel", "Kaby Lake U Premium", enable_flash_pch100},
{0x8086, 0x9d84, B_S, DEP, "Intel", "Cannon Lake U Premium", enable_flash_pch300},
{0x8086, 0x0284, B_S, DEP, "Intel", "Comet Lake U Premium", enable_flash_pch400},
+ {0x8086, 0x0285, B_S, DEP, "Intel", "Comet Lake U Base", enable_flash_pch400},
{0x8086, 0xa141, B_S, NT, "Intel", "Sunrise Point Desktop Sample", enable_flash_pch100},
{0x8086, 0xa142, B_S, NT, "Intel", "Sunrise Point Unknown Sample", enable_flash_pch100},
{0x8086, 0xa143, B_S, DEP, "Intel", "H110", enable_flash_pch100},
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Douglas Anderson has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/50206 )
Change subject: linux_mtd: Switch fopen() to open() for MTD devices
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Patch Set 2:
(1 comment)
Patchset:
PS1:
> Sorry for the delay and thanks for driving changes in upstream first. This does seems fine to me, however, I guess the commit message needs a bit more convincing elaboration for anyone not familiar with the complete context here.
OK, I updated the description. Please confirm that it looks OK now.
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Hello Hung-Te Lin, build bot (Jenkins), Edward O'Callaghan, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/50206
to look at the new patch set (#2).
Change subject: linux_mtd: Switch fopen() to open() for MTD devices
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linux_mtd: Switch fopen() to open() for MTD devices
There's no benefit to using the higher level "FILE *" for file
operations for writing to mtd devices. Let's move to the lower level
ones which matches the kernel more closely.
For background here, using the higher level "FILE *" operations:
* Gives us access to a bunch of higher level functions for file reading
like fscanf(), fgets(), fgetc(), fflush(), ... Many of those are
just wrappers for the lower level operations. Those that aren't
(like fscanf) are things that we don't need for dealing with flash.
* By default provides higher performance by buffering things behind
our back. This is actually something we specifically _don't_ want
because if we send a command like "erase" the C library doesn't know
to throw away its buffers. NOTE: we actually already turned off
buffering in commit a2f2f3f5ee1b ("linux_mtd: Disable buffering on
the mtd device").
So in summary: this change is a no-op but simply removes a layer of
overhead / translation that we just don't need.
Signed-off-by: Douglas Anderson <dianders(a)chromium.org>
Change-Id: Ifeb00b049ba5aa0bc8fdc591ac1f9861ad5d428d
---
M linux_mtd.c
1 file changed, 16 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/06/50206/2
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