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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60272 )
Change subject: ichspi: Remove unneeded line breaks, add useful ones
......................................................................
Patch Set 4: Code-Review+2
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/60272/comment/eee6416f_28d713ca
PS4, Line 7: ichspi: Remove unneeded line breaks, add useful ones
There are also some other changes, e.g. added tabs.
https://review.coreboot.org/c/flashrom/+/60272/comment/51afc439_f241d26f
PS4, Line 13: 2) probe and read on Panther Point (7 series PCH)
Not this patch, actually. Also, a better test would be to check if the binary stays the same ;)
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Change subject: ichspi: Split very long init function into two
......................................................................
Patch Set 5: Code-Review+2
(1 comment)
Patchset:
PS5:
Nothing more to be done but waiting for a test, I suppose :)
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Change subject: ichspi: Split very long init function into two
......................................................................
Patch Set 5:
(1 comment)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/58735/comment/8729a9b6_1702a483
PS1, Line 1717: msg_pdbg("0x00: 0x%04x (SPIS)\n",
: mmio_readw(spibar + 0));
: msg_pdbg("0x02: 0x%04x (SPIC)\n",
: mmio_readw(spibar + 2));
: msg_pdbg("0x04: 0x%08x (SPIA)\n",
: mmio_readl(spibar + 4));
: ichspi_bbar = mmio_readl(spibar + 0x50);
: msg_pdbg("0x50: 0x%08x (BBAR)\n",
: ichspi_bbar);
: msg_pdbg("0x54: 0x%04x (PREOP)\n",
: mmio_readw(spibar + 0x54));
: msg_pdbg("0x56: 0x%04x (OPTYPE)\n",
: mmio_readw(spibar + 0x56));
: msg_pdbg("0x58: 0x%08x (OPMENU)\n",
: mmio_readl(spibar + 0x58));
: msg_pdbg("0x5c: 0x%08x (OPMENU+4)\n",
: mmio_readl(spibar + 0x5c));
> I was initially thinking of not doing two different things in one commit, so here I only moved the c […]
Well, to me it's all just whitespace, line-breaks, tabs, spaces. When changing
one, why not the other? Not in this hunk but in others IIRC, the spurious line
break is actually a consequence of removing a tab.
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58736 )
Change subject: ichspi: Extract handling programmer param into a function
......................................................................
Patch Set 5:
(1 comment)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/58736/comment/80e6ef41_041512cc
PS2, Line 1764: arg
> I like this idea, makes sense, and I want to do this. […]
Sure!
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Change subject: ichspi: Split very long init function into two
......................................................................
Patch Set 5:
(1 comment)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/58735/comment/560d6573_78f359d7
PS1, Line 1717: msg_pdbg("0x00: 0x%04x (SPIS)\n",
: mmio_readw(spibar + 0));
: msg_pdbg("0x02: 0x%04x (SPIC)\n",
: mmio_readw(spibar + 2));
: msg_pdbg("0x04: 0x%08x (SPIA)\n",
: mmio_readl(spibar + 4));
: ichspi_bbar = mmio_readl(spibar + 0x50);
: msg_pdbg("0x50: 0x%08x (BBAR)\n",
: ichspi_bbar);
: msg_pdbg("0x54: 0x%04x (PREOP)\n",
: mmio_readw(spibar + 0x54));
: msg_pdbg("0x56: 0x%04x (OPTYPE)\n",
: mmio_readw(spibar + 0x56));
: msg_pdbg("0x58: 0x%08x (OPMENU)\n",
: mmio_readl(spibar + 0x58));
: msg_pdbg("0x5c: 0x%08x (OPMENU+4)\n",
: mmio_readl(spibar + 0x5c));
> Would have preferred it here, it seems wrong to change lines and then fix […]
I was initially thinking of not doing two different things in one commit, so here I only moved the code without changes. And then line breaks in separate commit. But now it looks like separate commit for line breaks is really useful: we can fix a lot more line breaks, throughout the file!
It looks like the file was written with firm 80-chars-width rule in mind.
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Change subject: ichspi: Remove unneeded line breaks, add useful ones
......................................................................
Patch Set 4:
(6 comments)
Patchset:
PS4:
Given that we now have a dedicated commit for line breaks, I went through the file and removed few more of those.
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/60272/comment/01511769_baae195e
PS1, Line 930: REGREAD16(ICH7_REG_SPIS));
> This too
Done
https://review.coreboot.org/c/flashrom/+/60272/comment/5463b2dc_c3ead33a
PS1, Line 999: SSFC_DBC);
> I would remove this line break.
Done
https://review.coreboot.org/c/flashrom/+/60272/comment/202b3c2a_a8b4272e
PS1, Line 1052: REGREAD32(swseq_data.reg_ssfsc));
> This too
Done
https://review.coreboot.org/c/flashrom/+/60272/comment/fe9857ba_9cd8eddd
PS1, Line 1127: cmd);
> This too
Done
https://review.coreboot.org/c/flashrom/+/60272/comment/f2806f5a_3e95053b
PS1, Line 1402: "N
> This too
Done
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Change subject: ichspi: Extract handling programmer param into a function
......................................................................
Patch Set 5:
(1 comment)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/58736/comment/2f23b65b_54f53ccf
PS2, Line 1764: arg
> I think so. I would do that in a separate commit so that changes don't get mixed up.
I like this idea, makes sense, and I want to do this.
Is it fine to have it later (in January)? and in a separate chain? There is another idea in previous patch, I will gather all that in a chain.
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Change subject: ichspi: Split very long init function into two
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/58735/comment/302c9c75_a5a4b0f7
PS3, Line 20: TEST=1) probe-read-verify-erase section-write-reboot
: on Intel octopus board with GD25LQ128C/GD25LQ128D/GD25LQ128E
: 2) probe and read on Panther Point (7 series PCH)
Thanks a lot everyone for explanations! I decided to take Angel's suggestion about TEST, and also I added Tested-By (commit message has been updated with all that). Tell me if you see something wrong. I repeated the same section in commit message for other patches in the chain.
> Without this part, it might be that both tests failed spectacularly, but the commit message wouldn't be lying: the change *was* tested, but without success! 😄
:)))
Patchset:
PS1:
> Sorry to disappoint. There seems to be a misunderstanding. PCHs inherited the […]
Oh alright I got it. All good, I appreciate your help anyway!
I will ask, not sure whether this year of maybe after the break, but definitely need to do this.
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Nikolai Artemiev,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/60272
to look at the new patch set (#3).
Change subject: ichspi: Remove unneeded line breaks, add useful ones
......................................................................
ichspi: Remove unneeded line breaks, add useful ones
BUG=b:204488958
TEST=Check that the following scenarios still behave properly:
1) probe-read-verify-erase section-write-reboot
on Intel octopus board with GD25LQ128C/GD25LQ128D/GD25LQ128E
2) probe and read on Panther Point (7 series PCH)
Change-Id: I7ca2902b7caaa95418b828b068c661afafdcd171
Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org>
Tested-by: Anastasia Klimchuk <aklm(a)chromium.org>
Tested-by: Nico Huber <nico.h(a)gmx.de>
---
M ichspi.c
1 file changed, 36 insertions(+), 58 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/72/60272/3
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Nikolai Artemiev,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58737
to look at the new patch set (#4).
Change subject: ichspi: Extract initialisation of swseq and hwseq into a function
......................................................................
ichspi: Extract initialisation of swseq and hwseq into a function
Initialisation of swseq_data and hwseq_data gets its own function,
which is called from init_ich_default. This makes init_ich_default
more readable.
This patch also gives a name to (previously anonymous) struct
swseq_data. Its sibling struct hwseq_data already has a name. Structs
need names to be able to declare function parameters.
TEST ME ON ICH7
BUG=b:204488958
TEST=Check that the following scenarios still behave properly:
1) probe-read-verify-erase section-write-reboot
on Intel octopus board with GD25LQ128C/GD25LQ128D/GD25LQ128E
2) probe and read on Panther Point (7 series PCH)
Change-Id: I7d62b1b380e497b82dcae1284d752204cc541bd3
Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org>
Tested-by: Anastasia Klimchuk <aklm(a)chromium.org>
Tested-by: Nico Huber <nico.h(a)gmx.de>
---
M ichspi.c
1 file changed, 57 insertions(+), 50 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/58737/4
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I7d62b1b380e497b82dcae1284d752204cc541bd3
Gerrit-Change-Number: 58737
Gerrit-PatchSet: 4
Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
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