December 2021 - flashrom-gerrit

Change in flashrom[master]: [RFC][WPTST] tests: test write protection
by Anastasia Klimchuk (Code Review) 02 Dec '21

02 Dec '21

Attention is currently required from: Nico Huber, Angel Pons, Sergii Dmytruk. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59075 ) Change subject: [RFC][WPTST] tests: test write protection ...................................................................... Patch Set 11: Code-Review+1 (2 comments) Patchset: PS11: This looks good ! I have one comment left. File tests/chip_wp.c: https://review.coreboot.org/c/flashrom/+/59075/comment/84fa2f30_37ab92ce PS11, Line 391: 0x1000 Sorry I have just realised, for this test to work as expected range.start should be exactly the same as start of "tail" region in layout? Can you make it a macro and use in both places? LAYOUT_TAIL_REGION_START -- To view, visit https://review.coreboot.org/c/flashrom/+/59075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I49af7f6d173eb4c56c22d80b01a473b8c499c0f8 Gerrit-Change-Number: 59075 Gerrit-PatchSet: 11 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Thu, 02 Dec 2021 01:55:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: flashrom.8.tmpl: remove outdated warning about v1.0
by Angel Pons (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Edward O'Callaghan, Nico Huber, Sergii Dmytruk. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59408 ) Change subject: flashrom.8.tmpl: remove outdated warning about v1.0 ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/59408 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id7e0ce412901ccb27124a9958d5ef214ab289518 Gerrit-Change-Number: 59408 Gerrit-PatchSet: 4 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <edward.ocallaghan(a)koparo.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <edward.ocallaghan(a)koparo.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 22:42:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: flashrom.8.tmpl: document W25Q128FV is emulated by dummyflasher
by Angel Pons (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Edward O'Callaghan, Sergii Dmytruk. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59811 ) Change subject: flashrom.8.tmpl: document W25Q128FV is emulated by dummyflasher ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/59811 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I50f6cd6c5d853d6c70921e8027ada52d27982708 Gerrit-Change-Number: 59811 Gerrit-PatchSet: 3 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <edward.ocallaghan(a)koparo.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <edward.ocallaghan(a)koparo.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Wed, 01 Dec 2021 22:41:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: [RFC][WPTST] tests: test write protection
by Sergii Dmytruk (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Nico Huber, Angel Pons, Anastasia Klimchuk. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59075 ) Change subject: [RFC][WPTST] tests: test write protection ...................................................................... Patch Set 11: (10 comments) File tests/chip_wp.c: https://review.coreboot.org/c/flashrom/+/59075/comment/a0965549_7a649db4 PS10, Line 141: /* Use first 4 KiB for a range. */ : range.len = 0x1000; : assert_int_equal(0, flashrom_wp_set_range(&flash, &cfg, &range)); : : /* Change range to last 4 KiB. */ : range.start = 0x00fff000; : assert_int_equal(0, flashrom_wp_set_range(&flash, &cfg, &range)); > This looks like 2 in 1 tests (1 for first 4KiB range, 2 for last 4KiB). […] One range should be enough. https://review.coreboot.org/c/flashrom/+/59075/comment/c446348b_f0429daa PS10, Line 159: set_wp_mode_dummyflasher_test_success > I think the test is now good, given the comment, but maybe better name is "switch_wp_mode_.... […] Done https://review.coreboot.org/c/flashrom/+/59075/comment/b501dcb1_7861b677 PS10, Line 188: /* : * Check that "permanent" mode can't be unset and it's not considered to be : * an error at the level of library calls (verification should be done : * higher). : */ > That's a very good comment, thank you! Only need to fix indentation. Done https://review.coreboot.org/c/flashrom/+/59075/comment/59f70075_abfa3e45 PS10, Line 220: cfg.srp_bit_count = 1; : assert_int_equal(0, flashrom_wp_set_mode(&cfg, WP_MODE_DISABLED)); > I see two parts here: 1) with srp_bit_count = 2, 2) with srp_bit_count = 1 […] Split these four tests. https://review.coreboot.org/c/flashrom/+/59075/comment/2497edad_e2fa43fb PS10, Line 290: assert_int_equal(0x004000, range.start); : assert_int_equal(0xffc000, range.len); > just to check, do range start/len come from spi_status? the comment above param_dup only mentions re […] Yes, range is encoded by those bits. Datasheets contain tables of bit values and ranges that they produce (there is some logic to individual bits, but it's not very straightforward). Expanded that commend and fixed, since it diverged from the code. https://review.coreboot.org/c/flashrom/+/59075/comment/0c7f128f_a8e174e9 PS10, Line 310: assert_int_equal(0, flashrom_layout_include_region(layout, "head")); : assert_int_equal(0, flashrom_layout_include_region(layout, "tail")); > It is not clear in the context of test method where "head" and "tail" come from. […] I've added comments. These calls are here, because the test below this one includes only the "head". https://review.coreboot.org/c/flashrom/+/59075/comment/951e060c_8e05110c PS10, Line 313: Write protection takes effect only after changing SRP values. > if you can add a bit more for example […] Done https://review.coreboot.org/c/flashrom/+/59075/comment/04750d50_8a4f977e PS10, Line 329: Try erasing the chip again > also you can add continue the comment say […] Done https://review.coreboot.org/c/flashrom/+/59075/comment/de0ef341_9f3b1a9c PS10, Line 364: printf("Erase chip operation started.\n"); : assert_int_equal(0, do_erase(&flash)); : printf("Erase chip operation done.\n"); > Oh now I compare this test scenario and previous, and looks like first 4 KiB are special? Because in […] Done File tests/write_protect.c: https://review.coreboot.org/c/flashrom/+/59075/comment/97976bd0_6e14b1c5 PS5, Line 143: wp=no > Here "wp" means WP pin of the flash chip. […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/59075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I49af7f6d173eb4c56c22d80b01a473b8c499c0f8 Gerrit-Change-Number: 59075 Gerrit-PatchSet: 11 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 22:19:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: comment

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Change in flashrom[master]: [RFC][WPTST] dummyflasher: enforce write protection for W25Q128FV
by Sergii Dmytruk (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Nico Huber, Angel Pons, Anastasia Klimchuk. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59074 ) Change subject: [RFC][WPTST] dummyflasher: enforce write protection for W25Q128FV ...................................................................... Patch Set 11: (6 comments) File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/59074/comment/53a034e2_d039d171 PS10, Line 63: bool wp; /* state of hardware write protection */ > And this name also can be hwwp Done https://review.coreboot.org/c/flashrom/+/59074/comment/83befa54_5ca45f78 PS10, Line 244: write_flash_part > The name is a bit confusing, what "part" means here? And same for erase_flash_part Part of the emulated flash defined by the range. Changed to "data". https://review.coreboot.org/c/flashrom/+/59074/comment/d39a105c_b524f362 PS10, Line 264: /* XXX: should data->erase_to_zero be taken into account here? */ > Is it a TODO, or work-in-progress note? It's a question to anyone who'll read the code. It just looks like a bug, but I'm not entirely sure. https://review.coreboot.org/c/flashrom/+/59074/comment/8a015d3c_28e7d25b PS10, Line 967: will have WP enabled > Hardware WP? Done File flashrom.8.tmpl: https://review.coreboot.org/c/flashrom/+/59074/comment/ac4b5373_a46ebc23 PS10, Line 696: Winbond " W25Q128FV " SPI flash chip (16384 kB, RDID)" > Oh wow this was missing in the man for all the time?! Thank you for spotting! […] Sent in CB:59811 https://review.coreboot.org/c/flashrom/+/59074/comment/21232b59_1b262fdb PS10, Line 792: wp=state > I remember we discussed that in the patch with test, yes now I see that "hwwp" would be a better nam […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/59074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9fd1417f941186391bd213bd355530143c8f04a0 Gerrit-Change-Number: 59074 Gerrit-PatchSet: 11 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 22:19:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: [RFC][WPTST] dummyflasher: emualte SR2 for W25Q128FV
by Sergii Dmytruk (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Nico Huber, Angel Pons, Anastasia Klimchuk. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59073 ) Change subject: [RFC][WPTST] dummyflasher: emualte SR2 for W25Q128FV ...................................................................... Patch Set 11: (2 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/59073/comment/4a2e9f6f_9ec80c88 PS10, Line 8: : By the way, W25Q128FV has three status registers, but no plans to use : the third one yet. > If you remove "by the way", it is a very good second paragraph for this commit message! […] Done File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/59073/comment/e787373b_fc8ab20f PS10, Line 922: data->emu_status_len = 2; > I added a comment to previous patch about emu_status_len always 1, I see that it becomes 2 in this p […] These changes are split into addition of SR2 and use of SR2. Can squash commits into one, but I thought it's better to separate general support from a chip-specific one. -- To view, visit https://review.coreboot.org/c/flashrom/+/59073 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I79f9b4a0b604663d3288ad70dcbe3ea4075dede5 Gerrit-Change-Number: 59073 Gerrit-PatchSet: 11 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 22:18:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: [RFC][WPTST] dummyflasher: add SR2 emulation harness
by Sergii Dmytruk (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Nico Huber, Angel Pons, Anastasia Klimchuk. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59072 ) Change subject: [RFC][WPTST] dummyflasher: add SR2 emulation harness ...................................................................... Patch Set 11: (5 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/59072/comment/22a72bd7_5fd1b6c4 PS10, Line 11: > You've probably tested this patch, probably by running dummyflasher with some programmer params. […] This change can't be tested through CLI on its own, it's more of a preparation for WP emulation. Future commits make it testable indirectly. File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/59072/comment/4dcfdb42_f07d847b PS10, Line 47: uint8_t emu_status_len; /* number of emulated status bytes */ > Is this a number of emulated status bytes in SR2? No, it's number of emulated status bytes in this chip (1 or 2). Datasheets usually present several registers as bytes of some imaginary status register that includes them all. Changed to "registers". https://review.coreboot.org/c/flashrom/+/59072/comment/6f66a7cc_81805134 PS10, Line 342: /* XXX: Else reset SR2 parts to zero? */ > What does it mean? Is it a TODO? Sort of, but a questionable one. I wasn't sure what should happen in this case, but now found that W25Q128FV doesn't reset SR2 (older Winbound chips reset a couple of bits there). https://review.coreboot.org/c/flashrom/+/59072/comment/c4a6be6f_45e6e3ff PS10, Line 930: data->emu_status_len = 1; > Maybe I missed something, but is this value always initialised to 1? It is always 1 here, SR2 is used in the next commit. This change adds code that's not chip-specific. File flashrom.8.tmpl: https://review.coreboot.org/c/flashrom/+/59072/comment/c8cbf16f_ba2fc65b PS10, Line 781: is an 8-bit or 16-bit hexadecimal value. > What does this value mean? I know it was like this before ;) But since you are changing/upgrading th […] I think beginning of the sentence covers it: You can specify the initial content of the chip's status register with the Also added to the description a bit. -- To view, visit https://review.coreboot.org/c/flashrom/+/59072 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I177ae3f068f03380f5b3941d9996a07205672e59 Gerrit-Change-Number: 59072 Gerrit-PatchSet: 11 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 22:18:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: [RFC][WPTST] flashchips: enable write-protection for W25Q{64,128}.V
by Sergii Dmytruk (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Nico Huber, Angel Pons, Anastasia Klimchuk. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59071 ) Change subject: [RFC][WPTST] flashchips: enable write-protection for W25Q{64,128}.V ...................................................................... Patch Set 11: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/59071/comment/fa3689fa_3dd8c248 PS10, Line 7: enable write-protection for W25Q{64,128}.V > Good, if you tested real chips, could you please mention this in commit message? […] Made commit description clearer. -- To view, visit https://review.coreboot.org/c/flashrom/+/59071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iccb69a8d3a0dd2192e2c938caddaf07b1889ed35 Gerrit-Change-Number: 59071 Gerrit-PatchSet: 11 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Dec 2021 22:18:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: comment

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Change in flashrom[master]: [RFC][OTP] dummyflasher: implement SCUR and OTP for MX25L6436
by Sergii Dmytruk (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Nico Huber, Angel Pons. Hello build bot (Jenkins), Nico Huber, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/59710 to look at the new patch set (#3). Change subject: [RFC][OTP] dummyflasher: implement SCUR and OTP for MX25L6436 ...................................................................... [RFC][OTP] dummyflasher: implement SCUR and OTP for MX25L6436 The chip has OTP mode, but state of OTP is stored in a security register. Additions: * spi_scur parameter for dummyflasher to configure initial state of security register * commands for entering/leaving OTP mode (ENSO, EXSO) * commands for reading/writing secure register (RDSCUR, WRSCUR) Change-Id: I13716d597d305351ec27d532e9020615c397693a Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M dummyflasher.c M flashrom.8.tmpl M spi.h 3 files changed, 84 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/10/59710/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/59710 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I13716d597d305351ec27d532e9020615c397693a Gerrit-Change-Number: 59710 Gerrit-PatchSet: 3 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: [RFC][OTP] dummyflasher: add EN25QH128 chip with OTP mode
by Sergii Dmytruk (Code Review) 01 Dec '21

01 Dec '21

Attention is currently required from: Nico Huber, Angel Pons. Hello build bot (Jenkins), Nico Huber, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/59708 to look at the new patch set (#3). Change subject: [RFC][OTP] dummyflasher: add EN25QH128 chip with OTP mode ...................................................................... [RFC][OTP] dummyflasher: add EN25QH128 chip with OTP mode This chip demonstrates seecond kind of OTP: mode upon entering which regular read/write/erase commands can be used to interact with OTP content. It will also be used in tests. Change-Id: Id5857db43ebf2613bdb5e99342d28d4e0981a6b8 Signed-off-by: Hatim Kanchwala <hatim at hatimak.me> Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M dummyflasher.c M flashrom.8.tmpl 2 files changed, 98 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/08/59708/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/59708 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id5857db43ebf2613bdb5e99342d28d4e0981a6b8 Gerrit-Change-Number: 59708 Gerrit-PatchSet: 3 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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flashrom-gerrit December 2021