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Change subject: [RFC][OTP] flashchips,otp: support MX25L6436E "family"
......................................................................
[RFC][OTP] flashchips,otp: support MX25L6436E "family"
Also includes MX25L6445E, MX25L6465E, MX25L6473E and MX25L6473F.
It's emulated by dummy flasher and will be used in tests.
Change-Id: I7e9dbef8632d8a1ef9322286b5fb1c0b47e8007e
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M flashchips.c
M otp.h
M otp_layouts.c
3 files changed, 23 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/12/59712/7
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Hello build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: [RFC][OTP] dummyflasher: implement SCUR and OTP for MX25L6436
......................................................................
[RFC][OTP] dummyflasher: implement SCUR and OTP for MX25L6436
The chip has OTP mode, but state of OTP is stored in a security
register.
Additions:
* spi_scur parameter for dummyflasher to configure initial state of
security register
* commands for entering/leaving OTP mode (ENSO, EXSO)
* commands for reading/writing secure register (RDSCUR, WRSCUR)
Change-Id: I13716d597d305351ec27d532e9020615c397693a
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M dummyflasher.c
M flashrom.8.tmpl
M spi.h
3 files changed, 84 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/10/59710/7
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Hello build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: [RFC][OTP] spi25_statusreg: support reading/writing security register
......................................................................
[RFC][OTP] spi25_statusreg: support reading/writing security register
Not to be confused with "secure registers" of OTP.
Security register is a dedicated status register for security-related
bits. You don't write its value directly, issuing corresponding write
command with no data just sets OTP bit to 1 automatically.
No WREN is necessary, but at least some datasheets indicate BUSY state
after write command.
Unlike cases where OTP bit is part of SR and can only be written while
in OTP mode, security register can only be written outside of the mode.
Change-Id: Iae1753ca4cb051127a5bcbeba7f064053adb8dae
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M flash.h
M spi.h
M spi25_statusreg.c
3 files changed, 58 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/09/59709/7
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Hello build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#11).
Change subject: [RFC][OTP] cli_classic: add options for managing OTP regions
......................................................................
[RFC][OTP] cli_classic: add options for managing OTP regions
New actions operate on OTP region specified by `--otp-region`, which is
a required option if there is more than one OTP region, otherwise it
can be omitted. Region numbering starts at 1.
All actions can be combined with `--otp-status`, which is processed
last and thus can print new state of the OTP.
Change-Id: If77694e3b1c453b3fc0561da7a9eefdbce4fbb2b
Signed-off-by: Hatim Kanchwala <hatim at hatimak.me>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M cli_classic.c
M flashrom.8.tmpl
2 files changed, 290 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/07/59407/11
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to look at the new patch set (#11).
Change subject: [RFC][OTP] tests: add tests for OTP regions
......................................................................
[RFC][OTP] tests: add tests for OTP regions
There are two sets of tests targeting two new dummyflasher chips that provide
two kinds of OTP.
Change-Id: I4ff584395367dfd52db89332d8e45d7e865276e1
Signed-off-by: Hatim Kanchwala <hatim at hatimak.me>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
A tests/chip_otp.c
M tests/meson.build
M tests/tests.c
M tests/tests.h
4 files changed, 403 insertions(+), 0 deletions(-)
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Hello build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#11).
Change subject: [RFC][OTP] dummyflasher: emulate OTP for W25Q128FV
......................................................................
[RFC][OTP] dummyflasher: emulate OTP for W25Q128FV
This adds more or less generic support for OTP emulation to dummyflasher
and immediately uses it to extend emulation for W25Q128FV with
register-based OTP, which will be used in tests.
Files with images for OTP registers can be specified via new otp<N>=
parameters for dummyflasher.
Change-Id: I1af3ac22a66104517f1fe035e034404c6b249257
Signed-off-by: Hatim Kanchwala <hatim at hatimak.me>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M dummyflasher.c
M flashrom.8.tmpl
2 files changed, 182 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/04/59404/11
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Hello build bot (Jenkins), Nico Huber, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#14).
Change subject: [RFC][WPTST] dummyflasher: add SR2 emulation harness
......................................................................
[RFC][WPTST] dummyflasher: add SR2 emulation harness
Prepare everything for emulating SR2 for chips that have it.
This is needed for accessing second SRP bit which is involved in write
protection. The emulated register doesn't affect anything yet and will
be tested by write-protection tests.
Change-Id: I177ae3f068f03380f5b3941d9996a07205672e59
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M dummyflasher.c
M flashrom.8.tmpl
2 files changed, 76 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/72/59072/14
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