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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58480
to look at the new patch set (#22).
Change subject: flashchips,writeprotect_ranges: add range decoding function
......................................................................
flashchips,writeprotect_ranges: add range decoding function
Allow chips to specify functions that map status register bits to
protection ranges. These are used to enumerate available ranges and
determine the protection state of chips. The patch also adds a range
decoding function for the example chips. Many other chips can also be
handled by it, though some will require different functions (e.g.
MX25L6406 and related chips).
Another approach that has been tried in cros flashrom is maintaining
tables of range data, but it quickly becomes error prone and hard to
validate.
Using a function to interpret the ranges allows compact encoding with
most chips and is flexible enough to allow chips with less predictable
ranges to be handled as well.
BUG=b:195381327,b:153800563
TEST=dumped range tables, checked against datasheets
BRANCH=none
Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M Makefile
M chipdrivers.h
M flash.h
M flashchips.c
M libflashrom.h
M meson.build
A writeprotect_ranges.c
7 files changed, 112 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/80/58480/22
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58477
to look at the new patch set (#20).
Change subject: flashchips: add writeprotect bit layout map to chips
......................................................................
flashchips: add writeprotect bit layout map to chips
This patch adds a register bit map `struct reg_bit_info`, with fields
for storing the register, bit index, and writability of each bit that
affects the chip's write protection. This allows writeprotect code to be
independent of the register layout of any specific chip. The new fields
have been filled out for example chips.
The representation is centered around describing how bits can be
accessed and modified, rather than the layout of registers. This is
generally easier to work with in code that needs to access specific bits
and typically requires specifying the locations of fewer bits overall.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
2 files changed, 52 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58477/20
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58570
to look at the new patch set (#17).
Change subject: spi25_statusreg,flashchips: add SR2 read/write support
......................................................................
spi25_statusreg,flashchips: add SR2 read/write support
This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.
Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
TEST=logged SR2 read/write values during wp commands
BRANCH=none
Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M spi.h
M spi25_statusreg.c
4 files changed, 57 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/17
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59291 )
Change subject: flashrom: Convert do_read() into a libflashrom user
......................................................................
Patch Set 4:
(2 comments)
File flashrom.c:
https://review.coreboot.org/c/flashrom/+/59291/comment/23052912_e7213408
PS4, Line 2173: msg_cinfo("FAILED.\n");
> This message is now left orphaned. […]
I'd drop this print.
https://review.coreboot.org/c/flashrom/+/59291/comment/42b3e4d1_9c4e1806
PS4, Line 2189: msg_cinfo("%s.\n", ret ? "FAILED" : "done");
This would print `FAILED` twice if `flashrom_image_read()` took the branch that prints `FAILED`.
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60087 )
Change subject: dediprog: wait for spi bulk read xfers to finish
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
Looks sensible to me, but I don't have a dediprog to test.
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59291 )
Change subject: flashrom: Convert do_read() into a libflashrom user
......................................................................
Patch Set 4:
(1 comment)
File flashrom.c:
https://review.coreboot.org/c/flashrom/+/59291/comment/5108cb42_bb9bca79
PS4, Line 2173: msg_cinfo("FAILED.\n");
This message is now left orphaned.
Before, there was a message `msg_cinfo("Reading flash... ")` in the beginning of read_flash_to_file, and this one goes together with it. So if memory allocation does fail, the output was
Reading flash...
Memory allocation failed!
FAILED
Now `msg_cinfo("Reading flash... ")` happens in flashrom_image_read, but flashrom_image_read is called below. So if memory allocation does fail, the output will be
Memory allocation failed!
FAILED
Maybe this orphaned FAILED can be removed? Do we consider memory allocation as a part of Reading flash or is it a pre-process step?
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Rick Altherr has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/60087 )
Change subject: dediprog: wait for spi bulk read xfers to finish
......................................................................
dediprog: wait for spi bulk read xfers to finish
dediprog_bulk_read_poll()'s finish argument allows it to be used in two
distinct cases: where dediprog_bulk_read_poll will be called as part of
a loop (finish=0) and where dediprog_bulk_read_poll should wait for all
outstanding transfers to finish (finish=1). In both cases,
dediprog_bulk_read_poll() calls libusb to process events with a 10
second timeout.
After dediprog_spi_bulk_read() has queued the last transfers, it calls
dediprog_bulk_read_poll() with finish=0 when it should be finish=1.
finish=0 just happens to work because frequently the transfers finish in
the 10 second timeout.
Signed-off-by: Rick Altherr <rick(a)oxidecomputer.com>
Change-Id: If7cb541742c8620358c8e04275d8316131b2d1ab
---
M dediprog.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/87/60087/1
diff --git a/dediprog.c b/dediprog.c
index 939673c..8a05a7c 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -526,7 +526,7 @@
goto err_free;
}
/* Wait for transfers to finish. */
- if (dediprog_bulk_read_poll(dp_data->usb_ctx, &status, 0))
+ if (dediprog_bulk_read_poll(dp_data->usb_ctx, &status, 1))
goto err_free;
/* Check if everything has been transmitted. */
if ((status.finished_idx < count) || status.error)
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59909 )
Change subject: writeprotect: print chip range truth table for debugging
......................................................................
Patch Set 3: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/59909/comment/1538b347_e2a3c645
PS3, Line 13: -V
So it will print the table with `-V` and won't print in usual (non-verbose) mode , right?
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