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Change subject: flashchips: add writeprotect bit layout map to chips
......................................................................
Patch Set 20:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58477/comment/32ff0615_36e77b49
PS20, Line 6353: .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
: .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
Huh, I would've expected BP3 and BP4 to work like the other BPx bits.
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58475 )
Change subject: spi25_statusreg: make register read/write functions generic
......................................................................
Patch Set 14:
(8 comments)
File flash.h:
https://review.coreboot.org/c/flashrom/+/58475/comment/8eb6e671_1eebe37f
PS14, Line 169: enum flash_reg {
: INVALID_REG = 0,
: STATUS1,
: STATUS2,
: CONFIG1,
: };
: #define MAX_REGISTERS 4
Does this need to be public, or can it remain private inside `spi25_statusreg.c`?
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/58475/comment/d2825c1b_b1a5c042
PS14, Line 51: int result = spi_send_multicommand(flash, cmds);
Would be good to check with manibuilder if this causes problems with unusual toolchains (e.g. DJGPP).
https://review.coreboot.org/c/flashrom/+/58475/comment/62c990d2_3cb2aef2
PS14, Line 126:
should be a tab
https://review.coreboot.org/c/flashrom/+/58475/comment/79cf7549_f8bfb225
PS14, Line 134:
nit: double blank line
https://review.coreboot.org/c/flashrom/+/58475/comment/b196aedc_5366d628
PS14, Line 138: /* FIXME: We should propagate the error. */
Ah, this is why you want to drop `spi_read_status_register()`
https://review.coreboot.org/c/flashrom/+/58475/comment/0fcb07c5_f39ff12c
PS14, Line 149:
nit: double blank line
https://review.coreboot.org/c/flashrom/+/58475/comment/87fb8ad1_df5ffccd
PS14, Line 194: spi_write_register failed.
Would be good to indicate which register failed:
Could not write status register 1.
Or similar.
https://review.coreboot.org/c/flashrom/+/58475/comment/3868e53e_88d303bc
PS14, Line 207: spi_write_register failed.
Ditto
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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58480
to look at the new patch set (#22).
Change subject: flashchips,writeprotect_ranges: add range decoding function
......................................................................
flashchips,writeprotect_ranges: add range decoding function
Allow chips to specify functions that map status register bits to
protection ranges. These are used to enumerate available ranges and
determine the protection state of chips. The patch also adds a range
decoding function for the example chips. Many other chips can also be
handled by it, though some will require different functions (e.g.
MX25L6406 and related chips).
Another approach that has been tried in cros flashrom is maintaining
tables of range data, but it quickly becomes error prone and hard to
validate.
Using a function to interpret the ranges allows compact encoding with
most chips and is flexible enough to allow chips with less predictable
ranges to be handled as well.
BUG=b:195381327,b:153800563
TEST=dumped range tables, checked against datasheets
BRANCH=none
Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M Makefile
M chipdrivers.h
M flash.h
M flashchips.c
M libflashrom.h
M meson.build
A writeprotect_ranges.c
7 files changed, 112 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/80/58480/22
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58477
to look at the new patch set (#20).
Change subject: flashchips: add writeprotect bit layout map to chips
......................................................................
flashchips: add writeprotect bit layout map to chips
This patch adds a register bit map `struct reg_bit_info`, with fields
for storing the register, bit index, and writability of each bit that
affects the chip's write protection. This allows writeprotect code to be
independent of the register layout of any specific chip. The new fields
have been filled out for example chips.
The representation is centered around describing how bits can be
accessed and modified, rather than the layout of registers. This is
generally easier to work with in code that needs to access specific bits
and typically requires specifying the locations of fewer bits overall.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
2 files changed, 52 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58477/20
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#17).
Change subject: spi25_statusreg,flashchips: add SR2 read/write support
......................................................................
spi25_statusreg,flashchips: add SR2 read/write support
This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.
Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
TEST=logged SR2 read/write values during wp commands
BRANCH=none
Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M spi.h
M spi25_statusreg.c
4 files changed, 57 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/17
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59291 )
Change subject: flashrom: Convert do_read() into a libflashrom user
......................................................................
Patch Set 4:
(2 comments)
File flashrom.c:
https://review.coreboot.org/c/flashrom/+/59291/comment/23052912_e7213408
PS4, Line 2173: msg_cinfo("FAILED.\n");
> This message is now left orphaned. […]
I'd drop this print.
https://review.coreboot.org/c/flashrom/+/59291/comment/42b3e4d1_9c4e1806
PS4, Line 2189: msg_cinfo("%s.\n", ret ? "FAILED" : "done");
This would print `FAILED` twice if `flashrom_image_read()` took the branch that prints `FAILED`.
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60087 )
Change subject: dediprog: wait for spi bulk read xfers to finish
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
Looks sensible to me, but I don't have a dediprog to test.
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