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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#8).
Change subject: flashchips: add writeprotect bit layout map to chips
......................................................................
flashchips: add writeprotect bit layout map to chips
This patch adds a register bit map `struct flashchip`, with fields for
storing the register, bit index, and writability of each bit that
affects the chip's write protection. This allows writeprotect code to be
independent of the register layout of any specific chip. The new fields
have been filled out for example chips.
The representation is centered around describing how bits can be
accessed and modified, rather than the layout of registers. This is
generally easier to work with in code that needs to access specific bits
and typically requires specifying the locations of fewer bits overall.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
2 files changed, 71 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58477/8
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Gerrit-Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Gerrit-Change-Number: 58477
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58570
to look at the new patch set (#6).
Change subject: spi25_statusreg,flashchips: add SR2 read/write support
......................................................................
spi25_statusreg,flashchips: add SR2 read/write support
This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.
Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
TEST=logged SR2 read/write values during wp commands
BRANCH=none
Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M spi.h
M spi25_statusreg.c
4 files changed, 60 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/6
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58475
to look at the new patch set (#8).
Change subject: spi25_statusreg: make register read/write functions generic
......................................................................
spi25_statusreg: make register read/write functions generic
This patch adds new spi_{read,write}_register() functions that take the
source/destination register as an argument. Currently they can only
access SR1, support for other registers will be added in another patch.
Since we're refactoring things, this commit also makes
spi_read_register() return an error code, making it possible to identify
error conditions that spi_read_status_register() concealed.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I0a3951bbf993f2d8d830143b29d3ce16cc6901d7
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M chipdrivers.h
M flash.h
M spi25_statusreg.c
3 files changed, 83 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/58475/8
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58474
to look at the new patch set (#8).
Change subject: writeprotect, cli_classic: delete old writeprotect code
......................................................................
writeprotect, cli_classic: delete old writeprotect code
Delete writeprotect code that was previously extracted from the cros tree.
This is the first of a series of commits that adds working writeprotect
support. Following commits will incrementally implement writeprotect
operations, culminating in writeprotect support for a set of example
chips: GD25LQ128, GD25Q32, GD25Q64, GD25Q256, MX25L2006E, and W25X40.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I67e9b31f86465e5a8f7d3def637198671ee818a8
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M cli_classic.c
M flash.h
M libflashrom.h
M s25f.c
M writeprotect.c
D writeprotect.h
6 files changed, 55 insertions(+), 502 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/58474/8
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Hello build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58971
to look at the new patch set (#2).
Change subject: flashchips: Add W25Q64JV
......................................................................
flashchips: Add W25Q64JV
I have successfully tested it with FT2232H-programmer.
Change-Id: Ia9a32146b225eca66e9a6bfef45be5f2b24aef46
Signed-off-by: Simon Buhrow <simon.buhrow(a)posteo.de>
---
M flashchips.c
M flashchips.h
2 files changed, 41 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/71/58971/2
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58774 )
Change subject: chipset_enable.c: Mark Intel Z390 as DEP
......................................................................
Patch Set 4: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/58774/comment/d558b3ff_33019b85
PS3, Line 9: me_cleaner
> Minor: Our guidelines state that commit message lines wrap at 72 characters [1]. […]
Done
https://review.coreboot.org/c/flashrom/+/58774/comment/3723a507_aa4a94b4
PS3, Line 12: melvyn2
> That would be great, let me know what needs to be done on my end.
Just restoring this patch is enough, thank you. I've added my sign-off. While at it, I also took care of my other comment about the line length.
Now, the only thing left is to have someone else approve it.
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