June 2020 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: pcidev: On arm64 we are not getting a valid BAR0 address
by Martijn Berger (Code Review) 14 Jul '20

14 Jul '20

Martijn Berger has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/39965 ) Change subject: pcidev: On arm64 we are not getting a valid BAR0 address ...................................................................... pcidev: On arm64 we are not getting a valid BAR0 address It seems that there is some code to work around a possible bug in old versions of libpci. This trusts libpci if it is new enough Change-Id: I8bd32c6344b0831a949c3853abeb84905420922a Signed-off-by: Martijn Berger <martijn.berger(a)gmail.com> --- M pcidev.c M programmer.h 2 files changed, 30 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/65/39965/1 diff --git a/pcidev.c b/pcidev.c index 54c1fd3..973acde 100644 --- a/pcidev.c +++ b/pcidev.c @@ -30,20 +30,47 @@ TYPE_UNKNOWN }; +int pci_bar_nuber_from_offset(int offset) +{ + switch (offset) { + case PCI_BASE_ADDRESS_0: + return 0; + case PCI_BASE_ADDRESS_1: + return 1; + case PCI_BASE_ADDRESS_2: + return 2; + case PCI_BASE_ADDRESS_3: + return 3; + case PCI_BASE_ADDRESS_4: + return 4; + case PCI_BASE_ADDRESS_5: + return 5; + default: + return -1; + } + return -1; +} + uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) { uint64_t addr; uint32_t upperaddr; uint8_t headertype; uint16_t supported_cycles; + int bar_number; enum pci_bartype bartype = TYPE_UNKNOWN; headertype = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f; msg_pspew("PCI header type 0x%02x\n", headertype); + bar_number = pci_bar_nuber_from_offset(bar); - /* Don't use dev->base_addr[x] (as value for 'bar'), won't work on older libpci. */ - addr = pci_read_long(dev, bar); + if (PCI_LIB_VERSION >= 0x030500 && bar_number > -1) { + addr = dev->base_addr[bar_number]; + } else { + /* Don't use dev->base_addr[x] (as value for 'bar'), won't work on older libpci. */ + addr = pci_read_long(dev, bar); + } /* Sanity checks. */ switch (headertype) { diff --git a/programmer.h b/programmer.h index 9a41be1..5d4c1d7 100644 --- a/programmer.h +++ b/programmer.h @@ -190,6 +190,7 @@ // FIXME: This needs to be local, not global(?) extern struct pci_access *pacc; int pci_init_common(void); +int pci_bar_nuber_from_offset(int offset); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar); /* rpci_write_* are reversible writes. The original PCI config space register -- To view, visit https://review.coreboot.org/c/flashrom/+/39965 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I8bd32c6344b0831a949c3853abeb84905420922a Gerrit-Change-Number: 39965 Gerrit-PatchSet: 1 Gerrit-Owner: Martijn Berger Gerrit-MessageType: newchange

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Change in flashrom[master]: chipset_enable: add PCI ID for APL-I (Broxton)
by Jan Samek (Code Review) 10 Jul '20

10 Jul '20

Jan Samek has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42805 ) Change subject: chipset_enable: add PCI ID for APL-I (Broxton) ...................................................................... chipset_enable: add PCI ID for APL-I (Broxton) Change-Id: I48dba541b5893551f47f3d5ed422eb1dc36f5324 Signed-off-by: Jan Samek <jan.samek(a)siemens.com> Signed-off-by: Henning Schild <henning.schild(a)siemens.com> --- M chipset_enable.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/42805/1 diff --git a/chipset_enable.c b/chipset_enable.c index 632679c..d56a547 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2052,6 +2052,7 @@ {0x8086, 0xa2c9, B_S, NT, "Intel", "Z370", enable_flash_pch100}, {0x8086, 0xa2d2, B_S, NT, "Intel", "X299", enable_flash_pch100}, {0x8086, 0x5ae8, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, + {0x8086, 0x5af0, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, {0x8086, 0xa303, B_S, NT, "Intel", "H310", enable_flash_pch300}, {0x8086, 0xa304, B_S, NT, "Intel", "H370", enable_flash_pch300}, {0x8086, 0xa305, B_S, NT, "Intel", "Z390", enable_flash_pch300}, -- To view, visit https://review.coreboot.org/c/flashrom/+/42805 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I48dba541b5893551f47f3d5ed422eb1dc36f5324 Gerrit-Change-Number: 42805 Gerrit-PatchSet: 1 Gerrit-Owner: Jan Samek <jan.samek(a)siemens.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: [WIP] Add uncrustify config
by David Hendricks (Code Review) 08 Jul '20

08 Jul '20

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42556 ) Change subject: [WIP] Add uncrustify config ...................................................................... [WIP] Add uncrustify config Similar to CB:38673, this attempts to add a config file for uncrustify as an alternative to clang-format, which has some limitations as mentioned in the other patch. This adds a config file which is a copy of the linux.cfg file. Newer versions of this patch will tweak the config file as needed for flashrom. Change-Id: Ib6bd3ab49e841768f07c2705f71be66e9308bbca Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M 82802ab.c M amd_imc.c M at45db.c M atahpt.c M atapromise.c M atavia.c M bitbang_spi.c M board_enable.c M buspirate_spi.c M cbtable.c M ch341a_spi.c M chipdrivers.h M chipset_enable.c M cli_classic.c M cli_common.c M cli_output.c M coreboot_tables.h M custom_baud.c M custom_baud.h M dediprog.c M developerbox_spi.c M digilent_spi.c M dmi.c M drkaiser.c M dummyflasher.c M edi.c M edi.h M en29lv640b.c M ene.h M flash.h M flashchips.c M flashchips.h M flashrom.c M fmap.c M fmap.h M ft2232_spi.c M gfxnvidia.c M helpers.c M hwaccess.c M hwaccess.h M i2c_helper.h M i2c_helper_linux.c M ich_descriptors.c M ich_descriptors.h M ichspi.c M internal.c M it8212.c M it85spi.c M it87spi.c M jedec.c M jlink_spi.c M layout.c M layout.h M libflashrom.c M libflashrom.h M linux_mtd.c M linux_spi.c M lspcon_i2c_spi.c M mcp6x_spi.c M mstarddc_spi.c M ni845x_spi.c M nic3com.c M nicintel.c M nicintel_eeprom.c M nicintel_spi.c M nicnatsemi.c M nicrealtek.c M ogp_spi.c M os.h M pcidev.c M physmap.c M pickit2_spi.c M platform.h M pony_spi.c M print.c M print_wiki.c M processor_enable.c M programmer.c M programmer.h M raiden_debug_spi.c M rayer_spi.c M realtek_mst_i2c_spi.c M satamv.c M satasii.c M sb600spi.c M serial.c M serprog.c M serprog.h M sfdp.c M spi.c M spi.h M spi25.c M spi25_statusreg.c M spi95.c M sst28sf040.c M sst_fwhub.c M stlinkv3_spi.c M udelay.c A uncrustify.cfg M usb_device.c M usb_device.h M usbblaster_spi.c M usbdev.c M w39.c M wbsio_spi.c 105 files changed, 17,980 insertions(+), 17,840 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/56/42556/1 -- To view, visit https://review.coreboot.org/c/flashrom/+/42556 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib6bd3ab49e841768f07c2705f71be66e9308bbca Gerrit-Change-Number: 42556 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: [WIP] Add uncrustify on/off markers where appropriate
by David Hendricks (Code Review) 08 Jul '20

08 Jul '20

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42555 ) Change subject: [WIP] Add uncrustify on/off markers where appropriate ...................................................................... [WIP] Add uncrustify on/off markers where appropriate Change-Id: I146a32e921d1c828a7d05ebb88373abe22e89053 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M board_enable.c M chipset_enable.c M print.c 3 files changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/42555/1 diff --git a/board_enable.c b/board_enable.c index 9cf0103..e95fcff 100644 --- a/board_enable.c +++ b/board_enable.c @@ -2349,6 +2349,7 @@ */ /* Please keep this list alphabetically ordered by vendor/board name. */ +/* *INDENT-OFF* */ const struct board_match board_matches[] = { /* first pci-id set [4], second pci-id set [4], dmi identifier, coreboot id [2], phase, vendor name, board name max_rom_... OK? flash enable */ @@ -2530,6 +2531,7 @@ #endif { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ }; +/* *INDENT-ON* */ int selfcheck_board_enables(void) { diff --git a/chipset_enable.c b/chipset_enable.c index 632679c..49f4f2e 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1690,6 +1690,7 @@ #define B_S (BUS_SPI) /* Please keep this list numerically sorted by vendor/device ID. */ +/* *INDENT-OFF* */ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) {0x1002, 0x4377, B_PFL, OK, "ATI", "SB400", enable_flash_sb400}, @@ -2066,6 +2067,7 @@ #endif {0}, }; +/* *INDENT-ON* */ int chipset_flash_enable(void) { diff --git a/print.c b/print.c index feca45e..06561ec 100644 --- a/print.c +++ b/print.c @@ -515,6 +515,7 @@ #endif /* Please keep this list alphabetically ordered by vendor/board. */ +/* *INDENT-OFF* */ const struct board_info boards_known[] = { #if defined(__i386__) || defined(__x86_64__) B("A-Trend", "ATC-6220", OK, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL), @@ -1142,8 +1143,10 @@ {0}, }; +/* *INDENT-ON* */ /* Please keep this list alphabetically ordered by vendor/board. */ +/* *INDENT-OFF* */ const struct board_info laptops_known[] = { #if defined(__i386__) || defined(__x86_64__) B("Acer", "Aspire 1520", OK, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspir…", NULL), @@ -1176,4 +1179,5 @@ {0}, }; +/* *INDENT-ON* */ #endif -- To view, visit https://review.coreboot.org/c/flashrom/+/42555 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I146a32e921d1c828a7d05ebb88373abe22e89053 Gerrit-Change-Number: 42555 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: Add Manibuilder
by Angel Pons (Code Review) 30 Jun '20

30 Jun '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/23005 ) Change subject: Add Manibuilder ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/flashrom/+/23005/6/util/manibuilder/Makefile File util/manibuilder/Makefile: https://review.coreboot.org/c/flashrom/+/23005/6/util/manibuilder/Makefile@8 PS6, Line 8: spc := : spc += > this broke Fix from other changes: spc := spc := $(spc) $(spc) -- To view, visit https://review.coreboot.org/c/flashrom/+/23005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I60863a5c7d70dde71486fccb66cb59b30ba4d982 Gerrit-Change-Number: 23005 Gerrit-PatchSet: 6 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 30 Jun 2020 12:43:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: Add Manibuilder
by Angel Pons (Code Review) 30 Jun '20

30 Jun '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/23005 ) Change subject: Add Manibuilder ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/flashrom/+/23005/6/util/manibuilder/Makefile File util/manibuilder/Makefile: https://review.coreboot.org/c/flashrom/+/23005/6/util/manibuilder/Makefile@8 PS6, Line 8: spc := : spc += this broke -- To view, visit https://review.coreboot.org/c/flashrom/+/23005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I60863a5c7d70dde71486fccb66cb59b30ba4d982 Gerrit-Change-Number: 23005 Gerrit-PatchSet: 6 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 30 Jun 2020 12:41:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call
by Simon Buhrow (Code Review) 30 Jun '20

30 Jun '20

Simon Buhrow has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/40477 ) Change subject: ft2232_spi.c: Pack WREN and op in one ftdi_write_data() call ...................................................................... Patch Set 11: Anyone having time to give some feedback? -- To view, visit https://review.coreboot.org/c/flashrom/+/40477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a Gerrit-Change-Number: 40477 Gerrit-PatchSet: 11 Gerrit-Owner: Simon Buhrow Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 30 Jun 2020 07:07:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: dediprog: Correct REQTYPE_OTHER_OUT macro
by David Hendricks (Code Review) 24 Jun '20

24 Jun '20

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42763 ) Change subject: dediprog: Correct REQTYPE_OTHER_OUT macro ...................................................................... dediprog: Correct REQTYPE_OTHER_OUT macro It's not used anywhere, but it should be correct if we continue to keep it in. Change-Id: I8a6941c2906dda2c5aac5e0af3364fd2ac5773f3 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M dediprog.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/63/42763/1 diff --git a/dediprog.c b/dediprog.c index 1f7c3d0..827d5e4 100644 --- a/dediprog.c +++ b/dediprog.c @@ -39,7 +39,7 @@ #define FIRMWARE_VERSION(x,y,z) ((x << 16) | (y << 8) | z) #define DEFAULT_TIMEOUT 3000 #define DEDIPROG_ASYNC_TRANSFERS 8 /* at most 8 asynchronous transfers */ -#define REQTYPE_OTHER_OUT (LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_OTHER) /* 0x43 */ +#define REQTYPE_OTHER_OUT (LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_OTHER) /* 0x43 */ #define REQTYPE_OTHER_IN (LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_OTHER) /* 0xC3 */ #define REQTYPE_EP_OUT (LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_ENDPOINT) /* 0x42 */ #define REQTYPE_EP_IN (LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_ENDPOINT) /* 0xC2 */ -- To view, visit https://review.coreboot.org/c/flashrom/+/42763 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I8a6941c2906dda2c5aac5e0af3364fd2ac5773f3 Gerrit-Change-Number: 42763 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: tree: Remove unneeded semicolons after loops
by David Hendricks (Code Review) 24 Jun '20

24 Jun '20

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42742 ) Change subject: tree: Remove unneeded semicolons after loops ...................................................................... tree: Remove unneeded semicolons after loops Trivial cleanup Change-Id: Id93a019a39b765c70b1a4eaeb25d9b582c3e4141 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M cbtable.c M usbblaster_spi.c 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/42/42742/1 diff --git a/cbtable.c b/cbtable.c index e566840..6185f12 100644 --- a/cbtable.c +++ b/cbtable.c @@ -205,7 +205,7 @@ msg_pdbg("Found coreboot table at 0x%08lx.\n", addr); return head; - }; + } return NULL; } diff --git a/usbblaster_spi.c b/usbblaster_spi.c index 46de86c..58a8a0e 100644 --- a/usbblaster_spi.c +++ b/usbblaster_spi.c @@ -160,7 +160,7 @@ return -1; } n_read -= payload_size; - }; + } n_read = readcnt; while (n_read) { -- To view, visit https://review.coreboot.org/c/flashrom/+/42742 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id93a019a39b765c70b1a4eaeb25d9b582c3e4141 Gerrit-Change-Number: 42742 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: sb600spi -> fchspi: Rename AMD SPI programmer
by Edward O'Callaghan (Code Review) 24 Jun '20

24 Jun '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/36434 ) Change subject: sb600spi -> fchspi: Rename AMD SPI programmer ...................................................................... sb600spi -> fchspi: Rename AMD SPI programmer The AMD FCH controller has two main SPI ip core variants, the so-called 'sb600' variant and the newer 'spi100' variant. The sb600spi.c driver supports both variants and so its name isn't very general. Here we rename it to be more general. Change-Id: Iad92fb224954d66968e7aeb75cb515f075a26ac8 Signed-off-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M Makefile M chipset_enable.c R fchspi.c M meson.build M programmer.h 5 files changed, 11 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/36434/1 diff --git a/Makefile b/Makefile index f0a1b61..143a8c1 100644 --- a/Makefile +++ b/Makefile @@ -767,7 +767,7 @@ FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o internal.o ifeq ($(ARCH), x86) -PROGRAMMER_OBJS += it87spi.o it85spi.o sb600spi.o amd_imc.o wbsio_spi.o mcp6x_spi.o +PROGRAMMER_OBJS += it87spi.o it85spi.o fchspi.o amd_imc.o wbsio_spi.o mcp6x_spi.o PROGRAMMER_OBJS += ichspi.o dmi.o ifeq ($(CONFIG_INTERNAL_DMI), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL_DMI=1' diff --git a/chipset_enable.c b/chipset_enable.c index b55852c..e57a18e 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1297,7 +1297,7 @@ return enable_flash_amd_via(dev, name, 0xE0); } -static int enable_flash_sb600(struct pci_dev *dev, const char *name) +static int enable_flash_fch(struct pci_dev *dev, const char *name) { uint32_t prot; uint8_t reg; @@ -1330,7 +1330,7 @@ internal_buses_supported &= BUS_LPC | BUS_FWH; - ret = sb600_probe_spi(dev); + ret = fch_probe_spi(dev); /* Read ROM strap override register. */ OUTB(0x8f, 0xcd6); @@ -1685,16 +1685,16 @@ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) {0x1002, 0x4377, B_PFL, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1002, 0x438d, B_FLS, OK, "AMD", "SB600", enable_flash_sb600}, - {0x1002, 0x439d, B_FLS, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600}, + {0x1002, 0x438d, B_FLS, OK, "AMD", "SB600", enable_flash_fch}, + {0x1002, 0x439d, B_FLS, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_fch}, {0x100b, 0x0510, B_PFL, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1022, 0x2080, B_PFL, OK, "AMD", "CS5536", enable_flash_cs5536}, {0x1022, 0x2090, B_PFL, OK, "AMD", "CS5536", enable_flash_cs5536}, {0x1022, 0x3000, B_PFL, OK, "AMD", "Elan SC520", get_flashbase_sc520}, {0x1022, 0x7440, B_PFL, OK, "AMD", "AMD-768", enable_flash_amd_768_8111}, {0x1022, 0x7468, B_PFL, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111}, - {0x1022, 0x780e, B_FLS, OK, "AMD", "FCH", enable_flash_sb600}, - {0x1022, 0x790e, B_FLS, OK, "AMD", "FP4", enable_flash_sb600}, + {0x1022, 0x780e, B_FLS, OK, "AMD", "FCH", enable_flash_fch}, + {0x1022, 0x790e, B_FLS, OK, "AMD", "FP4", enable_flash_fch}, {0x1039, 0x0406, B_PFL, NT, "SiS", "501/5101/5501", enable_flash_sis501}, {0x1039, 0x0496, B_PFL, NT, "SiS", "85C496+497", enable_flash_sis85c496}, {0x1039, 0x0530, B_PFL, OK, "SiS", "530", enable_flash_sis530}, diff --git a/sb600spi.c b/fchspi.c similarity index 99% rename from sb600spi.c rename to fchspi.c index 7bdd11f..e0eab07 100644 --- a/sb600spi.c +++ b/fchspi.c @@ -579,7 +579,7 @@ return amd_imc_shutdown(dev); } -int sb600_probe_spi(struct pci_dev *dev) +int fch_probe_spi(struct pci_dev *dev) { struct pci_dev *smbus_dev; uint32_t tmp; diff --git a/meson.build b/meson.build index d1f663f..d4bbff7 100644 --- a/meson.build +++ b/meson.build @@ -182,7 +182,7 @@ srcs += 'it85spi.c' srcs += 'it87spi.c' srcs += 'mcp6x_spi.c' - srcs += 'sb600spi.c' + srcs += 'fchspi.c' srcs += 'wbsio_spi.c' endif config_bitbang_spi = true diff --git a/programmer.h b/programmer.h index e42c6bb..e2cadd9 100644 --- a/programmer.h +++ b/programmer.h @@ -657,8 +657,8 @@ /* mcp6x_spi.c */ int mcp6x_spi_init(int want_spi); -/* sb600spi.c */ -int sb600_probe_spi(struct pci_dev *dev); +/* fchspi.c */ +int fch_probe_spi(struct pci_dev *dev); /* wbsio_spi.c */ int wbsio_check_for_spi(void); -- To view, visit https://review.coreboot.org/c/flashrom/+/36434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iad92fb224954d66968e7aeb75cb515f075a26ac8 Gerrit-Change-Number: 36434 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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