June 2019 - flashrom-gerrit - mail.coreboot.org

Change in ...flashrom[master]: fmap.c: Remove unneeded 'else'
by HAOUAS Elyes (Code Review) 21 Jun '19

21 Jun '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33345 Change subject: fmap.c: Remove unneeded 'else' ...................................................................... fmap.c: Remove unneeded 'else' 'else' is not needed after a 'break' or 'return'. Change-Id: I5df4d8075be012b9edf7be520d611042d9945094 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M fmap.c 1 file changed, 3 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/45/33345/1 diff --git a/fmap.c b/fmap.c index 84b3b54..31f282f 100644 --- a/fmap.c +++ b/fmap.c @@ -132,9 +132,8 @@ if (offset < 0) { msg_gdbg("Unable to find fmap in provided buffer.\n"); return 2; - } else { - msg_gdbg("Found fmap at offset 0x%06zx\n", (size_t)offset); } + msg_gdbg("Found fmap at offset 0x%06zx\n", (size_t)offset); const struct fmap *fmap = (const struct fmap *)(buf + offset); *fmap_out = malloc(fmap_size(fmap)); @@ -251,10 +250,9 @@ msg_gdbg("fmap found at offset 0x%06zx\n", offset); fmap_found = 1; break; - } else { - msg_gerr("fmap signature found at %zu but header is invalid.\n", offset); - ret = 2; } + msg_gerr("fmap signature found at %zu but header is invalid.\n", offset); + ret = 2; } if (fmap_found) -- To view, visit https://review.coreboot.org/c/flashrom/+/33345 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I5df4d8075be012b9edf7be520d611042d9945094 Gerrit-Change-Number: 33345 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 2

Change in ...flashrom[master]: dmi.c: Remove unneeded 'else'
by HAOUAS Elyes (Code Review) 21 Jun '19

21 Jun '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33344 Change subject: dmi.c: Remove unneeded 'else' ...................................................................... dmi.c: Remove unneeded 'else' 'else' is not needed after a 'break' or 'return'. Change-Id: I71ab1fec98c2b61d73aeb646ddfc810662d4136d Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M dmi.c 1 file changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/44/33344/1 diff --git a/dmi.c b/dmi.c index 79321ce..c32a8da 100644 --- a/dmi.c +++ b/dmi.c @@ -320,9 +320,8 @@ msg_perr("DMI pipe read error\n"); pclose(dmidecode_pipe); return NULL; - } else { - answerbuf[0] = 0; /* Hit EOF */ } + answerbuf[0] = 0; /* Hit EOF */ } } while (answerbuf[0] == '#'); -- To view, visit https://review.coreboot.org/c/flashrom/+/33344 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71ab1fec98c2b61d73aeb646ddfc810662d4136d Gerrit-Change-Number: 33344 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 2

Change in ...flashrom[master]: serprog.c: Remove unneeded 'else'
by HAOUAS Elyes (Code Review) 21 Jun '19

21 Jun '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33348 Change subject: serprog.c: Remove unneeded 'else' ...................................................................... serprog.c: Remove unneeded 'else' 'else' is not needed after a 'break' or 'return'. Change-Id: I9015020889c25ecbd391a18f56f99affc8ea307d Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M serprog.c 1 file changed, 3 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/48/33348/1 diff --git a/serprog.c b/serprog.c index c3d48a4..b7ef35c 100644 --- a/serprog.c +++ b/serprog.c @@ -937,9 +937,8 @@ * needed for non-SPI chips). Below we make sure that the requested range is within this window. */ if ((phys_addr & 0xFF000000) == 0xFF000000) { return (void*)phys_addr; - } else { - msg_pwarn(MSGHEADER "requested mapping %s is incompatible: 0x%zx bytes at 0x%0*" PRIxPTR ".\n", - descr, len, PRIxPTR_WIDTH, phys_addr); - return NULL; } + msg_pwarn(MSGHEADER "requested mapping %s is incompatible: 0x%zx bytes at 0x%0*" PRIxPTR ".\n", + descr, len, PRIxPTR_WIDTH, phys_addr); + return NULL; } -- To view, visit https://review.coreboot.org/c/flashrom/+/33348 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9015020889c25ecbd391a18f56f99affc8ea307d Gerrit-Change-Number: 33348 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 2

Change in ...flashrom[master]: ichspi.c: Remove unneeded 'esle'
by HAOUAS Elyes (Code Review) 21 Jun '19

21 Jun '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33347 Change subject: ichspi.c: Remove unneeded 'esle' ...................................................................... ichspi.c: Remove unneeded 'esle' 'else' is not needed after a 'break' or 'return'. Change-Id: Ie000732158f27632ee92404c66a9aab43f3b374c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M ichspi.c 1 file changed, 11 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/47/33347/1 diff --git a/ichspi.c b/ichspi.c index a30ca02..e50a2e3 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1246,19 +1246,18 @@ { if (hwseq_data.only_4k) { return 4 * 1024; - } else { - uint8_t enc_berase; - static const uint32_t dec_berase[4] = { - 256, - 4 * 1024, - 8 * 1024, - 64 * 1024 - }; - - ich_hwseq_set_addr(addr); - enc_berase = (REGREAD16(ICH9_REG_HSFS) & HSFS_BERASE) >> HSFS_BERASE_OFF; - return dec_berase[enc_berase]; } + uint8_t enc_berase; + static const uint32_t dec_berase[4] = { + 256, + 4 * 1024, + 8 * 1024, + 64 * 1024 + }; + + ich_hwseq_set_addr(addr); + enc_berase = (REGREAD16(ICH9_REG_HSFS) & HSFS_BERASE) >> HSFS_BERASE_OFF; + return dec_berase[enc_berase]; } /* Polls for Cycle Done Status, Flash Cycle Error or timeout in 8 us intervals. -- To view, visit https://review.coreboot.org/c/flashrom/+/33347 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie000732158f27632ee92404c66a9aab43f3b374c Gerrit-Change-Number: 33347 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 11

Change in ...flashrom[master]: spi25: Fix layering violation in default_spi_write_aai()
by Nico Huber (Code Review) 21 Jun '19

21 Jun '19

Hello HAOUAS Elyes, David Hendricks, Stefan Reinauer, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/33649 to review the following change. Change subject: spi25: Fix layering violation in default_spi_write_aai() ...................................................................... spi25: Fix layering violation in default_spi_write_aai() Change-Id: I8aa3e2992f64906edc669060936f9522d32637fb Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M it87spi.c M spi25.c M wbsio_spi.c 3 files changed, 2 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/49/33649/1 diff --git a/it87spi.c b/it87spi.c index df9f664..13b3aae 100644 --- a/it87spi.c +++ b/it87spi.c @@ -115,7 +115,7 @@ .multicommand = default_spi_send_multicommand, .read = it8716f_spi_chip_read, .write_256 = it8716f_spi_chip_write_256, - .write_aai = default_spi_write_aai, + .write_aai = spi_chip_write_1, }; static uint16_t it87spi_probe(uint16_t port) diff --git a/spi25.c b/spi25.c index fd87dc9..06e451f 100644 --- a/spi25.c +++ b/spi25.c @@ -766,20 +766,6 @@ JEDEC_AAI_WORD_PROGRAM, }; - switch (flash->mst->spi.type) { -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - case SPI_CONTROLLER_IT87XX: - case SPI_CONTROLLER_WBSIO: - msg_perr("%s: impossible with this SPI controller," - " degrading to byte program\n", __func__); - return spi_chip_write_1(flash, buf, start, len); -#endif -#endif - default: - break; - } - /* The even start address and even length requirements can be either * honored outside this function, or we can call spi_byte_program * for the first and/or last byte and use AAI for the rest. diff --git a/wbsio_spi.c b/wbsio_spi.c index ccd227b..d7651c0 100644 --- a/wbsio_spi.c +++ b/wbsio_spi.c @@ -72,7 +72,7 @@ .multicommand = default_spi_send_multicommand, .read = wbsio_spi_read, .write_256 = spi_chip_write_1, - .write_aai = default_spi_write_aai, + .write_aai = spi_chip_write_1, }; int wbsio_check_for_spi(void) -- To view, visit https://review.coreboot.org/c/flashrom/+/33649 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I8aa3e2992f64906edc669060936f9522d32637fb Gerrit-Change-Number: 33649 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newchange

2 3

Change in ...flashrom[master]: dediprog: Bail out on unsupported, long transfers
by Nico Huber (Code Review) 21 Jun '19

21 Jun '19

Hello Carl-Daniel Hailfinger, ron minnich, David Hendricks, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/33614 to review the following change. Change subject: dediprog: Bail out on unsupported, long transfers ...................................................................... dediprog: Bail out on unsupported, long transfers Change-Id: I7b16701597909c015f98199e73ebb7d923f2b072 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M dediprog.c 1 file changed, 9 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/14/33614/1 diff --git a/dediprog.c b/dediprog.c index 8552a3c..8029b64 100644 --- a/dediprog.c +++ b/dediprog.c @@ -362,7 +362,15 @@ static int prepare_rw_cmd( struct flashctx *const flash, uint8_t *data_packet, unsigned int count, - uint8_t dedi_spi_cmd, unsigned int *value, unsigned int *idx, unsigned int start, int is_read) { + uint8_t dedi_spi_cmd, unsigned int *value, unsigned int *idx, unsigned int start, int is_read) +{ + if (count >= 1 << 16) { + msg_perr("%s: Unsupported transfer length of %u blocks! " + "Please report a bug at flashrom(a)flashrom.org\n", + __func__, count); + return 1; + } + /* First 5 bytes are common in both generations. */ data_packet[0] = count & 0xff; data_packet[1] = (count >> 8) & 0xff; -- To view, visit https://review.coreboot.org/c/flashrom/+/33614 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7b16701597909c015f98199e73ebb7d923f2b072 Gerrit-Change-Number: 33614 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org> Gerrit-MessageType: newchange

4 4

Change in ...flashrom[master]: spi: Move 16MiB partitioning up into spi_chip_read()
by Nico Huber (Code Review) 21 Jun '19

21 Jun '19

Hello Carl-Daniel Hailfinger, ron minnich, David Hendricks, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/33613 to review the following change. Change subject: spi: Move 16MiB partitioning up into spi_chip_read() ...................................................................... spi: Move 16MiB partitioning up into spi_chip_read() We enforced a 16MiB limit in spi_read_chunked() for multi-die flash chips that can't be fully read at once. The same limit can be useful for dediprog programmers. So move it into a more generic place. Untested. Change-Id: Iab1fd5b2ea550b4b3ef3e8402e0b6ca218485a51 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M flash.h M spi.c M spi25.c 3 files changed, 21 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/13/33613/1 diff --git a/flash.h b/flash.h index 5bbfa0a..3a7713e 100644 --- a/flash.h +++ b/flash.h @@ -37,6 +37,9 @@ #include "libflashrom.h" #include "layout.h" +#define KiB (1024) +#define MiB (1024 * KiB) + #define ERROR_PTR ((void*)-1) /* Error codes */ diff --git a/spi.c b/spi.c index a4dba19..cdf43c6 100644 --- a/spi.c +++ b/spi.c @@ -99,7 +99,15 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - return flash->mst->spi.read(flash, buf, start, len); + int ret; + size_t to_read; + for (; len; len -= to_read, buf += to_read, start += to_read) { + to_read = min(16*MiB, len); + ret = flash->mst->spi.read(flash, buf, start, to_read); + if (ret) + return ret; + } + return 0; } /* diff --git a/spi25.c b/spi25.c index fd87dc9..cca2a04 100644 --- a/spi25.c +++ b/spi25.c @@ -657,43 +657,20 @@ /* * Read a part of the flash chip. - * FIXME: Use the chunk code from Michael Karcher instead. - * Each naturally aligned area is read separately in chunks with a maximum size of chunksize. + * Data is read in chunks with a maximum size of chunksize. */ int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize) { - int rc = 0; - unsigned int i, j, starthere, lenhere, toread; - /* Limit for multi-die 4-byte-addressing chips. */ - unsigned int area_size = min(flash->chip->total_size * 1024, 16 * 1024 * 1024); - - /* Warning: This loop has a very unusual condition and body. - * The loop needs to go through each area with at least one affected - * byte. The lowest area number is (start / area_size) since that - * division rounds down. The highest area number we want is the area - * where the last byte of the range lives. That last byte has the - * address (start + len - 1), thus the highest area number is - * (start + len - 1) / area_size. Since we want to include that last - * area as well, the loop condition uses <=. - */ - for (i = start / area_size; i <= (start + len - 1) / area_size; i++) { - /* Byte position of the first byte in the range in this area. */ - /* starthere is an offset to the base address of the chip. */ - starthere = max(start, i * area_size); - /* Length of bytes in the range in this area. */ - lenhere = min(start + len, (i + 1) * area_size) - starthere; - for (j = 0; j < lenhere; j += chunksize) { - toread = min(chunksize, lenhere - j); - rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); - if (rc) - break; - } - if (rc) - break; + int ret; + size_t to_read; + for (; len; len -= to_read, buf += to_read, start += to_read) { + to_read = min(chunksize, len); + ret = spi_nbyte_read(flash, start, buf, to_read); + if (ret) + return ret; } - - return rc; + return 0; } /* -- To view, visit https://review.coreboot.org/c/flashrom/+/33613 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iab1fd5b2ea550b4b3ef3e8402e0b6ca218485a51 Gerrit-Change-Number: 33613 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org> Gerrit-MessageType: newchange

4 12

Change in ...flashrom[master]: print: Update Asus URLs to use more secure HTTPS
by Nico Huber (Code Review) 21 Jun '19

21 Jun '19

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/flashrom/+/21874 ) Change subject: print: Update Asus URLs to use more secure HTTPS ...................................................................... print: Update Asus URLs to use more secure HTTPS Asus set up HTTPS for their site, and redirects to that by default. So, use this by default, which also saves one redirect. ``` $ curl -I http://www.asus.com/ HTTP/1.1 301 Moved Permanently Content-Length: 0 Location: https://www.asus.com/ Date: Wed, 04 Oct 2017 11:15:14 GMT Connection: keep-alive X-Akamai-Device-Characteristics: desktop X-Akamai-Device-Model: ; ; cURL; cURL ``` Use the command below to change the occurrences. ``` sed -i 's,http://www.asus.com,https://www.asus.com,g' print.c ``` Change-Id: I62319bfbf39c73f98ed3f865a11f4fe870befee4 Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/21874 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M print.c 1 file changed, 113 insertions(+), 113 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/print.c b/print.c index 30f06c8..7eb5485 100644 --- a/print.c +++ b/print.c @@ -583,77 +583,77 @@ B("ASRock", "P4i65G", OK, "http://www.asrock.com/mb/overview.asp?Model=P4i65G", NULL), B("ASRock", "P4i65GV", OK, "http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL), B("ASRock", "Z68 Extreme4", BAD, "http://www.asrock.com/mb/overview.asp?Model=Z68%20Extreme4", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), - B("ASUS", "A7N8X Deluxe", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL), - B("ASUS", "A7N8X-E Deluxe", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL), - B("ASUS", "A7N8X-VM/400", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL), + B("ASUS", "A7N8X Deluxe", OK, "https://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL), + B("ASUS", "A7N8X-E Deluxe", OK, "https://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL), + B("ASUS", "A7N8X-VM/400", OK, "https://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL), B("ASUS", "A7V133", OK, NULL, NULL), B("ASUS", "A7V333", OK, NULL, NULL), - B("ASUS", "A7V400-MX", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL), - B("ASUS", "A7V600-X", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL), - B("ASUS", "A7V8X", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL), - B("ASUS", "A7V8X-MX", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL), - B("ASUS", "A7V8X-MX SE", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL), - B("ASUS", "A7V8X-X", OK, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL), + B("ASUS", "A7V400-MX", OK, "https://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL), + B("ASUS", "A7V600-X", OK, "https://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL), + B("ASUS", "A7V8X", OK, "https://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL), + B("ASUS", "A7V8X-MX", OK, "https://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL), + B("ASUS", "A7V8X-MX SE", OK, "https://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL), + B("ASUS", "A7V8X-X", OK, "https://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL), B("ASUS", "A8M2N-LA (NodusM3-GL8E)", OK, "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&…", "This is an OEM board from HP, the HP name is NodusM3-GL8E."), - B("ASUS", "A8N-E", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL), + B("ASUS", "A8N-E", OK, "https://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL), B("ASUS", "A8N-LA (Nagami-GL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&d…", "This is an OEM board from HP, the HP name is Nagami-GL8E."), - B("ASUS", "A8N-SLI", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL), + B("ASUS", "A8N-SLI", OK, "https://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL), B("ASUS", "A8N-SLI Deluxe", NT, NULL, "Should work out of the box since r1593."), - B("ASUS", "A8N-SLI Premium", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL), - B("ASUS", "A8N-VM", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL), - B("ASUS", "A8N-VM CSM", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL), + B("ASUS", "A8N-SLI Premium", OK, "https://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL), + B("ASUS", "A8N-VM", OK, "https://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL), + B("ASUS", "A8N-VM CSM", OK, "https://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL), B("ASUS", "A8NE-FM/S", OK, "http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE…", NULL), - B("ASUS", "A8V Deluxe", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL), - B("ASUS", "A8V-E Deluxe", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL), - B("ASUS", "A8V-E SE", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"), - B("ASUS", "C60M1-I", OK, "http://www.asus.com/Motherboards/C60M1I/", "The MAC address of the onboard network card is stored in flash."), - B("ASUS", "Crosshair II Formula", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL), - B("ASUS", "Crosshair IV Extreme", OK, "http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL), + B("ASUS", "A8V Deluxe", OK, "https://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL), + B("ASUS", "A8V-E Deluxe", OK, "https://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL), + B("ASUS", "A8V-E SE", OK, "https://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"), + B("ASUS", "C60M1-I", OK, "https://www.asus.com/Motherboards/C60M1I/", "The MAC address of the onboard network card is stored in flash."), + B("ASUS", "Crosshair II Formula", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL), + B("ASUS", "Crosshair IV Extreme", OK, "https://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL), B("ASUS", "CUSL2-C", OK, NULL, "The image provided by ASUS is only 256 kB big and has to be written to the upper 256 kB of the 512 kB chip."), - B("ASUS", "DSAN-DX", NT, "http://www.asus.com/Server_Workstation/Server_Motherboards/DSANDX/", NULL), - B("ASUS", "E35M1-I DELUXE", OK, "http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL), - B("ASUS", "F1A75-V PRO", OK, "http://www.asus.com/Motherboard/F1A75V_PRO/", NULL), + B("ASUS", "DSAN-DX", NT, "https://www.asus.com/Server_Workstation/Server_Motherboards/DSANDX/", NULL), + B("ASUS", "E35M1-I DELUXE", OK, "https://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL), + B("ASUS", "F1A75-V PRO", OK, "https://www.asus.com/Motherboard/F1A75V_PRO/", NULL), B("ASUS", "F2A85-M", DEP, "https://www.asus.com/Motherboards/F2A85M/", "UEFI builds v6404 and above disable access to some parts of the flash, cf. http://www.coreboot.org/ASUS_F2A85-M#UEFI_builds_that_allow_flash_chip_acce…"), - B("ASUS", "K8N", OK, "http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL), - B("ASUS", "K8V", OK, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL), - B("ASUS", "K8V SE Deluxe", OK, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL), - B("ASUS", "K8V-X", OK, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL), - B("ASUS", "K8V-X SE", OK, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL), - B("ASUS", "KFSN4-DRE/SAS", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL), - B("ASUS", "M2A-MX", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL), - B("ASUS", "M2A-VM (HDMI)", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL), - B("ASUS", "M2N32-SLI Deluxe", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL), - B("ASUS", "M2N68-VM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M2N68VM/", NULL), - B("ASUS", "M2NBP-VM CSM", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL), - B("ASUS", "M2N-E", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See https://flashrom.org/pipermail/flashrom/2009-November/000879.html"), - B("ASUS", "M2N-E SLI", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL), - B("ASUS", "M2N-MX SE Plus", OK, "http://www.asus.com/Motherboards/M2NMX_SE_Plus/", NULL), - B("ASUS", "M2NPV-VM", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL), - B("ASUS", "M2N-SLI Deluxe", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL), - B("ASUS", "M2V", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL), - B("ASUS", "M2V-MX", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL), - B("ASUS", "M3A", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL), - B("ASUS", "M3A76-CM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL), - B("ASUS", "M3A78-EH", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EH/", NULL), - B("ASUS", "M3A78-EM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL), - B("ASUS", "M3N78 PRO", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78_PRO/", NULL), - B("ASUS", "M3N78-VM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL), - B("ASUS", "M3N-H/HDMI", OK, "http://www.asus.com/Motherboards/M3NHHDMI//", NULL), - B("ASUS", "M4A785TD-M EVO", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL), - B("ASUS", "M4A785TD-V EVO", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL), - B("ASUS", "M4A785T-M", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TM/", NULL), - B("ASUS", "M4A78-EM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL), - B("ASUS", "M4A78LT-M LE", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL), - B("ASUS", "M4A79T Deluxe", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL), - B("ASUS", "M4A87TD/USB3", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL), - B("ASUS", "M4A89GTD PRO", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL), - B("ASUS", "M4N68T V2", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4N68T_V2/", NULL), - B("ASUS", "M4N78 PRO", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL), - B("ASUS", "M4N78 SE", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_SE/", NULL), - B("ASUS", "M5A78L-M LX", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A78LM_LX/", "The MAC address of the onboard LAN NIC is stored in flash, hence overwritten by flashrom; see https://flashrom.org/pipermail/flashrom/2012-May/009200.html"), - B("ASUS", "M5A97 (rev. 1.0)", OK, "http://www.asus.com/Motherboard/M5A97/", NULL), - B("ASUS", "M5A99X EVO", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL), - B("ASUS", "Maximus IV Extreme", BAD, "http://www.asus.com/Motherboards/Intel_Socket_1155/Maximus_IV_Extreme/", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("ASUS", "K8N", OK, "https://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL), + B("ASUS", "K8V", OK, "https://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL), + B("ASUS", "K8V SE Deluxe", OK, "https://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL), + B("ASUS", "K8V-X", OK, "https://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL), + B("ASUS", "K8V-X SE", OK, "https://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL), + B("ASUS", "KFSN4-DRE/SAS", OK, "https://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL), + B("ASUS", "M2A-MX", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL), + B("ASUS", "M2A-VM (HDMI)", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL), + B("ASUS", "M2N32-SLI Deluxe", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL), + B("ASUS", "M2N68-VM", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M2N68VM/", NULL), + B("ASUS", "M2NBP-VM CSM", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL), + B("ASUS", "M2N-E", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See https://flashrom.org/pipermail/flashrom/2009-November/000879.html"), + B("ASUS", "M2N-E SLI", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL), + B("ASUS", "M2N-MX SE Plus", OK, "https://www.asus.com/Motherboards/M2NMX_SE_Plus/", NULL), + B("ASUS", "M2NPV-VM", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL), + B("ASUS", "M2N-SLI Deluxe", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL), + B("ASUS", "M2V", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL), + B("ASUS", "M2V-MX", OK, "https://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL), + B("ASUS", "M3A", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL), + B("ASUS", "M3A76-CM", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL), + B("ASUS", "M3A78-EH", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EH/", NULL), + B("ASUS", "M3A78-EM", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL), + B("ASUS", "M3N78 PRO", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M3N78_PRO/", NULL), + B("ASUS", "M3N78-VM", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL), + B("ASUS", "M3N-H/HDMI", OK, "https://www.asus.com/Motherboards/M3NHHDMI//", NULL), + B("ASUS", "M4A785TD-M EVO", OK, "https://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL), + B("ASUS", "M4A785TD-V EVO", OK, "https://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL), + B("ASUS", "M4A785T-M", OK, "https://www.asus.com/Motherboards/AMD_AM3/M4A785TM/", NULL), + B("ASUS", "M4A78-EM", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL), + B("ASUS", "M4A78LT-M LE", OK, "https://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL), + B("ASUS", "M4A79T Deluxe", OK, "https://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL), + B("ASUS", "M4A87TD/USB3", OK, "https://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL), + B("ASUS", "M4A89GTD PRO", OK, "https://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL), + B("ASUS", "M4N68T V2", OK, "https://www.asus.com/Motherboards/AMD_AM3/M4N68T_V2/", NULL), + B("ASUS", "M4N78 PRO", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL), + B("ASUS", "M4N78 SE", OK, "https://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_SE/", NULL), + B("ASUS", "M5A78L-M LX", OK, "https://www.asus.com/Motherboards/AMD_AM3Plus/M5A78LM_LX/", "The MAC address of the onboard LAN NIC is stored in flash, hence overwritten by flashrom; see https://flashrom.org/pipermail/flashrom/2012-May/009200.html"), + B("ASUS", "M5A97 (rev. 1.0)", OK, "https://www.asus.com/Motherboard/M5A97/", NULL), + B("ASUS", "M5A99X EVO", OK, "https://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL), + B("ASUS", "Maximus IV Extreme", BAD, "https://www.asus.com/Motherboards/Intel_Socket_1155/Maximus_IV_Extreme/", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "MEW-AM", BAD, NULL, "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("ASUS", "MEW-VM", BAD, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("ASUS", "OPLX-M", NT, NULL, "Untested board enable."), @@ -669,61 +669,61 @@ B("ASUS", "P4B266", OK, NULL, NULL), B("ASUS", "P4B266-LM", OK, "http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL), B("ASUS", "P4B533-E", OK, NULL, NULL), - B("ASUS", "P4C800-E Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL), + B("ASUS", "P4C800-E Deluxe", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL), B("ASUS", "P4GV-LA (Guppy)", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c003…", NULL), - B("ASUS", "P4P800", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL), - B("ASUS", "P4P800-E Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL), - B("ASUS", "P4P800-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL), - B("ASUS", "P4P800-X", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800X/", NULL), - B("ASUS", "P4PE-X/TE", NT, "http://www.asus.com/999/html/events/mb/socket478/p4pe-x-te/overview.htm", NULL), + B("ASUS", "P4P800", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL), + B("ASUS", "P4P800-E Deluxe", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL), + B("ASUS", "P4P800-VM", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL), + B("ASUS", "P4P800-X", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4P800X/", NULL), + B("ASUS", "P4PE-X/TE", NT, "https://www.asus.com/999/html/events/mb/socket478/p4pe-x-te/overview.htm", NULL), B("ASUS", "P4S533-X", OK, NULL, NULL), - B("ASUS", "P4S800-MX", OK, "http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL), + B("ASUS", "P4S800-MX", OK, "https://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL), B("ASUS", "P4SC-E", OK, NULL, "Part of ASUS Terminator P4 533 barebone system"), B("ASUS", "P4SD-LA", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL), B("ASUS", "P5A", OK, NULL, NULL), B("ASUS", "P5B", OK, NULL, NULL), - B("ASUS", "P5B-Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL), + B("ASUS", "P5B-Deluxe", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL), B("ASUS", "P5B-VM", OK, NULL, NULL), B("ASUS", "P5BV-M", BAD, NULL, "Reported by Bernhard M. Wiedemann <bernhard(a)uml12d.zq1.de> to flashrom(a)coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."), - B("ASUS", "P5BV-R", OK, "http://www.asus.com/Server_Workstation/Servers/RS120E5PA2/", "Used in RS120-E5/PA2 servers."), - B("ASUS", "P5GC-MX/1333", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL), - B("ASUS", "P5GD1 Pro", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL), + B("ASUS", "P5BV-R", OK, "https://www.asus.com/Server_Workstation/Servers/RS120E5PA2/", "Used in RS120-E5/PA2 servers."), + B("ASUS", "P5GC-MX/1333", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL), + B("ASUS", "P5GD1 Pro", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL), B("ASUS", "P5GD1-VM/S", OK, NULL, "This is an OEM board from FSC. Although flashrom supports it and can probably not distinguish it from the P5GD1-VM, please note that the P5GD1-VM BIOS does not support the FSC variants completely."), B("ASUS", "P5GD1(-VM)", NT, NULL, "Untested board enable."), - B("ASUS", "P5GD2 Premium", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/", NULL), - B("ASUS", "P5GD2-X", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2X/", NULL), - B("ASUS", "P5GDC Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL), - B("ASUS", "P5GDC-V Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL), + B("ASUS", "P5GD2 Premium", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/", NULL), + B("ASUS", "P5GD2-X", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5GD2X/", NULL), + B("ASUS", "P5GDC Deluxe", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL), + B("ASUS", "P5GDC-V Deluxe", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL), B("ASUS", "P5GD2/C variants", NT, NULL, "Untested board enable."), - B("ASUS", "P5K SE", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5K_SE/", NULL), - B("ASUS", "P5K-V", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL), - B("ASUS", "P5K-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL), - B("ASUS", "P5KC", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL), + B("ASUS", "P5K SE", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5K_SE/", NULL), + B("ASUS", "P5K-V", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL), + B("ASUS", "P5K-VM", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL), + B("ASUS", "P5KC", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL), B("ASUS", "P5KPL-AM IN/GB", OK, "http://support.asus.com/download.aspx?SLanguage=en&m=P5KPL-AM+IN%2fGB&os=29", NULL), - B("ASUS", "P5KPL-CM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL), - B("ASUS", "P5KPL-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLVM/", "Found in V3-P5G31."), - B("ASUS", "P5L-MX", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL), - B("ASUS", "P5L-VM 1394", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL), + B("ASUS", "P5KPL-CM", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL), + B("ASUS", "P5KPL-VM", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5KPLVM/", "Found in V3-P5G31."), + B("ASUS", "P5L-MX", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL), + B("ASUS", "P5L-VM 1394", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL), B("ASUS", "P5LD2", OK, NULL, NULL), B("ASUS", "P5LD2-MQ", OK, "http://support.asus.com/download.aspx?SLanguage=en&p=8&s=12&m=Vintage-PH2&o…", "Found in ASUS Vintage-PH2 barebones."), - B("ASUS", "P5LD2-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM/", NULL), - B("ASUS", "P5LD2-VM DH", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM_DH/", NULL), + B("ASUS", "P5LD2-VM", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM/", NULL), + B("ASUS", "P5LD2-VM DH", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM_DH/", NULL), B("ASUS", "P5LP-LE (Lithium-UL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prod…", "This is an OEM board from HP."), B("ASUS", "P5LP-LE (Epson OEM)", OK, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."), B("ASUS", "P5LP-LE", NT, NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."), - B("ASUS", "P5N-D", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL), - B("ASUS", "P5N-E SLI", NT, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."), - B("ASUS", "P5N32-E SLI", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL), - B("ASUS", "P5N7A-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL), - B("ASUS", "P5ND2-SLI Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL), - B("ASUS", "P5PE-VM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL), - B("ASUS", "P5QPL-AM", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL), - B("ASUS", "P5VD1-X", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL), - B("ASUS", "P5VD2-MX", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD2MX/", "The MAC address of the onboard LAN NIC is stored in flash, hence overwritten by flashrom; see https://flashrom.org/pipermail/flashrom/2012-March/009014.html"), - B("ASUS", "P6T SE", OK, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL), - B("ASUS", "P6T Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL), - B("ASUS", "P6T Deluxe V2", OK, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL), - B("ASUS", "P7H57D-V EVO", OK, "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL), + B("ASUS", "P5N-D", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL), + B("ASUS", "P5N-E SLI", NT, "https://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."), + B("ASUS", "P5N32-E SLI", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL), + B("ASUS", "P5N7A-VM", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL), + B("ASUS", "P5ND2-SLI Deluxe", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL), + B("ASUS", "P5PE-VM", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL), + B("ASUS", "P5QPL-AM", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL), + B("ASUS", "P5VD1-X", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL), + B("ASUS", "P5VD2-MX", OK, "https://www.asus.com/Motherboards/Intel_Socket_775/P5VD2MX/", "The MAC address of the onboard LAN NIC is stored in flash, hence overwritten by flashrom; see https://flashrom.org/pipermail/flashrom/2012-March/009014.html"), + B("ASUS", "P6T SE", OK, "https://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL), + B("ASUS", "P6T Deluxe", OK, "https://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL), + B("ASUS", "P6T Deluxe V2", OK, "https://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL), + B("ASUS", "P7H57D-V EVO", OK, "https://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL), B("ASUS", "P7H55-M LX", BAD, NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see https://flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"), B("ASUS", "P8B-E/4L", BAD, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8B WS", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -731,24 +731,24 @@ B("ASUS", "P8H61 PRO", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8H61-M LE/USB3", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8H67-M PRO", BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), // some firmware versions apparently are not locked, see report by Marek Zakrzewski - B("ASUS", "P8H77-I", OK, "http://www.asus.com/Motherboards/P8H77I/", NULL), - B("ASUS", "P8H77-M", OK, "http://www.asus.com/Motherboards/P8H77M/", NULL), - B("ASUS", "P8H77-V LE", OK, "http://www.asus.com/Motherboards/P8H77V_LE/", NULL), + B("ASUS", "P8H77-I", OK, "https://www.asus.com/Motherboards/P8H77I/", NULL), + B("ASUS", "P8H77-M", OK, "https://www.asus.com/Motherboards/P8H77M/", NULL), + B("ASUS", "P8H77-V LE", OK, "https://www.asus.com/Motherboards/P8H77V_LE/", NULL), B("ASUS", "P8P67 (rev. 3.1)", BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8P67 LE (B2)", OK, NULL, NULL), B("ASUS", "P8P67 LE (B3)", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), - B("ASUS", "P8P67 PRO (rev. 3.0)", OK, "http://www.asus.com/Motherboards/Intel_Socket_1155/P8P67_PRO/", NULL), + B("ASUS", "P8P67 PRO (rev. 3.0)", OK, "https://www.asus.com/Motherboards/Intel_Socket_1155/P8P67_PRO/", NULL), B("ASUS", "P8P67-M PRO", BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), - B("ASUS", "P8Z68-V", OK, "http://www.asus.com/Motherboards/Intel_Socket_1155/P8Z68V/", "Warning: MAC address of LOM is stored at 0x1000 - 0x1005 of the image."), + B("ASUS", "P8Z68-V", OK, "https://www.asus.com/Motherboards/Intel_Socket_1155/P8Z68V/", "Warning: MAC address of LOM is stored at 0x1000 - 0x1005 of the image."), B("ASUS", "P8Z68-V LE", BAD, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8Z68-V PRO", BAD, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), - B("ASUS", "P8Z68-V PRO/GEN3", OK, "http://www.asus.com/Motherboards/Intel_Socket_1155/P8Z68V_PROGEN3/", "Warning: MAC address of LOM is stored at 0x1000 - 0x1005 of the image."), - B("ASUS", "RAMPAGE III GENE", OK, "http://www.asus.com/Motherboards/RAMPAGE_III_GENE/", "The MAC address of the onboard network card is stored in flash."), - B("ASUS", "SABERTOOTH 990FX", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/SABERTOOTH_990FX/", NULL), - B("ASUS", "SABERTOOTH 990FX R2.0", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/SABERTOOTH_990FX_R20/", NULL), + B("ASUS", "P8Z68-V PRO/GEN3", OK, "https://www.asus.com/Motherboards/Intel_Socket_1155/P8Z68V_PROGEN3/", "Warning: MAC address of LOM is stored at 0x1000 - 0x1005 of the image."), + B("ASUS", "RAMPAGE III GENE", OK, "https://www.asus.com/Motherboards/RAMPAGE_III_GENE/", "The MAC address of the onboard network card is stored in flash."), + B("ASUS", "SABERTOOTH 990FX", OK, "https://www.asus.com/Motherboards/AMD_AM3Plus/SABERTOOTH_990FX/", NULL), + B("ASUS", "SABERTOOTH 990FX R2.0", OK, "https://www.asus.com/Motherboards/AMD_AM3Plus/SABERTOOTH_990FX_R20/", NULL), B("ASUS", "TUSL2-C", NT, "http://support.asus.com/download.aspx?SLanguage=en&p=1&s=4&m=TUSL2-C&os=&ha…", "Untested board enable."), - B("ASUS", "Z8NA-D6C", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL), - B("ASUS", "Z8PE-D12", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL), + B("ASUS", "Z8NA-D6C", OK, "https://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL), + B("ASUS", "Z8PE-D12", OK, "https://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL), B("Attro", "G5G100-P", OK, "http://www.attro.com/motherboard/G5G100-P.htm", NULL), B("Bachmann", "OT200", OK, "http://www.bachmann.info/produkte/bedien-und-beobachtungsgeraete/operator-t…", NULL), B("BCOM", "WinNET100", OK, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."), @@ -1146,7 +1146,7 @@ B("Acer", "Aspire 1520", OK, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspir…", NULL), B("Acer", "Aspire One", BAD, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"), B("ASUS", "A8Jm", OK, NULL, NULL), - B("ASUS", "Eee PC 701 4G", BAD, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."), + B("ASUS", "Eee PC 701 4G", BAD, "https://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."), B("ASUS", "M6Ne", NT, NULL, "Untested board enable."), B("ASUS", "U38N", OK, NULL, NULL), B("Clevo", "P150HM", BAD, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), -- To view, visit https://review.coreboot.org/c/flashrom/+/21874 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I62319bfbf39c73f98ed3f865a11f4fe870befee4 Gerrit-Change-Number: 21874 Gerrit-PatchSet: 4 Gerrit-Owner: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in ...flashrom[master]: libflashrom.h: Remove line breaks in function signatures
by Nico Huber (Code Review) 21 Jun '19

21 Jun '19

Nico Huber has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/30154 ) Change subject: libflashrom.h: Remove line breaks in function signatures ...................................................................... Abandoned followed an undefined rule -- To view, visit https://review.coreboot.org/c/flashrom/+/30154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9d9afb884d92f1edc3a806fa7e2d43808748d0f9 Gerrit-Change-Number: 30154 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: abandon

1 0

Change in ...flashrom[master]: improve termios settings on some OSes
by Nico Huber (Code Review) 20 Jun '19

20 Jun '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/23693 ) Change subject: improve termios settings on some OSes ...................................................................... Patch Set 2: Any terminal experts around? :) -- To view, visit https://review.coreboot.org/c/flashrom/+/23693 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I5da80f541e02c3b8e676e47a45388bfb115b4762 Gerrit-Change-Number: 23693 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Urja Rannikko <urjaman(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Jun 2019 19:36:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

2024

2023

2022

2021

2020

2019

2018

2017

flashrom-gerrit June 2019