June 2019 - flashrom-gerrit - mail.coreboot.org

Change in ...flashrom[master]: flashchips.c: SFDP-capable chip formatting

by Alan Green (Code Review)

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33834 Change subject: flashchips.c: SFDP-capable chip formatting ...................................................................... flashchips.c: SFDP-capable chip formatting To allow automated tools to manipulate flashchips.c, make the definition of SFDP-capable chip more consistent with other definitions. This involves - reordering fields to match both other entries and the definition of struct flashchip. - reformatting comments to make them consistent with other entries. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: I8708a11993822085b3e8d8c80532dfb935d39876 --- M flashchips.c 1 file changed, 10 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/33834/1 diff --git a/flashchips.c b/flashchips.c index 8ea7043..f9ad764 100644 --- a/flashchips.c +++ b/flashchips.c @@ -16578,7 +16578,8 @@ .read = read_memmapped, }, - {/* W29EE011, W29EE012, W29C010M, W29C011A do not support probe_jedec according to the datasheet, but it works for newer(?) steppings. */ + /* W29EE011, W29EE012, W29C010M, W29C011A do not support probe_jedec according to the datasheet, but it works for newer(?) steppings. */ + { .vendor = "Winbond", .name = "W29C010(M)/W29C011A/W29EE011/W29EE012", .bustype = BUS_PARALLEL, @@ -17428,21 +17429,20 @@ .bustype = BUS_SPI, .manufacture_id = GENERIC_MANUF_ID, .model_id = SFDP_DEVICE_ID, - /* We present our own "report this" text hence we do not - * want the default "This flash part has status UNTESTED..." - * text to be printed. */ + .total_size = 0, /* set by probing function */ + .page_size = 0, /* set by probing function */ + .feature_bits = 0, /* set by probing function */ + /* We present our own "report this" text hence we do not */ + /* want the default "This flash part has status UNTESTED..." */ + /* text to be printed. */ .tested = TEST_OK_PREW, .probe = probe_spi_sfdp, + .block_erasers = {}, /* set by probing function */ .unlock = spi_disable_blockprotect, /* is this safe? */ + .write = NULL, /* set by probing function */ .read = spi_chip_read, /* FIXME: some vendor extensions define this */ .voltage = {0}, - /* Everything below will be set by the probing function. */ - .write = NULL, - .total_size = 0, - .page_size = 0, - .feature_bits = 0, - .block_erasers = {}, }, { -- To view, visit https://review.coreboot.org/c/flashrom/+/33834 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I8708a11993822085b3e8d8c80532dfb935d39876 Gerrit-Change-Number: 33834 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

1 year, 3 months

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Change in ...flashrom[master]: flashchips.c: Make comment placement consistent

by Alan Green (Code Review)

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33837 Change subject: flashchips.c: Make comment placement consistent ...................................................................... flashchips.c: Make comment placement consistent For consistency, move a comment about an entry from inside the open brace to outside it. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ie9a745b7e7dc752cfd6fc14ebeb04754179893c6 --- M flashchips.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/33837/1 diff --git a/flashchips.c b/flashchips.c index 8ea7043..f35965f 100644 --- a/flashchips.c +++ b/flashchips.c @@ -16578,7 +16578,8 @@ .read = read_memmapped, }, - {/* W29EE011, W29EE012, W29C010M, W29C011A do not support probe_jedec according to the datasheet, but it works for newer(?) steppings. */ + /* W29EE011, W29EE012, W29C010M, W29C011A do not support probe_jedec according to the datasheet, but it works for newer(?) steppings. */ + { .vendor = "Winbond", .name = "W29C010(M)/W29C011A/W29EE011/W29EE012", .bustype = BUS_PARALLEL, -- To view, visit https://review.coreboot.org/c/flashrom/+/33837 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie9a745b7e7dc752cfd6fc14ebeb04754179893c6 Gerrit-Change-Number: 33837 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

1 year, 3 months

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Change in ...flashrom[master]: flashchips.c: Fix field order

by Alan Green (Code Review)

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33833 Change subject: flashchips.c: Fix field order ...................................................................... flashchips.c: Fix field order For consistency and in order to allow automated tools to work with flashchips.c, put fields in the same order as they are defined in struct flashchip, in flash.h Signed-off-by: Alan Green <avg(a)google.com> Change-Id: I5e0d81cb71b2c50ffeb9bb70267f16e9ac7a263c --- M flashchips.c 1 file changed, 11 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/33/33833/1 diff --git a/flashchips.c b/flashchips.c index e73a4e3..8ea7043 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2539,8 +2539,8 @@ .model_id = ATMEL_AT26F004, .total_size = 512, .page_size = 256, - .tested = {.probe = NT, .read = NT, .erase = NT, .write = BAD }, .feature_bits = FEATURE_WRSR_WREN, + .tested = {.probe = NT, .read = NT, .erase = NT, .write = BAD }, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -2690,10 +2690,10 @@ } }, .printlock = spi_prettyprint_status_register_plain, - .gran = write_gran_1056bytes, .write = spi_write_at45db, .read = spi_read_at45db, .voltage = {2700, 3600}, + .gran = write_gran_1056bytes, }, { @@ -2943,10 +2943,10 @@ } }, .printlock = spi_prettyprint_status_register_at45db, /* Bit 0 is undefined, no lockdown */ - .gran = write_gran_528bytes, .write = spi_write_at45db, .read = spi_read_at45db_e8, /* 3 address and 4 dummy bytes */ .voltage = {2700, 3600}, + .gran = write_gran_528bytes, }, { @@ -2983,8 +2983,8 @@ .block_erase = spi_erase_at45db_chip, } }, - .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ .printlock = spi_prettyprint_status_register_at45db, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ /* granularity will be set by the probing function. */ .write = spi_write_at45db, .read = spi_read_at45db, /* Fast read (0x0B) supported */ @@ -3025,8 +3025,8 @@ .block_erase = spi_erase_at45db_chip, } }, - .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ .printlock = spi_prettyprint_status_register_at45db, /* has a 2nd status register */ + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ /* granularity will be set by the probing function. */ .write = spi_write_at45db, .read = spi_read_at45db, /* Fast read (0x0B) supported */ @@ -3067,8 +3067,8 @@ .block_erase = spi_erase_at45db_chip, } }, - .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ .printlock = spi_prettyprint_status_register_at45db, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ /* granularity will be set by the probing function. */ .write = spi_write_at45db, .read = spi_read_at45db, /* Fast read (0x0B) supported */ @@ -3430,7 +3430,7 @@ .total_size = 64, .page_size = 0, /* unused */ .feature_bits = 0, - .tested = {.probe = OK, .read = OK, .erase = BAD, .write = BAD }, + .tested = { .probe = OK, .read = OK, .erase = BAD, .write = BAD }, .probe = probe_jedec, /* FIXME! */ .probe_timing = TIMING_ZERO, .block_erasers = @@ -3476,11 +3476,11 @@ .vendor = "ENE", .name = "KB9012 (EDI)", .bustype = BUS_SPI, - .spi_cmd_set = SPI_EDI, .total_size = 128, .page_size = 128, .feature_bits = FEATURE_ERASED_ZERO, .tested = TEST_OK_PREW, + .spi_cmd_set = SPI_EDI, .probe = edi_probe_kb9012, .probe_timing = TIMING_ZERO, .block_erasers = @@ -3490,10 +3490,10 @@ .block_erase = edi_chip_block_erase, }, }, - .gran = write_gran_128bytes, .write = edi_chip_write, .read = edi_chip_read, .voltage = {2700, 3600}, + .gran = write_gran_128bytes, }, { @@ -14930,8 +14930,8 @@ .block_erase = erase_block_82802ab, } }, - .write = write_82802ab, .unlock = unlock_regspace2_uniform_64k, + .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, @@ -14963,8 +14963,8 @@ .block_erase = erase_block_82802ab, } }, - .write = write_82802ab, .unlock = unlock_regspace2_uniform_64k, + .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, -- To view, visit https://review.coreboot.org/c/flashrom/+/33833 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I5e0d81cb71b2c50ffeb9bb70267f16e9ac7a263c Gerrit-Change-Number: 33833 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

1 year, 3 months

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Change in ...flashrom[master]: flashchips.c: comma after very .voltage attribute

by Alan Green (Code Review)

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33832 Change subject: flashchips.c: comma after very .voltage attribute ...................................................................... flashchips.c: comma after very .voltage attribute To allow automated tools to manipulate flashchips.c, ensure that every voltage attribute ends with a comma, even if it is the last member in the definition. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ie609d11ab846361f375f7b024d6ca55f83b01682 --- M flashchips.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/32/33832/1 diff --git a/flashchips.c b/flashchips.c index 7f3d2a2..e73a4e3 100644 --- a/flashchips.c +++ b/flashchips.c @@ -525,7 +525,7 @@ }, .write = write_jedec_1, .read = read_memmapped, - .voltage = {3000, 3600} /* 3.0-3.6V for type -70R, others 2.7-3.6V */ + .voltage = {3000, 3600}, /* 3.0-3.6V for type -70R, others 2.7-3.6V */ }, { @@ -557,7 +557,7 @@ }, .write = write_jedec_1, .read = read_memmapped, - .voltage = {3000, 3600} /* 3.0-3.6V for type -70R, others 2.7-3.6V */ + .voltage = {3000, 3600}, /* 3.0-3.6V for type -70R, others 2.7-3.6V */ }, { -- To view, visit https://review.coreboot.org/c/flashrom/+/33832 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie609d11ab846361f375f7b024d6ca55f83b01682 Gerrit-Change-Number: 33832 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

1 year, 3 months

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Change in ...flashrom[master]: flashchips.c: format block_erasers members

by Alan Green (Code Review)

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33831 Change subject: flashchips.c: format block_erasers members ...................................................................... flashchips.c: format block_erasers members To allow automated tools to manipulate flashchips.c, ensure all .block_erasers definitions have consistent formatting: - start with the opening brace on a new line. - ensure end brace indented exactly two tabs. SFDP-capable chip is the one exception to this rule as it has an empty block instead. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ib168bdbbef4cf097109805de15c97ecc1f7915b3 --- M flashchips.c 1 file changed, 106 insertions(+), 56 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/31/33831/1 diff --git a/flashchips.c b/flashchips.c index 1796127..7f3d2a2 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1253,7 +1253,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { { 4 * 1024, 512 } }, .block_erase = spi_block_erase_20, @@ -2510,7 +2511,8 @@ }, /*The AT26DF321 has the same ID as the AT25DF321. */ - /*{ +#if 0 + { .vendor = "Atmel", .name = "AT26DF321", .bustype = BUS_SPI, @@ -2526,7 +2528,8 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, - },*/ + }, +#endif { .vendor = "Atmel", @@ -4991,7 +4994,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 2048} }, .block_erase = spi_block_erase_20, @@ -5028,7 +5032,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 4096} }, .block_erase = spi_block_erase_20, @@ -5063,7 +5068,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 32} }, .block_erase = spi_block_erase_20, @@ -5098,7 +5104,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 64} }, .block_erase = spi_block_erase_20, @@ -5133,7 +5140,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, @@ -5168,7 +5176,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 256} }, .block_erase = spi_block_erase_20, @@ -5203,7 +5212,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 512} }, .block_erase = spi_block_erase_20, @@ -5241,7 +5251,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 1024} }, .block_erase = spi_block_erase_20, @@ -5279,7 +5290,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 2048} }, .block_erase = spi_block_erase_20, @@ -6096,7 +6108,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 16} }, .block_erase = spi_block_erase_20, @@ -6130,7 +6143,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 32} }, .block_erase = spi_block_erase_20, @@ -6480,7 +6494,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 256} }, .block_erase = spi_block_erase_20, @@ -9996,7 +10011,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { { 4 * 1024, 256 } }, .block_erase = spi_block_erase_20, @@ -10125,7 +10141,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256, 512} }, .block_erase = spi_block_erase_db, @@ -10152,7 +10169,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256, 1024} }, .block_erase = spi_block_erase_db, @@ -10179,7 +10197,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256, 2048} }, .block_erase = spi_block_erase_db, @@ -10206,7 +10225,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256, 4096} }, .block_erase = spi_block_erase_db, @@ -10233,7 +10253,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256, 8192} }, .block_erase = spi_block_erase_db, @@ -10436,7 +10457,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 4096 } }, .block_erase = spi_block_erase_20, @@ -10469,7 +10491,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 4096 } }, .block_erase = spi_block_erase_20, @@ -10502,7 +10525,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 8192} }, .block_erase = spi_block_erase_21, @@ -10541,7 +10565,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 16384} }, .block_erase = spi_block_erase_21, @@ -11830,7 +11855,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {2 * 1024, 64} }, .block_erase = spi_block_erase_d7, @@ -11861,7 +11887,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_d7, @@ -11871,8 +11898,8 @@ }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, - } - }, + } + }, .printlock = spi_prettyprint_status_register_plain, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, @@ -11892,7 +11919,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { /* FIXME: Is this correct? { .eraseblocks = { {2 * 1024, 64} }, @@ -11925,7 +11953,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 64} }, .block_erase = spi_block_erase_d7, @@ -11955,7 +11984,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 64} }, .block_erase = spi_block_erase_20, @@ -11992,7 +12022,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_d7, @@ -12003,7 +12034,7 @@ .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } - }, + }, .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, @@ -12023,7 +12054,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, @@ -12040,7 +12072,7 @@ .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } - }, + }, .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect_bp2_srwd, .write = spi_chip_write_256, @@ -12090,7 +12122,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256, 2 * 1024} }, .block_erase = spi_block_erase_db, @@ -12121,7 +12154,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_d7, @@ -12131,8 +12165,8 @@ }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, - } - }, + } + }, .printlock = spi_prettyprint_status_register_bp2_srwd, .unlock = spi_disable_blockprotect, /* #WP pin write-protects SRWP bit. */ .write = spi_chip_write_256, @@ -12152,7 +12186,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 256} }, .block_erase = spi_block_erase_20, @@ -12186,7 +12221,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {8 * 1024, 128} }, .block_erase = spi_block_erase_d7, @@ -12425,7 +12461,8 @@ .tested = TEST_OK_PR, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, @@ -12459,7 +12496,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 256} }, .block_erase = spi_block_erase_20, @@ -12494,7 +12532,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 512} }, .block_erase = spi_block_erase_20, @@ -12529,7 +12568,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 1024} }, .block_erase = spi_block_erase_20, @@ -12564,7 +12604,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {4 * 1024, 2048} }, .block_erase = spi_block_erase_20, @@ -12601,7 +12642,8 @@ /* FIXME: we should distinguish the configuration on probing time like we do for AT45DB chips */ .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { /* This chip supports erasing of 32 so-called "parameter sectors" with * opcode 0x20 which may be configured to be on top or bottom of the address @@ -12644,7 +12686,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256 * 1024, 64} }, .block_erase = spi_block_erase_d8, @@ -12675,7 +12718,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {64 * 1024, 256} }, .block_erase = spi_block_erase_20, @@ -12709,7 +12753,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256 * 1024, 64} }, .block_erase = spi_block_erase_d8, @@ -12739,7 +12784,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { /* This chip supports erasing of the 32 so-called "parameter sectors" with * opcode 0x20. Trying to access an address outside these 4kB blocks does @@ -12781,7 +12827,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256 * 1024, 64} }, .block_erase = spi_block_erase_d8, @@ -12813,7 +12860,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { /* FIXME: This chip supports erasing of the 32 so-called "parameter sectors" with * opcode 0x20. Trying to access an address outside these 4kB blocks does have no @@ -12861,7 +12909,8 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { .eraseblocks = { {256 * 1024, 64} }, .block_erase = spi_block_erase_d8, @@ -12893,7 +12942,8 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .block_erasers = { + .block_erasers = + { { /* This chip supports erasing of the 32 so-called "parameter sectors" with * opcode 0x20. Trying to access an address outside these 4kB blocks does -- To view, visit https://review.coreboot.org/c/flashrom/+/33831 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib168bdbbef4cf097109805de15c97ecc1f7915b3 Gerrit-Change-Number: 33831 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

1 year, 3 months

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Change in ...flashrom[master]: flashchips.c: end of line comment consistency

by Alan Green (Code Review)

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33830 Change subject: flashchips.c: end of line comment consistency ...................................................................... flashchips.c: end of line comment consistency To allow automated tools to manipulate flashchips.c, make end of line comment formatting more consistent. Specifically this change moves the comma from end of line to immediately after the field value, before the commment. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ic4f97454766eff640b26a6c6eca29dc56c34c444 --- M flashchips.c 1 file changed, 26 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/30/33830/1 diff --git a/flashchips.c b/flashchips.c index 88648ad..1796127 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2560,7 +2560,7 @@ } }, .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .write = NULL /* Incompatible Page write */, + .write = NULL, /* Incompatible Page write */ .read = spi_chip_read, .voltage = {2700, 3600}, }, @@ -2667,8 +2667,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45CS1282, - .total_size = 16896 /* No power of two sizes */, - .page_size = 1056 /* No power of two sizes */, + .total_size = 16896, /* No power of two sizes */ + .page_size = 1056, /* No power of two sizes */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77 (4 dummy bytes); write 0x9A (via buffer) */ .feature_bits = FEATURE_OTP, @@ -2699,8 +2699,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB011D, - .total_size = 128 /* or 132, determined from status register */, - .page_size = 256 /* or 264, determined from status register */, + .total_size = 128, /* or 132, determined from status register */ + .page_size = 256, /* or 264, determined from status register */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, @@ -2727,8 +2727,8 @@ .block_erase = spi_erase_at45db_chip, } }, - .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ .printlock = spi_prettyprint_status_register_at45db, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ /* granularity will be set by the probing function. */ .write = spi_write_at45db, .read = spi_read_at45db, /* Fast read (0x0B) supported */ @@ -2741,8 +2741,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB021D, - .total_size = 256 /* or 264, determined from status register */, - .page_size = 256 /* or 264, determined from status register */, + .total_size = 256, /* or 264, determined from status register */ + .page_size = 256, /* or 264, determined from status register */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, @@ -2769,8 +2769,8 @@ .block_erase = spi_erase_at45db_chip, } }, - .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ .printlock = spi_prettyprint_status_register_at45db, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ /* granularity will be set by the probing function. */ .write = spi_write_at45db, .read = spi_read_at45db, /* Fast read (0x0B) supported */ @@ -2783,8 +2783,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB041D, - .total_size = 512 /* or 528, determined from status register */, - .page_size = 256 /* or 264, determined from status register */, + .total_size = 512, /* or 528, determined from status register */ + .page_size = 256, /* or 264, determined from status register */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, @@ -2811,8 +2811,8 @@ .block_erase = spi_erase_at45db_chip, } }, - .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ .printlock = spi_prettyprint_status_register_at45db, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ /* granularity will be set by the probing function. */ .write = spi_write_at45db, .read = spi_read_at45db, /* Fast read (0x0B) supported */ @@ -2825,8 +2825,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB081D, - .total_size = 1024 /* or 1056, determined from status register */, - .page_size = 256 /* or 264, determined from status register */, + .total_size = 1024, /* or 1056, determined from status register */ + .page_size = 256, /* or 264, determined from status register */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, @@ -2853,8 +2853,8 @@ .block_erase = spi_erase_at45db_chip, } }, - .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ .printlock = spi_prettyprint_status_register_at45db, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ /* granularity will be set by the probing function. */ .write = spi_write_at45db, .read = spi_read_at45db, /* Fast read (0x0B) supported */ @@ -2867,8 +2867,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB161D, - .total_size = 2048 /* or 2112, determined from status register */, - .page_size = 512 /* or 528, determined from status register */, + .total_size = 2048, /* or 2112, determined from status register */ + .page_size = 512, /* or 528, determined from status register */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, @@ -2895,8 +2895,8 @@ .block_erase = spi_erase_at45db_chip, } }, - .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ .printlock = spi_prettyprint_status_register_at45db, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ /* granularity will be set by the probing function. */ .write = spi_write_at45db, .read = spi_read_at45db, /* Fast read (0x0B) supported */ @@ -2909,8 +2909,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB321C, - .total_size = 4224 /* No power of two sizes */, - .page_size = 528 /* No power of two sizes */, + .total_size = 4224, /* No power of two sizes */ + .page_size = 528, /* No power of two sizes */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77 (4 dummy bytes); write 0x9A (via buffer) */ .feature_bits = FEATURE_OTP, @@ -2952,8 +2952,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB321D, - .total_size = 4096 /* or 4224, determined from status register */, - .page_size = 512 /* or 528, determined from status register */, + .total_size = 4096, /* or 4224, determined from status register */ + .page_size = 512, /* or 528, determined from status register */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, @@ -2994,8 +2994,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB321C, - .total_size = 4096 /* or 4224, determined from status register */, - .page_size = 512 /* or 528, determined from status register */, + .total_size = 4096, /* or 4224, determined from status register */ + .page_size = 512, /* or 528, determined from status register */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, @@ -3036,8 +3036,8 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB642D, - .total_size = 8192 /* or 8448, determined from status register */, - .page_size = 1024 /* or 1056, determined from status register */, + .total_size = 8192, /* or 8448, determined from status register */ + .page_size = 1024, /* or 1056, determined from status register */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, -- To view, visit https://review.coreboot.org/c/flashrom/+/33830 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic4f97454766eff640b26a6c6eca29dc56c34c444 Gerrit-Change-Number: 33830 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

1 year, 3 months

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Change in ...flashrom[master]: flashchips.c: ATMEL->Atmel for consistency

by Alan Green (Code Review)

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33829 Change subject: flashchips.c: ATMEL->Atmel for consistency ...................................................................... flashchips.c: ATMEL->Atmel for consistency Replace the single instance where a vendor name was spelled inconsistently. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: I6478bc29f640f789f3b35e7b4816133f4a0d292e --- M flashchips.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/33829/1 diff --git a/flashchips.c b/flashchips.c index 644479e..88648ad 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2325,7 +2325,7 @@ }, { - .vendor = "ATMEL", + .vendor = "Atmel", .name = "AT25SL128A", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, -- To view, visit https://review.coreboot.org/c/flashrom/+/33829 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6478bc29f640f789f3b35e7b4816133f4a0d292e Gerrit-Change-Number: 33829 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

1 year, 3 months

4
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Change in ...flashrom[master]: flashchips.c: Whitespace consistency

by Alan Green (Code Review)

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33828 Change subject: flashchips.c: Whitespace consistency ...................................................................... flashchips.c: Whitespace consistency For consistency, and to make the file amenable to manipulation by tools, use only tabs when indenting. Some previous changes had introduced spaces for indenting. Also ensure that every table entry is separated by a single blank line. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ib2193798cc52641d6c443f8851903c749b31cb74 --- M flashchips.c 1 file changed, 101 insertions(+), 98 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/28/33828/1 diff --git a/flashchips.c b/flashchips.c index d85ea74..644479e 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1827,7 +1827,7 @@ .vendor = "Atmel", .name = "AT25DL081", .bustype = BUS_SPI, - .manufacture_id = ATMEL_ID, + .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT25DF081, .total_size = 1024, .page_size = 256, @@ -1866,7 +1866,7 @@ .vendor = "Atmel", .name = "AT25DL161", .bustype = BUS_SPI, - .manufacture_id = ATMEL_ID, + .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT25DL161, .total_size = 2048, .page_size = 256, @@ -7428,7 +7428,7 @@ .vendor = "ISSI", .name = "IS25WP032", .bustype = BUS_SPI, - .manufacture_id = ISSI_ID_SPI, + .manufacture_id = ISSI_ID_SPI, .model_id = ISSI_IS25WP032, .total_size = 4096, .page_size = 256, @@ -7470,7 +7470,7 @@ .vendor = "ISSI", .name = "IS25WP064", .bustype = BUS_SPI, - .manufacture_id = ISSI_ID_SPI, + .manufacture_id = ISSI_ID_SPI, .model_id = ISSI_IS25WP064, .total_size = 8192, .page_size = 256, @@ -10392,7 +10392,7 @@ .vendor = "Micron/Numonyx/ST", .name = "N25Q064..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, - .manufacture_id = ST_ID, + .manufacture_id = ST_ID, .model_id = ST_N25Q064__3E, .total_size = 8192, .page_size = 256, @@ -10426,7 +10426,7 @@ .vendor = "Micron/Numonyx/ST", .name = "N25Q128..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, - .manufacture_id = ST_ID, + .manufacture_id = ST_ID, .model_id = ST_N25Q128__1E, .total_size = 16384, .page_size = 256, @@ -10459,7 +10459,7 @@ .vendor = "Micron/Numonyx/ST", .name = "N25Q128..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, - .manufacture_id = ST_ID, + .manufacture_id = ST_ID, .model_id = ST_N25Q128__3E, .total_size = 16384, .page_size = 256, @@ -10492,7 +10492,7 @@ .vendor = "Micron", .name = "N25Q256..3E/MT25QL256", /* ..3E/L = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, - .manufacture_id = ST_ID, + .manufacture_id = ST_ID, .model_id = ST_N25Q256__3E, .total_size = 32768, .page_size = 256, @@ -10531,7 +10531,7 @@ .vendor = "Micron", .name = "N25Q512..3E/MT25QL512", /* ..3E/L = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, - .manufacture_id = ST_ID, + .manufacture_id = ST_ID, .model_id = ST_N25Q512__3E, .total_size = 65536, .page_size = 256, @@ -10988,6 +10988,7 @@ .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ .voltage = {2700, 3600}, }, + { .vendor = "PMC", .name = "Pm25LD512(C)", @@ -11677,7 +11678,7 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .block_erasers = + .block_erasers = { { .eraseblocks = { {4 * 1024, 64} }, @@ -11707,7 +11708,7 @@ .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .block_erasers = + .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, @@ -13568,6 +13569,7 @@ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, }, + { .vendor = "SST", .name = "SST26VF032B(A)", @@ -13606,7 +13608,6 @@ .voltage = {2700, 3600}, }, - { .vendor = "SST", .name = "SST26VF064B(A)", @@ -14740,6 +14741,7 @@ .read = read_memmapped, .voltage = {4500, 5500}, }, + { /* FIXME: this has WORD/BYTE sequences; 2AA for word, 555 for byte */ .vendor = "ST", @@ -14831,7 +14833,7 @@ .vendor = "ST", .name = "M29W512B", .bustype = BUS_PARALLEL, - .manufacture_id = ST_ID, + .manufacture_id = ST_ID, .model_id = ST_M29W512B, .total_size = 64, .page_size = 64 * 1024, @@ -16393,18 +16395,18 @@ }, { - .vendor = "Winbond", - .name = "W25P80", - .bustype = BUS_SPI, - .manufacture_id = WINBOND_NEX_ID, - .model_id = WINBOND_NEX_W25P80, - .total_size = 1024, - .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, - .block_erasers = + .vendor = "Winbond", + .name = "W25P80", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25P80, + .total_size = 1024, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { { .eraseblocks = { {64 * 1024, 16} }, @@ -16414,26 +16416,26 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, - .read = spi_chip_read, /* Fast read (0x0B) supported */ - .voltage = {2700, 3600}, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, }, { - .vendor = "Winbond", - .name = "W25P16", - .bustype = BUS_SPI, - .manufacture_id = WINBOND_NEX_ID, - .model_id = WINBOND_NEX_W25P16, - .total_size = 2048, - .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, - .block_erasers = + .vendor = "Winbond", + .name = "W25P16", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25P16, + .total_size = 2048, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { { .eraseblocks = { {64 * 1024, 32} }, @@ -16443,26 +16445,26 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, - .read = spi_chip_read, /* Fast read (0x0B) supported */ - .voltage = {2700, 3600}, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, }, { - .vendor = "Winbond", - .name = "W25P32", - .bustype = BUS_SPI, - .manufacture_id = WINBOND_NEX_ID, - .model_id = WINBOND_NEX_W25P32, - .total_size = 4096, - .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, - .block_erasers = + .vendor = "Winbond", + .name = "W25P32", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25P32, + .total_size = 4096, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { { .eraseblocks = { {64 * 1024, 64} }, @@ -16472,12 +16474,13 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, - .read = spi_chip_read, /* Fast read (0x0B) supported */ - .voltage = {2700, 3600}, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, }, + { .vendor = "Winbond", .name = "W29C512A/W29EE512", @@ -17294,18 +17297,18 @@ }, { - .vendor = "Zetta Device", - .name = "ZD25D20", - .bustype = BUS_SPI, - .manufacture_id = ZETTADEVICE_ID, - .model_id = ZETTADEVICE_ZD25D20, - .total_size = 256, - .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, - .block_erasers = + .vendor = "Zetta Device", + .name = "ZD25D20", + .bustype = BUS_SPI, + .manufacture_id = ZETTADEVICE_ID, + .model_id = ZETTADEVICE_ZD25D20, + .total_size = 256, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { { .eraseblocks = { {4 * 1024, 64} }, @@ -17324,26 +17327,26 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, - .read = spi_chip_read, - .voltage = {2700, 3600}, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, }, { - .vendor = "Zetta Device", - .name = "ZD25D40", - .bustype = BUS_SPI, - .manufacture_id = ZETTADEVICE_ID, - .model_id = ZETTADEVICE_ZD25D40, - .total_size = 512, - .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, - .probe_timing = TIMING_ZERO, - .block_erasers = + .vendor = "Zetta Device", + .name = "ZD25D40", + .bustype = BUS_SPI, + .manufacture_id = ZETTADEVICE_ID, + .model_id = ZETTADEVICE_ZD25D40, + .total_size = 512, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, @@ -17362,11 +17365,11 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, - .read = spi_chip_read, - .voltage = {2700, 3600}, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, }, { -- To view, visit https://review.coreboot.org/c/flashrom/+/33828 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib2193798cc52641d6c443f8851903c749b31cb74 Gerrit-Change-Number: 33828 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: flashchips.c: sort entries

by Alan Green (Code Review)

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33835 Change subject: flashchips.c: sort entries ...................................................................... flashchips.c: sort entries For self-consistency, and to allow tools to assist with merging the chromium fork of flashrom, sort the entries of flashchips.c. The file is already largely sorted, though deviations have crept in over time. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ie29e01b2567bc7e95c133ba687d4d13e05380291 --- M flashchips.c 1 file changed, 5,468 insertions(+), 5,468 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/35/33835/1 -- To view, visit https://review.coreboot.org/c/flashrom/+/33835 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie29e01b2567bc7e95c133ba687d4d13e05380291 Gerrit-Change-Number: 33835 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: Add support for MX25U25635F.

by David Tomaschik (Code Review)

David Tomaschik has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33639 Change subject: Add support for MX25U25635F. ...................................................................... Add support for MX25U25635F. This is a 256Kb part with support for JEDEC 4 byte addressing modes. Tested successfully for probe/read. Change-Id: I5bdcd32acd1942edf65e50bce0f81c836095ee8c Signed-off-by: David Tomaschik <davidtomaschik(a)google.com> --- M flashchips.c 1 file changed, 40 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/39/33639/1 diff --git a/flashchips.c b/flashchips.c index d85ea74..09cf8d1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8868,6 +8868,46 @@ { .vendor = "Macronix", + .name = "MX25U25635F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25U25635F, + .total_size = 32768, + .page_size = 256, + /* OTP: 512B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_4BA, + .tested = TEST_OK_PR, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: security register */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 2000}, + }, + + { + .vendor = "Macronix", .name = "MX25U51245G", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, -- To view, visit https://review.coreboot.org/c/flashrom/+/33639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I5bdcd32acd1942edf65e50bce0f81c836095ee8c Gerrit-Change-Number: 33639 Gerrit-PatchSet: 1 Gerrit-Owner: David Tomaschik <davidtomaschik(a)google.com> Gerrit-MessageType: newchange

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flashrom-gerrit June 2019