December 2019 - flashrom-gerrit

Change in flashrom[master]: mysteries_intel: Add a section about SMM_BWP
by David Hendricks (Code Review) 14 Dec '19

14 Dec '19

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/36986 ) Change subject: mysteries_intel: Add a section about SMM_BWP ...................................................................... mysteries_intel: Add a section about SMM_BWP Something to point users to when SMM_BWP might be causing problems. Change-Id: I394c033e8d4ff96433162f86aefb428d8acf6349 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M Documentation/mysteries_intel.txt 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/86/36986/1 diff --git a/Documentation/mysteries_intel.txt b/Documentation/mysteries_intel.txt index 10cb37d..d6ceb6a 100644 --- a/Documentation/mysteries_intel.txt +++ b/Documentation/mysteries_intel.txt @@ -5,6 +5,25 @@ A0h), so we have no clue if or where it is on ICH8. Out current policy is to not touch it at all and assume/hope it is 0. += SMM BIOS write protection = +Sometimes a hardware vendor will enable "SMM BIOS Write Protect" (SMM_BWP). +The bits that control this are in the BIOS_CNTL register in the LPC interface. + +When enabled, the SPI flash can only be written when the system is operating in +in System Management Mode (SMM). In other words, only code that was installed by +the BIOS can write to the flash chip. Reads are still possible with code that +runs outside of SMM, such as flashrom. + +Flashrom will attempt to detect this and print a message such as the following: +"Warning: BIOS region SMM protection is enabled!" + +Many vendor-supplied firmware update utilities do not actually write to the ROM; +instead they transfer data to/from memory which is read/written by a routine +running in SMM and is responsible for writing to the firmware ROM. This causes +severe system performance degradataion since all processors must be in SMM +context (ring -2) instead of OS context (ring 0) while the firmware ROM is being +written. + = Accesses beyond region bounds in descriptor mode = Intel's flash image tool will always expand the last region so that it covers the whole flash chip, but some boards ship with a different configuration. -- To view, visit https://review.coreboot.org/c/flashrom/+/36986 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I394c033e8d4ff96433162f86aefb428d8acf6349 Gerrit-Change-Number: 36986 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashrom: Add support for ARC platform
by David Hendricks (Code Review) 14 Dec '19

14 Dec '19

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/35831 ) Change subject: flashrom: Add support for ARC platform ...................................................................... flashrom: Add support for ARC platform Change-Id: I88cbe74b716d5fab16133fbf2ce9c35b74c25f32 Signed-off-by: Rosen Penev <rosenp(a)gmail.com> --- M Makefile M hwaccess.h M platform.h 3 files changed, 16 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/31/35831/1 diff --git a/Makefile b/Makefile index 7a21d12..cc9c444 100644 --- a/Makefile +++ b/Makefile @@ -453,7 +453,7 @@ # Disable all drivers needing raw access (memory, PCI, port I/O) on # architectures with unknown raw access properties. # Right now those architectures are alpha hppa m68k sh s390 -ifneq ($(ARCH),$(filter $(ARCH),x86 mips ppc arm sparc)) +ifneq ($(ARCH),$(filter $(ARCH),x86 mips ppc arm sparc arc)) ifeq ($(CONFIG_RAYER_SPI), yes) UNSUPPORTED_FEATURES += CONFIG_RAYER_SPI=yes else diff --git a/hwaccess.h b/hwaccess.h index af7054b..5602c15 100644 --- a/hwaccess.h +++ b/hwaccess.h @@ -291,6 +291,10 @@ /* Non memory mapped I/O is not supported on ARM. */ +#elif IS_ARC + +/* Non memory mapped I/O is not supported on ARC. */ + #else #error Unknown architecture, please check if it supports PCI port IO. diff --git a/platform.h b/platform.h index d290afc..195ba56 100644 --- a/platform.h +++ b/platform.h @@ -74,9 +74,12 @@ #elif defined(__s390__) || defined(__s390x__) || defined(__zarch__) #define __FLASHROM_ARCH__ "s390" #define IS_S390 1 +#elif defined(__arc__) + #define __FLASHROM_ARCH__ "arc" + #define IS_ARC 1 #endif -#if !(IS_X86 || IS_MIPS || IS_PPC || IS_ARM || IS_SPARC || IS_ALPHA || IS_HPPA || IS_M68K || IS_RISCV || IS_SH || IS_S390) +#if !(IS_X86 || IS_MIPS || IS_PPC || IS_ARM || IS_SPARC || IS_ALPHA || IS_HPPA || IS_M68K || IS_RISCV || IS_SH || IS_S390 || IS_ARC) #error Unknown architecture #endif @@ -123,6 +126,13 @@ /* SPARC is big endian in general (but allows to access data in little endian too). */ #define __FLASHROM_BIG_ENDIAN__ 1 +#elif IS_ARC +#if defined(__arceb__) +#define __FLASHROM_BIG_ENDIAN__ 1 +#else +#define __FLASHROM_LITTLE_ENDIAN__ 1 +#endif + #endif /* IS_? */ #if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) -- To view, visit https://review.coreboot.org/c/flashrom/+/35831 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I88cbe74b716d5fab16133fbf2ce9c35b74c25f32 Gerrit-Change-Number: 35831 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: Add AT25SF321
by David Hendricks (Code Review) 14 Dec '19

14 Dec '19

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/36904 ) Change subject: flashchips: Add AT25SF321 ...................................................................... flashchips: Add AT25SF321 This commit adds support for the Adesto AT25SF321 SPI flash chip. Probe and read operations have been tested via FT2232H interface, but writes have not been verified. Datasheet is available at the following URL: https://www.adestotech.com/wp-content/uploads/DS-AT25SF321_047.pdf Change-Id: I7410815e063ffe154a97d7ea5881c8eb82025f56 Signed-off-by: Peter Adkins <pete(a)kernelpicnic.net> --- M flashchips.c M flashchips.h 2 files changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/04/36904/1 diff --git a/flashchips.c b/flashchips.c index 4324c11..65dda0e 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2331,6 +2331,44 @@ { .vendor = "Atmel", + .name = "AT25SF321", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25SF321, + .total_size = 4096, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PR, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4096 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4096 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2500, 3600}, + }, + + { + .vendor = "Atmel", .name = "AT25SL128A", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, diff --git a/flashchips.h b/flashchips.h index 2c2da6c..f02958c 100644 --- a/flashchips.h +++ b/flashchips.h @@ -150,6 +150,7 @@ #define ATMEL_AT25SF041 0x8401 #define ATMEL_AT25SF081 0x8501 #define ATMEL_AT25SF161 0x8601 +#define ATMEL_AT25SF321 0x8701 #define ATMEL_AT25SL128A 0x4218 #define ATMEL_AT26DF041 0x4400 #define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */ -- To view, visit https://review.coreboot.org/c/flashrom/+/36904 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7410815e063ffe154a97d7ea5881c8eb82025f56 Gerrit-Change-Number: 36904 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: nicintel_eeprom: Reduce usage of is_i210()
by Nico Huber (Code Review) 10 Dec '19

10 Dec '19

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33637 Change subject: nicintel_eeprom: Reduce usage of is_i210() ...................................................................... nicintel_eeprom: Reduce usage of is_i210() Don't entagle the code paths for the two NIC classes if it's not necessary. Only compile tested. Change-Id: I59164ccf54afbbd64a0598282d13e80ff7fd6fa4 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M nicintel_eeprom.c 1 file changed, 52 insertions(+), 46 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/33637/1 diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c index 4e01fcb..4d45f79 100644 --- a/nicintel_eeprom.c +++ b/nicintel_eeprom.c @@ -145,14 +145,6 @@ return 1; } -static int nicintel_ee_probe(struct flashctx *flash) -{ - if (is_i210(nicintel_pci->device_id)) - return nicintel_ee_probe_i210(flash); - - return nicintel_ee_probe_82580(flash); -} - #define MAX_ATTEMPTS 10000000 static int nicintel_ee_read_word(unsigned int addr, uint16_t *data) { @@ -281,6 +273,11 @@ return 0; } +static int nicintel_ee_erase_i210(struct flashctx *flash, unsigned int addr, unsigned int len) +{ + return nicintel_ee_write_i210(flash, NULL, addr, len); +} + static int nicintel_ee_bitset(int reg, int bit, bool val) { uint32_t tmp; @@ -392,24 +389,24 @@ nicintel_ee_bitset(EEC, EE_REQ, 0); /* Give up direct access. */ return ret; } -static int nicintel_ee_write(struct flashctx *flash, const uint8_t *buf, unsigned int addr, unsigned int len) -{ - if (is_i210(nicintel_pci->device_id)) - return nicintel_ee_write_i210(flash, buf, addr, len); - return nicintel_ee_write_82580(flash, buf, addr, len); +static int nicintel_ee_erase_82580(struct flashctx *flash, unsigned int addr, unsigned int len) +{ + return nicintel_ee_write_82580(flash, NULL, addr, len); } -static int nicintel_ee_erase(struct flashctx *flash, unsigned int addr, unsigned int len) -{ - return nicintel_ee_write(flash, NULL, addr, len); -} - -static const struct opaque_master opaque_master_nicintel_ee = { - .probe = nicintel_ee_probe, +static const struct opaque_master opaque_master_nicintel_ee_82580 = { + .probe = nicintel_ee_probe_82580, .read = nicintel_ee_read, - .write = nicintel_ee_write, - .erase = nicintel_ee_erase, + .write = nicintel_ee_write_82580, + .erase = nicintel_ee_erase_82580, +}; + +static const struct opaque_master opaque_master_nicintel_ee_i210 = { + .probe = nicintel_ee_probe_i210, + .read = nicintel_ee_read, + .write = nicintel_ee_write_i210, + .erase = nicintel_ee_erase_i210, }; static int nicintel_ee_shutdown_i210(void *arg) @@ -432,7 +429,7 @@ return -1; } -static int nicintel_ee_shutdown(void *eecp) +static int nicintel_ee_shutdown_82580(void *eecp) { uint32_t old_eec = *(uint32_t *)eecp; /* Request bitbanging and unselect the chip first to be safe. */ @@ -463,35 +460,44 @@ if (!io_base_addr) return 1; - nicintel_eebar = rphysmap("Intel Gigabit NIC w/ SPI EEPROM", - io_base_addr + (is_i210(dev->device_id) ? 0x12000 : 0), MEMMAP_SIZE); - if (!nicintel_eebar) - return 1; - - nicintel_pci = dev; - if ((dev->device_id != UNPROG_DEVICE) && ! is_i210(dev->device_id)) - { - uint32_t eec = pci_mmio_readl(nicintel_eebar + EEC); - - /* C.f. 3.3.1.5 for the detection mechanism (maybe? contradicting the EE_PRES definition), - * and 3.3.1.7 for possible recovery. */ - if (!(eec & BIT(EE_PRES))) { - msg_perr("Controller reports no EEPROM is present.\n"); + if (!is_i210(dev->device_id)) { + nicintel_eebar = rphysmap("Intel Gigabit NIC w/ SPI EEPROM", io_base_addr, MEMMAP_SIZE); + if (!nicintel_eebar) return 1; + + nicintel_pci = dev; + if ((dev->device_id != UNPROG_DEVICE)) { + uint32_t eec = pci_mmio_readl(nicintel_eebar + EEC); + + /* C.f. 3.3.1.5 for the detection mechanism (maybe? contradicting + the EE_PRES definition), + and 3.3.1.7 for possible recovery. */ + if (!(eec & BIT(EE_PRES))) { + msg_perr("Controller reports no EEPROM is present.\n"); + return 1; + } + + uint32_t *eecp = malloc(sizeof(uint32_t)); + if (eecp == NULL) + return 1; + *eecp = eec; + + if (register_shutdown(nicintel_ee_shutdown_82580, eecp)) + return 1; } - uint32_t *eecp = malloc(sizeof(uint32_t)); - if (eecp == NULL) + return register_opaque_master(&opaque_master_nicintel_ee_82580); + } else { + nicintel_eebar = rphysmap("Intel i210 NIC w/ emulated EEPROM", + io_base_addr + 0x12000, MEMMAP_SIZE); + if (!nicintel_eebar) return 1; - *eecp = eec; - if (register_shutdown(nicintel_ee_shutdown, eecp)) - return 1; - } - - if (is_i210(dev->device_id)) if (register_shutdown(nicintel_ee_shutdown_i210, NULL)) return 1; - return register_opaque_master(&opaque_master_nicintel_ee); + return register_opaque_master(&opaque_master_nicintel_ee_i210); + } + + return 1; } -- To view, visit https://review.coreboot.org/c/flashrom/+/33637 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I59164ccf54afbbd64a0598282d13e80ff7fd6fa4 Gerrit-Change-Number: 33637 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: manibuilder: Add list of tags used for the 1.0.x branch
by David Hendricks (Code Review) 09 Dec '19

09 Dec '19

David Hendricks has uploaded a new patch set (#5) to the change originally created by Nico Huber. ( https://review.coreboot.org/c/flashrom/+/30418 ) Change subject: manibuilder: Add list of tags used for the 1.0.x branch ...................................................................... manibuilder: Add list of tags used for the 1.0.x branch Also add two new make targets `1.0.x` and `show-1.0.x`. Change-Id: I2bc2e79729016a8f9908f316b051deeb73dc096f Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M util/manibuilder/Makefile.targets 1 file changed, 55 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/18/30418/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/30418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2bc2e79729016a8f9908f316b051deeb73dc096f Gerrit-Change-Number: 30418 Gerrit-PatchSet: 5 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: Add Manibuilder
by David Hendricks (Code Review) 09 Dec '19

09 Dec '19

David Hendricks has uploaded a new patch set (#5) to the change originally created by Nico Huber. ( https://review.coreboot.org/c/flashrom/+/23005 ) Change subject: Add Manibuilder ...................................................................... Add Manibuilder Add a set of Dockerfiles for build testing. If you have an x86 machine and ~20GiB free disk space, run `make register` and `make -jxx` in util/manibuilder and go eat some pizza. The former runs a privileged docker container to set binfmt_misc up for qemu (read the code, don't trust it). Change-Id: I60863a5c7d70dde71486fccb66cb59b30ba4d982 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- A util/manibuilder/Dockerfile.alpine A util/manibuilder/Dockerfile.anita A util/manibuilder/Dockerfile.centos A util/manibuilder/Dockerfile.debian-debootstrap A util/manibuilder/Dockerfile.djgpp A util/manibuilder/Dockerfile.fedora A util/manibuilder/Dockerfile.qemu-user-static A util/manibuilder/Dockerfile.ubuntu-debootstrap A util/manibuilder/Makefile A util/manibuilder/Makefile.targets A util/manibuilder/README.md A util/manibuilder/anita-wrapper.sh A util/manibuilder/mani-wrapper.sh 13 files changed, 470 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/23005/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/23005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I60863a5c7d70dde71486fccb66cb59b30ba4d982 Gerrit-Change-Number: 23005 Gerrit-PatchSet: 5 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: Add Manibuilder
by David Hendricks (Code Review) 08 Dec '19

08 Dec '19

David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/23005 ) Change subject: Add Manibuilder ...................................................................... Patch Set 4: > Patch Set 3: Code-Review+2 > > > Patch Set 3: Code-Review+2 > > > > All-in-all this seems like a great step forward for build testing. I looked over the patch chain and it seems OK (nice Make-fu), but unfortunately it failed to run and I couldn't figure out why in the short amount of time I had. > > > > Some day I'd like to re-write most of the Makefile logic in Go or shell and hopefully make it easier to understand and modify, but that shouldn't block this patch. > > I was able to run this on poweredgy (my Dell Poweredge R900 space heater) some time ago. I should clarify - I was able to run it, but there were a couple errors such as: make[1]: *** [Makefile:39: fedora:30-aarch64-build] Error 1 I'm just not sure how to determine what's going on and how to fix it. It doesn't seem to be the fault of manibuilder per se, so I think we should get this in, use it, and improve it and add more documentation as we go. -- To view, visit https://review.coreboot.org/c/flashrom/+/23005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I60863a5c7d70dde71486fccb66cb59b30ba4d982 Gerrit-Change-Number: 23005 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 08 Dec 2019 22:47:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: Revert "print.c: Dedup 'test_state_to_text()' logic"
by Nico Huber (Code Review) 06 Dec '19

06 Dec '19

Hello Edward O'Callaghan, David Hendricks, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/36909 to review the following change. Change subject: Revert "print.c: Dedup 'test_state_to_text()' logic" ...................................................................... Revert "print.c: Dedup 'test_state_to_text()' logic" This reverts commit 61e16e549a52194ac80ef40504f2dc661d1ff99c. Obviously throws alignment in the table off and changes output class from `general` to `programmer` for no visible reason. Change-Id: I864044b9fac6af9cf6a89c053eccdcb36f17c7bd Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M print.c 1 file changed, 8 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/09/36909/1 diff --git a/print.c b/print.c index 596fc53..6a7ff5d 100644 --- a/print.c +++ b/print.c @@ -401,7 +401,14 @@ for (i = 0; i < maxboardlen - strlen(b->name); i++) msg_ginfo(" "); - msg_pinfo(test_state_to_text(b->working)); + switch (b->working) { + case OK: msg_ginfo("OK "); break; + case NT: msg_ginfo("NT "); break; + case DEP: msg_ginfo("DEP "); break; + case NA: msg_ginfo("N/A "); break; + case BAD: + default: msg_ginfo("BAD "); break; + } for (e = board_matches; e->vendor_name != NULL; e++) { if (strcmp(e->vendor_name, b->vendor) -- To view, visit https://review.coreboot.org/c/flashrom/+/36909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I864044b9fac6af9cf6a89c053eccdcb36f17c7bd Gerrit-Change-Number: 36909 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: print.c: Fix pp str format alignment in print_supported_boards_helper()
by Edward O'Callaghan (Code Review) 02 Dec '19

02 Dec '19

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37372 ) Change subject: print.c: Fix pp str format alignment in print_supported_boards_helper() ...................................................................... print.c: Fix pp str format alignment in print_supported_boards_helper() Fix a print format regression introduced in commit 61e16e549a52194ac80ef40504f2dc661d1ff99c. Change-Id: Ic25512bc6f31e62dfc77e32a4c71519bdde01598 Signed-off-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M print.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/72/37372/1 diff --git a/print.c b/print.c index 596fc53..aeb56cb 100644 --- a/print.c +++ b/print.c @@ -401,7 +401,7 @@ for (i = 0; i < maxboardlen - strlen(b->name); i++) msg_ginfo(" "); - msg_pinfo(test_state_to_text(b->working)); + msg_pinfo("%s\t", test_state_to_text(b->working)); for (e = board_matches; e->vendor_name != NULL; e++) { if (strcmp(e->vendor_name, b->vendor) -- To view, visit https://review.coreboot.org/c/flashrom/+/37372 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic25512bc6f31e62dfc77e32a4c71519bdde01598 Gerrit-Change-Number: 37372 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: Implement IFWI layout reading
by Nico Huber (Code Review) 02 Dec '19

02 Dec '19

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/31018 Change subject: Implement IFWI layout reading ...................................................................... Implement IFWI layout reading Alas, yet another conflicting command-line option before we overhaul the internal layout handling. Change-Id: I1f1ef4c5d109b81dec7a11bca04ba89204fa84eb Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M Makefile M cli_classic.c A ifwi.c M libflashrom.c M libflashrom.h 5 files changed, 463 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/18/31018/1 diff --git a/Makefile b/Makefile index 1e7db3e..4a1094d 100644 --- a/Makefile +++ b/Makefile @@ -536,7 +536,7 @@ ############################################################################### # Library code. -LIB_OBJS = libflashrom.o layout.o flashrom.o udelay.o programmer.o helpers.o ich_descriptors.o fmap.o +LIB_OBJS = libflashrom.o layout.o flashrom.o udelay.o programmer.o helpers.o ich_descriptors.o fmap.o ifwi.o ############################################################################### # Frontend related stuff. diff --git a/cli_classic.c b/cli_classic.c index 536ef24..f764a6d 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -57,6 +57,7 @@ " --fmap read ROM layout from fmap embedded in ROM\n" " --fmap-file <fmapfile> read ROM layout from fmap in <fmapfile>\n" " --ifd read layout from an Intel Firmware Descriptor\n" + " --ifwi read layout from an Integrated Firmware Image\n" " -i | --image <name> only flash image <name> from flash layout\n" " -o | --output <logfile> log output to <logfile>\n" " --flash-contents <ref-file> assume flash contents to be <ref-file>\n" @@ -100,7 +101,7 @@ struct flashctx *fill_flash; const char *name; int namelen, opt, i, j; - int startchip = -1, chipcount = 0, option_index = 0, force = 0, ifd = 0, fmap = 0; + int startchip = -1, chipcount = 0, option_index = 0, force = 0, ifd = 0, ifwi = 0, fmap = 0; #if CONFIG_PRINT_WIKI == 1 int list_supported_wiki = 0; #endif @@ -110,6 +111,7 @@ enum programmer prog = PROGRAMMER_INVALID; enum { OPTION_IFD = 0x0100, + OPTION_IFWI, OPTION_FMAP, OPTION_FMAP_FILE, OPTION_FLASH_CONTENTS, @@ -129,6 +131,7 @@ {"force", 0, NULL, 'f'}, {"layout", 1, NULL, 'l'}, {"ifd", 0, NULL, OPTION_IFD}, + {"ifwi", 0, NULL, OPTION_IFWI}, {"fmap", 0, NULL, OPTION_FMAP}, {"fmap-file", 1, NULL, OPTION_FMAP_FILE}, {"image", 1, NULL, 'i'}, @@ -238,6 +241,10 @@ fprintf(stderr, "Error: --layout and --ifd both specified. Aborting.\n"); cli_classic_abort_usage(); } + if (ifwi) { + fprintf(stderr, "Error: --layout and --ifwi both specified. Aborting.\n"); + cli_classic_abort_usage(); + } if (fmap) { fprintf(stderr, "Error: --layout and --fmap-file both specified. Aborting.\n"); cli_classic_abort_usage(); @@ -249,12 +256,31 @@ fprintf(stderr, "Error: --layout and --ifd both specified. Aborting.\n"); cli_classic_abort_usage(); } + if (ifwi) { + fprintf(stderr, "Error: --ifwi and --ifd both specified. Aborting.\n"); + cli_classic_abort_usage(); + } if (fmap) { fprintf(stderr, "Error: --fmap-file and --ifd both specified. Aborting.\n"); cli_classic_abort_usage(); } ifd = 1; break; + case OPTION_IFWI: + if (layoutfile) { + fprintf(stderr, "Error: --layout and --ifwi both specified. Aborting.\n"); + cli_classic_abort_usage(); + } + if (ifd) { + fprintf(stderr, "Error: --ifd and --ifwi both specified. Aborting.\n"); + cli_classic_abort_usage(); + } + if (fmap) { + fprintf(stderr, "Error: --fmap-file and --ifwi both specified. Aborting.\n"); + cli_classic_abort_usage(); + } + ifwi = 1; + break; case OPTION_FMAP_FILE: if (fmap) { fprintf(stderr, "Error: --fmap or --fmap-file specified " @@ -265,6 +291,10 @@ fprintf(stderr, "Error: --fmap-file and --ifd both specified. Aborting.\n"); cli_classic_abort_usage(); } + if (ifwi) { + fprintf(stderr, "Error: --fmap-file and --ifwi both specified. Aborting.\n"); + cli_classic_abort_usage(); + } if (layoutfile) { fprintf(stderr, "Error: --fmap-file and --layout both specified. Aborting.\n"); cli_classic_abort_usage(); @@ -282,6 +312,10 @@ fprintf(stderr, "Error: --fmap and --ifd both specified. Aborting.\n"); cli_classic_abort_usage(); } + if (ifwi) { + fprintf(stderr, "Error: --fmap and --ifwi both specified. Aborting.\n"); + cli_classic_abort_usage(); + } if (layoutfile) { fprintf(stderr, "Error: --layout and --fmap both specified. Aborting.\n"); cli_classic_abort_usage(); @@ -452,7 +486,7 @@ goto out; } - if (!ifd && !fmap && process_include_args(get_global_layout())) { + if (!ifd && !ifwi && !fmap && process_include_args(get_global_layout())) { ret = 1; goto out; } @@ -611,6 +645,10 @@ process_include_args(layout))) { ret = 1; goto out_shutdown; + } else if (ifwi && (flashrom_layout_read_from_ifwi(&layout, fill_flash) || + process_include_args(layout))) { + ret = 1; + goto out_shutdown; } else if (fmap && fmapfile) { struct stat s; if (stat(fmapfile, &s) != 0) { diff --git a/ifwi.c b/ifwi.c new file mode 100644 index 0000000..320335a --- /dev/null +++ b/ifwi.c @@ -0,0 +1,359 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2019 secunet Security Networks AG + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdio.h> +#include <stddef.h> +#include <stdint.h> +#include <inttypes.h> +#include <stdbool.h> +#include <stdlib.h> +#include <string.h> + +#include "hwaccess.h" +#include "layout.h" +#include "flash.h" +#include "ifwi.h" + +static size_t bpdt_size(const struct bpdt *const header) +{ + return BPDT_HEADER_LENGTH + header->desc_count * BPDT_ENTRY_LENGTH; +} + +static int deserialize_bpdt_header(struct bpdt *const header, const uint8_t *const from) +{ + header->signature = read_le32(from + 0); + header->desc_count = read_le16(from + 4); + header->version = read_le16(from + 6); + header->xorsum = read_le32(from + 8); + header->ifwi_version = read_le32(from + 12); + + if (header->signature != BPDT_SIGNATURE) { + msg_gerr("IFWI: BPDT signature mismatch. Found 0x%08"PRIx32", expected 0x%08x.\n", + header->signature, BPDT_SIGNATURE); + return -4; + } + if (header->version != 1) { + msg_gerr("IFWI: Unknown BPDT version: %"PRIu32".\n", header->version); + return -3; + } + return 0; +} + +static int deserialize_bpdt_entries(struct bpdt *const bpdt, const uint8_t *const from, const size_t limit) +{ + unsigned int i; + size_t offset; + + for (i = 0, offset = 0; i < bpdt->desc_count; ++i, offset += BPDT_ENTRY_LENGTH) { + bpdt->entries[i].type = read_le16(from + offset + 0); + bpdt->entries[i].flags = read_le16(from + offset + 2); + bpdt->entries[i].offset = read_le32(from + offset + 4); + bpdt->entries[i].size = read_le32(from + offset + 8); + msg_gdbg("IFWI: BPDT entry #%u (0x%04"PRIx16", 0x%04"PRIx16", 0x%08"PRIx32", 0x%08"PRIx32")\n", + i, bpdt->entries[i].type, bpdt->entries[i].flags, + bpdt->entries[i].offset, bpdt->entries[i].size); + + const uint32_t end = bpdt->entries[i].offset + bpdt->entries[i].size; + if (end < bpdt->entries[i].offset) { + msg_gerr("IFWI: BPDT entry overflows 32-bit space; " + "offset 0x%08"PRIx32" size 0x%08"PRIx32"\n", + bpdt->entries[i].offset, bpdt->entries[i].size); + return -4; + } + if (end > limit) { + msg_gerr("IFWI: BPDT entry points outside of the partition: %08"PRIx32":%08"PRIx32"\n", + bpdt->entries[i].offset, end - 1); + return -4; + } + } + return (int)i; +} + +static int read_bpdt(struct bpdt **bpdt, + const size_t flash_offset, const size_t partition_limit, + int (*const read)(void *args, uint8_t *buf, unsigned int start, unsigned int len), + void *const read_args) +{ + uint8_t *buf; + int ret; + + buf = malloc(BPDT_HEADER_LENGTH); + *bpdt = malloc(sizeof(**bpdt)); + if (!buf || !*bpdt) { + msg_gerr("Out of memory!\n"); + ret = -1; + goto _free_bpdt_ret; + } + + if (read(read_args, buf, flash_offset, BPDT_HEADER_LENGTH)) { + ret = -2; + goto _free_bpdt_ret; + } + ret = deserialize_bpdt_header(*bpdt, buf); + if (ret < 0) + goto _free_bpdt_ret; + + buf = realloc_or_free(buf, bpdt_size(*bpdt)); + *bpdt = realloc_or_free(*bpdt, offsetof(struct bpdt, entries) + + (*bpdt)->desc_count * sizeof((*bpdt)->entries[0])); + if (!buf || !*bpdt) { + ret = -1; + goto _free_bpdt_ret; + } + + if (read(read_args, buf + BPDT_HEADER_LENGTH, + flash_offset + BPDT_HEADER_LENGTH, bpdt_size(*bpdt) - BPDT_HEADER_LENGTH)) { + ret = -2; + goto _free_bpdt_ret; + } + ret = deserialize_bpdt_entries(*bpdt, (uint8_t *)buf + BPDT_HEADER_LENGTH, partition_limit); + if (ret < 0) + goto _free_bpdt_ret; + + ret = 0; + goto _free_buf_ret; + +_free_bpdt_ret: + free(*bpdt); +_free_buf_ret: + free(buf); + return ret; +} + +static size_t spd_size(const struct spd *const header) +{ + return header->header_length + header->num_entries * SPD_ENTRY_LENGTH; +} + +static int deserialize_spd_header(struct spd *const header, const uint8_t *const from) +{ + header->marker = read_le32(from + 0); + header->num_entries = read_le32(from + 4); + header->header_version = read_le8 (from + 8); + header->entry_version = read_le8 (from + 9); + header->header_length = read_le8 (from + 10); + header->checksum = read_le8 (from + 11); + memcpy(header->name, from + 12, sizeof(header->name) - 1); + header->name[sizeof(header->name) - 1] = '\0'; + + if (header->marker != SPD_MARKER) { + msg_gerr("IFWI: SPD marker mismatch. Found 0x%08"PRIx32", expected 0x%08x.\n", + header->marker, SPD_MARKER); + return -4; + } + if (header->header_version != 1) { + msg_gerr("IFWI: Unknown SPD header version: %"PRIu8".\n", header->header_version); + return -3; + } + if (header->entry_version != 1) { + msg_gerr("IFWI: Unknown SPD entry version: %"PRIu8".\n", header->entry_version); + return -3; + } + return 0; +} + +static int deserialize_spd_entries(struct spd *const spd, const uint8_t *const from, const size_t limit) +{ + unsigned int i; + size_t offset; + + for (i = 0, offset = 0; i < spd->num_entries; ++i, offset += SPD_ENTRY_LENGTH) { + memcpy(spd->entries[i].name, from + offset, sizeof(spd->entries[i].name) - 1); + spd->entries[i].name[sizeof(spd->entries[i].name) - 1] = '\0'; + spd->entries[i].offset = read_le32(from + offset + 12); + spd->entries[i].length = read_le32(from + offset + 16); + msg_gdbg("IFWI: SPD entry #%u (%s, 0x%08"PRIx32", 0x%08"PRIx32")\n", + i, spd->entries[i].name, spd->entries[i].offset, spd->entries[i].length); + + const uint32_t end = spd->entries[i].offset + spd->entries[i].length; + if (end < spd->entries[i].offset) { + msg_gerr("IFWI: SPD entry overflows 32-bit space; " + "offset 0x%08"PRIx32" size 0x%08"PRIx32"\n", + spd->entries[i].offset, spd->entries[i].length); + return -4; + } + if (end > limit) { + msg_gerr("IFWI: SPD entry points outside of the partition: %08"PRIx32":%08"PRIx32"\n", + spd->entries[i].offset, end - 1); + return -4; + } + } + return (int)i; +} + +static int read_spd(struct spd **spd, + const size_t flash_offset, const size_t partition_limit, + int (*const read)(void *args, uint8_t *buf, unsigned int start, unsigned int len), + void *const read_args) +{ + uint8_t *buf; + int ret; + + buf = malloc(SPD_MIN_HEADER_LENGTH); + *spd = malloc(sizeof(**spd)); + if (!buf || !*spd) { + msg_gerr("Out of memory!\n"); + ret = -1; + goto _free_spd_ret; + } + + if (read(read_args, buf, flash_offset, SPD_MIN_HEADER_LENGTH)) { + ret = -2; + goto _free_spd_ret; + } + ret = deserialize_spd_header(*spd, (uint8_t *)buf); + if (ret < 0) + goto _free_spd_ret; + + buf = realloc_or_free(buf, spd_size(*spd)); + *spd = realloc_or_free(*spd, offsetof(struct spd, entries) + + (*spd)->num_entries * sizeof((*spd)->entries[0])); + if (!buf || !*spd) { + ret = -1; + goto _free_spd_ret; + } + + if (read(read_args, buf + (*spd)->header_length, + flash_offset + (*spd)->header_length, spd_size(*spd) - (*spd)->header_length)) { + ret = -2; + goto _free_spd_ret; + } + ret = deserialize_spd_entries(*spd, (uint8_t *)buf + (*spd)->header_length, partition_limit); + if (ret < 0) + goto _free_spd_ret; + + ret = 0; + goto _free_buf_ret; + +_free_spd_ret: + free(*spd); +_free_buf_ret: + free(buf); + return ret; +} + +static int layout_from_ifwi(struct flashrom_layout **const layout, + const size_t primary_offset, const size_t secondary_offset, + const size_t partition_limit, + int (*const read)(void *args, uint8_t *buf, unsigned int start, unsigned int len), + void *const read_args) +{ + struct bpdt *bpdt; + struct spd *spd; + size_t bpdt_offset, offset; + unsigned int i, j; + int ret = -1; + + if (!secondary_offset) + bpdt_offset = primary_offset; + else + bpdt_offset = secondary_offset; + + ret = read_bpdt(&bpdt, bpdt_offset, partition_limit - primary_offset, read, read_args); + if (ret < 0) + return ret; + + if (!secondary_offset && !(*layout = new_layout(32))) { + ret = -1; + goto _free_bpdt_ret; + } + + ret = add_layout_entry(layout, secondary_offset ? "S-BPDT" : "BPDT", + bpdt_offset, bpdt_offset + bpdt_size(bpdt) - 1); + if (ret < 0) + goto _free_layout_ret; + + for (i = 0; i < bpdt->desc_count; ++i) { + offset = primary_offset + bpdt->entries[i].offset; + + if (!bpdt->entries[i].offset || !bpdt->entries[i].size) { + msg_gdbg("IFWI: Skipping empty BPDT entry #%u of type %"PRIu16".\n", + i, bpdt->entries[i].type); + continue; + } + + switch (bpdt->entries[i].type) { + case 5: + /* recurse into secondary BPDT */ + ret = layout_from_ifwi(layout, primary_offset, offset, + partition_limit, read, read_args); + if (ret) + goto _free_layout_ret; + continue; + case 0: /* Fall through.*/ + case 1: /* Fall through.*/ + case 2: /* Fall through.*/ + case 3: /* Fall through.*/ + case 4: /* Fall through.*/ + case 6: /* Fall through.*/ + case 7: /* Fall through.*/ + case 8: /* Fall through.*/ + case 9: /* Fall through.*/ + case 14: /* Fall through.*/ + case 15: + break; + default: + continue; + } + + ret = read_spd(&spd, offset, partition_limit - offset, read, read_args); + switch (ret) { + case 0: + break; + case -1: /* Fall through. */ + case -2: + goto _free_layout_ret; + default: + continue; + } + + ret = add_layout_entry(layout, spd->name, offset, offset + bpdt->entries[i].size - 1); + if (ret < 0) { + free(spd); + goto _free_layout_ret; + } + for (j = 0; j < spd->num_entries; ++j) { + offset = primary_offset + bpdt->entries[i].offset + + (spd->entries[j].offset & SPD_ENTRY_OFFSET_MASK); + ret = add_layout_entry( + layout, spd->entries[j].name, + offset, offset + spd->entries[j].length - 1); + if (ret < 0) { + free(spd); + goto _free_layout_ret; + } + } + free(spd); + } + + ret = 0; + goto _free_bpdt_ret; + +_free_layout_ret: + free(*layout); +_free_bpdt_ret: + free(bpdt); + return ret; +} + +int layout_from_ifwi_rom(struct flashrom_layout **const layout, + struct flashrom_flashctx *const flashctx, + const size_t flash_offset) +{ + return layout_from_ifwi(layout, flash_offset, 0, flashctx->chip->total_size * 1024, + (int (*)(void *, uint8_t *, unsigned int, unsigned int))flashctx->chip->read, + flashctx); +} diff --git a/libflashrom.c b/libflashrom.c index f90a22c..96e34cc 100644 --- a/libflashrom.c +++ b/libflashrom.c @@ -30,6 +30,7 @@ #include "layout.h" #include "hwaccess.h" #include "ich_descriptors.h" +#include "ifwi.h" #include "libflashrom.h" /** @@ -383,6 +384,67 @@ #endif } +/** + * @brief Read a layout from the Intel IFWI in the flash. + * + * @param[out] layout Points to a struct flashrom_layout pointer that + * gets set if the descriptor is read and parsed + * successfully. + * @param[in] flashctx Flash context to read the descriptor from flash. + * + * @return 0 on success, + * 6 if descriptor parsing isn't implemented for the host, + * 3 if the data on flash couldn't be parsed, + * 2 if the data on flash couldn't be read, + * 1 on any other error. + */ +int flashrom_layout_read_from_ifwi(struct flashrom_layout **const layout, + struct flashrom_flashctx *const flashctx) +{ + struct flashrom_layout *ifd_layout; + unsigned int i; + int ret; + + ret = flashrom_layout_read_from_ifd(&ifd_layout, flashctx, NULL, 0); + if (ret) + return ret; + + for (i = 0; i < ifd_layout->num_entries; ++i) { + if (strcmp(ifd_layout->entries[i].name, "bios") == 0) + break; + } + if (i >= ifd_layout->num_entries) { + msg_gerr("Cannot find BIOS region in Intel Firmware Descriptor (IFD).\n"); + ret = 3; + goto _free_ifd_ret; + } + + msg_cinfo("Reading IFWI layout... "); + ret = layout_from_ifwi_rom(layout, flashctx, ifd_layout->entries[i].start); + switch (ret) { + case -4: /* Fall through. */ + case -3: + ret = 3; + break; + case -2: + ret = 2; + break; + case 0: + break; + default: + ret = 1; + break; + } + if (ret) + msg_cinfo("FAILED.\n"); + else + msg_cinfo("done.\n"); + +_free_ifd_ret: + free(ifd_layout); + return ret; +} + static int flashrom_layout_parse_fmap(struct flashrom_layout **layout, struct flashctx *const flashctx, const struct fmap *const fmap) { diff --git a/libflashrom.h b/libflashrom.h index 38c95d2..9ca7ea0 100644 --- a/libflashrom.h +++ b/libflashrom.h @@ -63,6 +63,7 @@ struct flashrom_layout; int flashrom_layout_read_from_ifd(struct flashrom_layout **, struct flashrom_flashctx *, const void *dump, size_t len); +int flashrom_layout_read_from_ifwi(struct flashrom_layout **, struct flashrom_flashctx *); int flashrom_layout_read_fmap_from_rom(struct flashrom_layout **, struct flashrom_flashctx *, off_t offset, size_t length); int flashrom_layout_read_fmap_from_buffer(struct flashrom_layout **layout, -- To view, visit https://review.coreboot.org/c/flashrom/+/31018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1f1ef4c5d109b81dec7a11bca04ba89204fa84eb Gerrit-Change-Number: 31018 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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flashrom-gerrit December 2019