May 2018 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: buspirate_spi: Tristate IOs when using using pullup=on
by David Hendricks (Code Review) 07 May '18

07 May '18

Hello Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/23864 to look at the new patch set (#2). Change subject: buspirate_spi: Tristate IOs when using using pullup=on ...................................................................... buspirate_spi: Tristate IOs when using using pullup=on Avoid putting 3.3V on IO pins when pullup=on to avoid damage to 1.8V chips. Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> Change-Id: I9ac4c6b7a0079bb1022f2d70030a6eb29996108f --- M buspirate_spi.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/64/23864/2 -- To view, visit https://review.coreboot.org/23864 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I9ac4c6b7a0079bb1022f2d70030a6eb29996108f Gerrit-Change-Number: 23864 Gerrit-PatchSet: 2 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[master]: flashchips: Add Winbond 25Q40EW and rename 25Q40.W
by build bot (Jenkins) (Code Review) 06 May '18

06 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25462 ) Change subject: flashchips: Add Winbond 25Q40EW and rename 25Q40.W ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/flashrom-customrules/1285/ : SUCCESS -- To view, visit https://review.coreboot.org/25462 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib610b0d6f3a5561b2ac3505ef15bdee8b0edae25 Gerrit-Change-Number: 25462 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 06 May 2018 21:00:56 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in flashrom[master]: flashchips: Add Microchip SST26VF016B
by David Hendricks (Code Review) 06 May '18

06 May '18

David Hendricks has abandoned this change. ( https://review.coreboot.org/25465 ) Change subject: flashchips: Add Microchip SST26VF016B ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/25465 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: Ia7659e3db3168254b7f34959eece0f8df3142ab9 Gerrit-Change-Number: 25465 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[master]: flashchips: Add Winbond 25Q40EW and rename 25Q40.W
by David Hendricks (Code Review) 06 May '18

06 May '18

David Hendricks has submitted this change and it was merged. ( https://review.coreboot.org/25462 ) Change subject: flashchips: Add Winbond 25Q40EW and rename 25Q40.W ...................................................................... flashchips: Add Winbond 25Q40EW and rename 25Q40.W Same story as for 25Q80BW/EW, 25Q40EW has a new ID and the only known chip with the old ID is the BW variant. Change-Id: Ib610b0d6f3a5561b2ac3505ef15bdee8b0edae25 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/25462 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: David Hendricks <david.hendricks(a)gmail.com> --- M flashchips.c M flashchips.h 2 files changed, 44 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified David Hendricks: Looks good to me, approved diff --git a/flashchips.c b/flashchips.c index 3c04533..8eda608 100644 --- a/flashchips.c +++ b/flashchips.c @@ -15137,10 +15137,10 @@ { .vendor = "Winbond", - .name = "W25Q40.W", + .name = "W25Q40BW", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, - .model_id = WINBOND_NEX_W25Q40_W, + .model_id = WINBOND_NEX_W25Q40BW, .total_size = 512, .page_size = 256, /* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ @@ -15212,6 +15212,46 @@ .read = spi_chip_read, .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ }, + + { + .vendor = "Winbond", + .name = "W25Q40EW", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q40EW, + .total_size = 512, + .page_size = 256, + /* OTP: 3*256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1650, 1950}, /* Fast read (0x0B) and multi I/O supported */ + }, + { .vendor = "Winbond", .name = "W25Q80EW", diff --git a/flashchips.h b/flashchips.h index 348f2fd..f00be3b 100644 --- a/flashchips.h +++ b/flashchips.h @@ -908,8 +908,9 @@ #define WINBOND_NEX_W25Q128_V 0x4018 /* W25Q128BV; W25Q128FV in SPI mode (default) */ #define WINBOND_NEX_W25Q256_V 0x4019 /* W25Q256FV */ #define WINBOND_NEX_W25Q20_W 0x5012 /* W25Q20BW */ -#define WINBOND_NEX_W25Q40_W 0x5013 /* W25Q40BW */ +#define WINBOND_NEX_W25Q40BW 0x5013 /* W25Q40BW */ #define WINBOND_NEX_W25Q80BW 0x5014 /* W25Q80BW */ +#define WINBOND_NEX_W25Q40EW 0x6013 /* W25Q40EW */ #define WINBOND_NEX_W25Q80EW 0x6014 /* W25Q80EW */ #define WINBOND_NEX_W25Q16_W 0x6015 /* W25Q16DW */ #define WINBOND_NEX_W25Q32_W 0x6016 /* W25Q32DW; W25Q32FV in QPI mode */ -- To view, visit https://review.coreboot.org/25462 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: Ib610b0d6f3a5561b2ac3505ef15bdee8b0edae25 Gerrit-Change-Number: 25462 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[master]: flashchips: Add Winbond 25Q40EW and rename 25Q40.W
by build bot (Jenkins) (Code Review) 06 May '18

06 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25462 ) Change subject: flashchips: Add Winbond 25Q40EW and rename 25Q40.W ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/1284/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/1066/ : SUCCESS -- To view, visit https://review.coreboot.org/25462 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib610b0d6f3a5561b2ac3505ef15bdee8b0edae25 Gerrit-Change-Number: 25462 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 06 May 2018 20:58:14 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in flashrom[master]: flashchips: Add Microchip SST26VF016B
by David Hendricks (Code Review) 06 May '18

06 May '18

David Hendricks has posted comments on this change. ( https://review.coreboot.org/25465 ) Change subject: flashchips: Add Microchip SST26VF016B ...................................................................... Patch Set 3: Code-Review-2 I went ahead with 25962, so now this version of the patch can be abandoned. -- To view, visit https://review.coreboot.org/25465 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia7659e3db3168254b7f34959eece0f8df3142ab9 Gerrit-Change-Number: 25465 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 06 May 2018 20:57:07 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in flashrom[master]: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)
by build bot (Jenkins) (Code Review) 06 May '18

06 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25962 ) Change subject: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A) ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/flashrom-customrules/1283/ : SUCCESS -- To view, visit https://review.coreboot.org/25962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Gerrit-Change-Number: 25962 Gerrit-PatchSet: 3 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 06 May 2018 20:56:15 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in flashrom[master]: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)
by David Hendricks (Code Review) 06 May '18

06 May '18

David Hendricks has submitted this change and it was merged. ( https://review.coreboot.org/25962 ) Change subject: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A) ...................................................................... flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A) This patch seems to have originally been from https://patchwork.coreboot.org/patch/4126/ . The most recent version seems to be in OpenEmbedded (commit 503a572) which added support for 16Mbit and 32Mbit variants. The OpenEmbedded patch also makes changes to linux_spi.c to add some debug prints which are omitted in this version. >From the original commit message: Differences between SST26 and SST25: 1. The WREN instruction must be executed prior to WRSR [Section 5.31]. There is no EWSR. 2. Block protection bits are no longer in the status register. There is a dedicated 144-bit register [Table 5-6]. The device is write-protected by default. A Global Block-Protection Unlock command unlocks the entire memory [Section 4.1]. Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Signed-off-by: Wei Hu <wei(a)aristanetworks.com> Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Reviewed-on: https://review.coreboot.org/25962 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M chipdrivers.h M flashchips.c M flashchips.h M spi25_statusreg.c 4 files changed, 130 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified David Hendricks: Verified; Looks good to me, approved diff --git a/chipdrivers.h b/chipdrivers.h index 85c64b2..134ed26 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -102,6 +102,7 @@ int spi_prettyprint_status_register_sst25(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash); +int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash); /* sfdp.c */ int probe_spi_sfdp(struct flashctx *flash); diff --git a/flashchips.c b/flashchips.c index 22621fa..3c04533 100644 --- a/flashchips.c +++ b/flashchips.c @@ -12918,6 +12918,120 @@ { .vendor = "SST", + .name = "SST26VF016B(A)", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST26VF016B, + .total_size = 2048, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { + {8 * 1024, 4}, + {32 * 1024, 1}, + {64 * 1024, 30}, + {32 * 1024, 1}, + {8 * 1024, 4}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect_sst26_global_unprotect, + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + { + .vendor = "SST", + .name = "SST26VF032B(A)", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST26VF032B, + .total_size = 4096, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { + {8 * 1024, 4}, + {32 * 1024, 1}, + {64 * 1024, 62}, + {32 * 1024, 1}, + {8 * 1024, 4}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect_sst26_global_unprotect, + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + + { + .vendor = "SST", + .name = "SST26VF064B(A)", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST26VF064B, + .total_size = 8192, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { + {8 * 1024, 4}, + {32 * 1024, 1}, + {64 * 1024, 126}, + {32 * 1024, 1}, + {8 * 1024, 4}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect_sst26_global_unprotect, + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "SST", .name = "SST25WF512", .bustype = BUS_SPI, .manufacture_id = SST_ID, diff --git a/flashchips.h b/flashchips.h index 6eeb28f..348f2fd 100644 --- a/flashchips.h +++ b/flashchips.h @@ -699,6 +699,8 @@ #define SST_SST25VF064C 0x254B #define SST_SST26VF016 0x2601 #define SST_SST26VF032 0x2602 +#define SST_SST26VF016B 0x2641 +#define SST_SST26VF032B 0x2642 #define SST_SST26VF064B 0x2643 #define SST_SST27SF512 0xA4 #define SST_SST27SF010 0xA5 diff --git a/spi25_statusreg.c b/spi25_statusreg.c index 67d676c..a5fb3b8 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -195,6 +195,19 @@ return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF); } +int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash) +{ + int result = spi_write_enable(flash); + if (result) + return result; + + static const unsigned char cmd[] = { 0x98 }; /* ULBPR */ + result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); + if (result) + msg_cerr("ULBPR failed\n"); + return result; +} + /* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and * protected/locked by bit #7. Useful when bits 4-5 may be non-0). */ int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash) -- To view, visit https://review.coreboot.org/25962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Gerrit-Change-Number: 25962 Gerrit-PatchSet: 3 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[master]: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)
by David Hendricks (Code Review) 06 May '18

06 May '18

David Hendricks has posted comments on this change. ( https://review.coreboot.org/25962 ) Change subject: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A) ...................................................................... Patch Set 2: Verified+1 Code-Review+2 I ordered some SST26VF016B chips and tested this and it seems to work fine. LGTM. -- To view, visit https://review.coreboot.org/25962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Gerrit-Change-Number: 25962 Gerrit-PatchSet: 2 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 06 May 2018 20:55:58 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in flashrom[master]: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)
by build bot (Jenkins) (Code Review) 06 May '18

06 May '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25962 ) Change subject: flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A) ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/1282/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/1065/ : SUCCESS -- To view, visit https://review.coreboot.org/25962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Gerrit-Change-Number: 25962 Gerrit-PatchSet: 2 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 06 May 2018 20:50:30 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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