Nico Huber has posted comments on this change. ( https://review.coreboot.org/28810 )
Change subject: flaschips: Mark GigaDevice GD25Q128 as tested
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/28810/1/flashchips.c
File flashchips.c:
https://review.coreboot.org/#/c/28810/1/flashchips.c@6353
PS1, Line 6353: GD25Q128B
The name should be changed to "GD25B128B/GD25Q128B".
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Gerrit-Change-Id: I134d3816c0f02e20764ab132a01bcba9f4e93f0d
Gerrit-Change-Number: 28810
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
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Gerrit-Comment-Date: Tue, 02 Oct 2018 14:43:49 +0000
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/28707 )
Change subject: Remove unneeded whitespace and fix char line limit
......................................................................
Patch Set 4:
(6 comments)
Sorry, I gave up reviewing... if you want to remove all these line
breaks (i.e. enforce to use all available space in the line), we should
have clearer rules about what is good style first (I'll comment one oc-
currence in `cbtable.c` where I think it looked better before).
There are cases that are obviously wrong (e.g. lines starting with
spaces where a tab would fit, or mixed tabs and spaces). And I wouldn't
object fixing those (and removing line breaks around these cases). I'm
trying to keep the noise in the git history produced by such patches as
low as possible.
But having to bikeshed style wastes too much time that is better spent
on actual software development.
https://review.coreboot.org/#/c/28707/1/board_enable.c
File board_enable.c:
https://review.coreboot.org/#/c/28707/1/board_enable.c@159
PS1, Line 159: uint8_t base; /* base register in that LDN for the port */
> There's actually only 4 spaces after a tab... […]
I don't understand. Do you mean not "enough spaces after the tab"
that could be removed? In any case we are far below 112 chars here.
https://review.coreboot.org/#/c/28707/4/board_enable.c
File board_enable.c:
https://review.coreboot.org/#/c/28707/4/board_enable.c@1122
PS4, Line 1122: * overridden by connecting the two solder points next to F2.
This change seems too arbitrary. I don't think there is a rule
for this (whitespace amidst a line and not from the start) and
it's not obvious to me which style is better. So the next per-
son who wants to clean things up could argue that it should be
spaces.
Unless you have a strong argument, please leave such manual
formatting as is.
https://review.coreboot.org/#/c/28707/4/board_enable.c@1347
PS4, Line 1347: {0x4E, 0x0100, 0x0000}, /* ...GPO29: XBCS bit 8 */
Same here (and I don't see why it should be two tabs).
https://review.coreboot.org/#/c/28707/4/board_enable.c@2024
PS4, Line 2024: val &= ~0x87; /* Output, non-inverted, GPIO, push/pull */
And here.
https://review.coreboot.org/#/c/28707/4/board_enable.c@2240
PS4, Line 2240: * to the respective tables in print.c. Thanks!
and here
https://review.coreboot.org/#/c/28707/4/cbtable.c
File cbtable.c:
https://review.coreboot.org/#/c/28707/4/cbtable.c@a294
PS4, Line 294:
Here, arguments were grouped (header in one line, table in another)
making it more readable, IMO. But that might just be a question of
taste.
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Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
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Hello Angel Pons, Richard Spiegel, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/28707
to look at the new patch set (#4).
Change subject: Remove unneeded whitespace and fix char line limit
......................................................................
Remove unneeded whitespace and fix char line limit
Change-Id: I0e72e3e3736a39685b7f166c5e6b06cc241b26be
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M board_enable.c
M cbtable.c
M chipset_enable.c
M drkaiser.c
M flashchips.c
M flashchips.h
M flashrom.c
M hwaccess.h
M pickit2_spi.c
9 files changed, 280 insertions(+), 353 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/07/28707/4
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Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
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Hello Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/28866
to look at the new patch set (#2).
Change subject: flashchips: Mark Spansion S25FL128P......0 as tested
......................................................................
flashchips: Mark Spansion S25FL128P......0 as tested
Tested with a Spansion FL128PIF.
Change-Id: Ic99eabb67d5bce3910e9275d0056a7cfa8cff36f
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M flashchips.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/66/28866/2
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/28866 )
Change subject: flashchips: Mark Spansion S25FL128P......0 as tested
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/28866/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/28866/1//COMMIT_MSG@9
PS1, Line 9: The S25FL128P......1 gives errors while
: erasing, but I have not tested further.
> It can only be either of them. If you select the wrong chip […]
Ah, I understand now. Of course using the wrong chip type won't work...
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Gerrit-Comment-Date: Tue, 02 Oct 2018 08:41:42 +0000
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/28866 )
Change subject: flashchips: Mark Spansion S25FL128P......0 as tested
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Please clarify the commit message. If it was a single chip, just drop
the sentence about the ...1 entry.
https://review.coreboot.org/#/c/28866/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/28866/1//COMMIT_MSG@9
PS1, Line 9: The S25FL128P......1 gives errors while
: erasing, but I have not tested further.
It can only be either of them. If you select the wrong chip
model, failure is expected. And the ...1 is just the wrong
entry. According to the datasheet the ...1 would be marked
FL128PIFL.
Or were you talking about another chip?
Also just noted, the numbers are 00 and 01 so the names in
flashrom should be S25FL128P.....00 and S25FL128P.....01.
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Gerrit-Comment-Date: Tue, 02 Oct 2018 08:31:37 +0000
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