Mike Banon has uploaded this change for review. ( https://review.coreboot.org/23260
Change subject: [v4,3/6] ENE EDI - add dummy read to ensure proper detection of ENE chips
......................................................................
[v4,3/6] ENE EDI - add dummy read to ensure proper detection of ENE chips
ENE chips enable EDI by detecting a clock frequency between 1 MHz and 8 MHz.
In many cases, the chip won't be able to both detect the clock signal and
serve the associated request at the same time.
Thus, a dummy read has to be added to ensure that EDI is enabled and
operational starting from the next request.
Original patch has been created by Paul Kocialkowski, the previous version:
http://git.code.paulk.fr/gitweb/?p=flashrom.git;a=shortlog;h=refs/heads/next
Now it has been ported to the latest source code of flashrom master branch
Change-Id: I69ee71674649cd8ba4fc635f889cb39a1cd204b9
Signed-off-by: Mike Banon <mikebdp2(a)gmail.com>
---
M edi.c
1 file changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/60/23260/1
diff --git a/edi.c b/edi.c
index 0ca1704..fde5ff1 100644
--- a/edi.c
+++ b/edi.c
@@ -163,6 +163,14 @@
return 0;
}
+static void edi_detect(struct flashctx *flash)
+{
+ unsigned char hwversion;
+
+ /* This dummy read ensures proper detection of EDI. */
+ edi_read(flash, ENE_EC_HWVERSION, &hwversion);
+}
+
static int edi_spi_enable(struct flashctx *flash)
{
unsigned char buffer;
@@ -481,6 +489,16 @@
int probe;
int rc;
+ /*
+ * ENE chips enable EDI by detecting a clock frequency between 1 MHz and
+ * 8 MHz. In many cases, the chip won't be able to both detect the clock
+ * signal and serve the associated request at the same time.
+ *
+ * Thus, a dummy read has to be added to ensure that EDI is enabled and
+ * operational starting from the next request.
+ */
+ edi_detect(flash);
+
probe = edi_chip_probe(flash, &ene_kb9012);
if (!probe)
return 0;
--
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Set Ready For Review
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Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/23225
to look at the new patch set (#2).
Change subject: Whitelist Lenovo Thinkpad X220
......................................................................
Whitelist Lenovo Thinkpad X220
Change-Id: Idd667da8209a664469c1a909a549d2b625714a78
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M board_enable.c
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/25/23225/2
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Hello David Hendricks, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/23057
to look at the new patch set (#4).
Change subject: buspirate_spi: Add support for variable serial speeds
......................................................................
buspirate_spi: Add support for variable serial speeds
This patch sets the default baud rate for communication between
the host device and the Bus Pirate for hardware versions 3.0
and greater to 2M baud.
It also introduces the ability to manually set the baud rate via
the added 'serialspeed' programmer parameter.
This is done in two parts. Firstly, the requested serial speed is looked up
in a table to determine the appropriate clock divisor and the divisor is sent
to the bus pirate. Then, the system's baud rate for the selected serial port
is set using serial.c's 'serialport_config'. This function's prototype had to
be added to programmer.h.
In testing, using the 2M baud rate was able to significantly decrease
flash times (down from 20+ minutes to less than 2 minutes for an 8MB flash).
Change-Id: I3706f17a94fdf056063f2ad4a5f0a219665cdcbf
Signed-off-by: Shawn Anastasio <shawnanastasio(a)yahoo.com>
---
M buspirate_spi.c
M flashrom.8.tmpl
M programmer.h
3 files changed, 136 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/23057/4
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Shawn Anastasio has posted comments on this change. ( https://review.coreboot.org/23057 )
Change subject: buspirate_spi: Add support for variable serial speeds
......................................................................
Patch Set 3:
Fair enough. I think a good compromise is to remove all speeds < 115200 and keep spispeed so that users can specify an intermediate value. I'll also change the check to allow BP < v3.0 owners manually set the speed (and display a warning).
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