July 2017 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[staging]: Drop redundant `enum msglevel`
by build bot (Jenkins) (Code Review) 13 Jul '17

13 Jul '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20268 ) Change subject: Drop redundant `enum msglevel` ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/431/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/459/ : SUCCESS -- To view, visit https://review.coreboot.org/20268 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I1895cb8f60da3abf70c9c2953f52414cd2cc10a9 Gerrit-Change-Number: 20268 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Jul 2017 16:27:40 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: Simple, clumsy script to test layout handling
by Nico Huber (Code Review) 13 Jul '17

13 Jul '17

Nico Huber has abandoned this change. ( https://review.coreboot.org/19352 ) Change subject: Simple, clumsy script to test layout handling ...................................................................... Abandoned Testing is now done by users xD -- To view, visit https://review.coreboot.org/19352 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: abandon Gerrit-Change-Id: I37124455071bf3395384a58ad236c998f738c418 Gerrit-Change-Number: 19352 Gerrit-PatchSet: 8 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[staging]: Enable continuous SPI reads
by Nico Huber (Code Review) 13 Jul '17

13 Jul '17

Nico Huber has abandoned this change. ( https://review.coreboot.org/17954 ) Change subject: Enable continuous SPI reads ...................................................................... Abandoned Superseded by Urja's version. -- To view, visit https://review.coreboot.org/17954 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: abandon Gerrit-Change-Id: Idf7aa130b1ceb3d0864bdeab5835f3341f558d41 Gerrit-Change-Number: 17954 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Urja Rannikko <urjaman(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[staging]: Enable continuous SPI reads
by Nico Huber (Code Review) 13 Jul '17

13 Jul '17

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/20223 ) Change subject: Enable continuous SPI reads ...................................................................... Enable continuous SPI reads Previous unnecessary page-by-page reading is repurposed to read by big naturally aligned areas (now chip size limited to 16MB for future-proofing of 4 byte addressed multi-die chips) and serprog hack for continuous reads is removed. Change-Id: Iadf909c9216578b1c5dacd4c4991bb436e32edc9 Signed-off-by: Urja Rannikko <urjaman(a)gmail.com> Reviewed-on: https://review.coreboot.org/20223 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M serprog.c M spi25.c 2 files changed, 15 insertions(+), 35 deletions(-) Approvals: Nico Huber: Looks good to me, approved build bot (Jenkins): Verified diff --git a/serprog.c b/serprog.c index 98aac83..25c9944 100644 --- a/serprog.c +++ b/serprog.c @@ -303,15 +303,13 @@ unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, - unsigned int start, unsigned int len); static struct spi_master spi_master_serprog = { .type = SPI_CONTROLLER_SERPROG, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = serprog_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = serprog_spi_read, + .read = default_spi_read, .write_256 = default_spi_write_256, .write_aai = default_spi_write_aai, }; @@ -931,25 +929,6 @@ readarr); free(parmbuf); return ret; -} - -/* FIXME: This function is optimized so that it does not split each transaction - * into chip page_size long blocks unnecessarily like spi_read_chunked. This has - * the advantage that it is much faster for most chips, but breaks those with - * non-continuous reads. When spi_read_chunked is fixed this method can be removed. */ -static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, - unsigned int start, unsigned int len) -{ - unsigned int i, cur_len; - const unsigned int max_read = spi_master_serprog.max_data_read; - for (i = 0; i < len; i += cur_len) { - int ret; - cur_len = min(max_read, (len - i)); - ret = spi_nbyte_read(flash, start + i, buf + i, cur_len); - if (ret) - return ret; - } - return 0; } void *serprog_map(const char *descr, uintptr_t phys_addr, size_t len) diff --git a/spi25.c b/spi25.c index af4b6db..76242be 100644 --- a/spi25.c +++ b/spi25.c @@ -940,30 +940,31 @@ /* * Read a part of the flash chip. * FIXME: Use the chunk code from Michael Karcher instead. - * Each page is read separately in chunks with a maximum size of chunksize. + * Each naturally aligned area is read separately in chunks with a maximum size of chunksize. */ int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize) { int rc = 0; unsigned int i, j, starthere, lenhere, toread; - unsigned int page_size = flash->chip->page_size; + /* Limit for multi-die 4-byte-addressing chips. */ + unsigned int area_size = min(flash->chip->total_size * 1024, 16 * 1024 * 1024); /* Warning: This loop has a very unusual condition and body. - * The loop needs to go through each page with at least one affected - * byte. The lowest page number is (start / page_size) since that - * division rounds down. The highest page number we want is the page + * The loop needs to go through each area with at least one affected + * byte. The lowest area number is (start / area_size) since that + * division rounds down. The highest area number we want is the area * where the last byte of the range lives. That last byte has the - * address (start + len - 1), thus the highest page number is - * (start + len - 1) / page_size. Since we want to include that last - * page as well, the loop condition uses <=. + * address (start + len - 1), thus the highest area number is + * (start + len - 1) / area_size. Since we want to include that last + * area as well, the loop condition uses <=. */ - for (i = start / page_size; i <= (start + len - 1) / page_size; i++) { - /* Byte position of the first byte in the range in this page. */ + for (i = start / area_size; i <= (start + len - 1) / area_size; i++) { + /* Byte position of the first byte in the range in this area. */ /* starthere is an offset to the base address of the chip. */ - starthere = max(start, i * page_size); - /* Length of bytes in the range in this page. */ - lenhere = min(start + len, (i + 1) * page_size) - starthere; + starthere = max(start, i * area_size); + /* Length of bytes in the range in this area. */ + lenhere = min(start + len, (i + 1) * area_size) - starthere; for (j = 0; j < lenhere; j += chunksize) { toread = min(chunksize, lenhere - j); rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); -- To view, visit https://review.coreboot.org/20223 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: merged Gerrit-Change-Id: Iadf909c9216578b1c5dacd4c4991bb436e32edc9 Gerrit-Change-Number: 20223 Gerrit-PatchSet: 5 Gerrit-Owner: Urja Rannikko <urjaman(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: Urja Rannikko <urjaman(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[staging]: ich_descriptors: Pretty print an assumed chipset
by build bot (Jenkins) (Code Review) 13 Jul '17

13 Jul '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20247 ) Change subject: ich_descriptors: Pretty print an assumed chipset ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/430/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/457/ : SUCCESS -- To view, visit https://review.coreboot.org/20247 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Id28cb3abc45c6e7f4c4accfc019579c7448c45d7 Gerrit-Change-Number: 20247 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Jul 2017 16:13:20 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: chipset_enable: Set 100 series chipsets to NT
by build bot (Jenkins) (Code Review) 13 Jul '17

13 Jul '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19047 ) Change subject: chipset_enable: Set 100 series chipsets to NT ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/429/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/456/ : SUCCESS -- To view, visit https://review.coreboot.org/19047 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I9376a0c180b7e73751fbd3c8c37b693d358cbfb8 Gerrit-Change-Number: 19047 Gerrit-PatchSet: 7 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Jul 2017 16:13:15 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: ich_descriptors: Update for Intel Skylake
by build bot (Jenkins) (Code Review) 13 Jul '17

13 Jul '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18973 ) Change subject: ich_descriptors: Update for Intel Skylake ...................................................................... Patch Set 11: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/428/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/455/ : SUCCESS -- To view, visit https://review.coreboot.org/18973 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Idd60a857d1ecffcb2e437af21134d9de44dcceb8 Gerrit-Change-Number: 18973 Gerrit-PatchSet: 11 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Jul 2017 16:13:08 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: ich_descriptors: Add function to guess chipset version
by build bot (Jenkins) (Code Review) 13 Jul '17

13 Jul '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20246 ) Change subject: ich_descriptors: Add function to guess chipset version ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/427/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/453/ : SUCCESS -- To view, visit https://review.coreboot.org/20246 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Ie1736663dc33801b19d3e695c072c61a6c6345a2 Gerrit-Change-Number: 20246 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Jul 2017 16:13:05 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: ich_descriptors: Draw +0xfff into ICH_FREG_LIMIT()
by build bot (Jenkins) (Code Review) 13 Jul '17

13 Jul '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19046 ) Change subject: ich_descriptors: Draw +0xfff into ICH_FREG_LIMIT() ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/426/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/452/ : SUCCESS -- To view, visit https://review.coreboot.org/19046 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I11ac0a50b3f32f47879e7cfb7a26068cd0572ede Gerrit-Change-Number: 19046 Gerrit-PatchSet: 7 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Jul 2017 16:13:05 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: ichspi: Add support for Intel Skylake
by build bot (Jenkins) (Code Review) 13 Jul '17

13 Jul '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18962 ) Change subject: ichspi: Add support for Intel Skylake ...................................................................... Patch Set 8: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/425/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/454/ : SUCCESS -- To view, visit https://review.coreboot.org/18962 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I0f4565a3c39f5fe3aec4fc8863605cebed1ad4ee Gerrit-Change-Number: 18962 Gerrit-PatchSet: 8 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Jul 2017 16:13:00 +0000 Gerrit-HasComments: No

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