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Success: Gigabyte GA-MA780G-UD3H
by Bernhard Geier 07 Mar '11

07 Mar '11

I was able to upgrade a Gigabyte GA-MA780G-UD3H with flashrom 0.9.2+r114 (from Debian Testing, AM64) to the newest BIOS. No additional options were required, everything worked as it should.

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[commit] r1271 - trunk
by repository service 07 Mar '11

07 Mar '11

Author: hailfinger Date: Sun Mar 6 23:16:30 2011 New Revision: 1271 URL: http://flashrom.org/trac/flashrom/changeset/1271 Log: Add Gigabyte GA-MA780G-UD3H to mainboard support list. http://www.flashrom.org/pipermail/flashrom/2010-October/005117.html Signed-off-by: Bernhard Geier <geierb(a)geierb.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/print.c Modified: trunk/print.c ============================================================================== --- trunk/print.c Sun Mar 6 19:45:40 2011 (r1270) +++ trunk/print.c Sun Mar 6 23:16:30 2011 (r1271) @@ -490,6 +490,7 @@ B("GIGABYTE", "GA-MA69VM-S2", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL), B("GIGABYTE", "GA-MA74GM-S2H (rev. 3.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL), B("GIGABYTE", "GA-MA770T-UD3P", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL), + B("GIGABYTE", "GA-MA780G-UD3H", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL), B("GIGABYTE", "GA-MA78G-DS3H (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL), B("GIGABYTE", "GA-MA78GM-S2H", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL), /* TODO: Rev. 1.0, 1.1, or 2.x? */ B("GIGABYTE", "GA-MA78GPM-DS2H", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),

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Re: [flashrom] [PATCH 1/1] Add HP e-Vectra P2706T
by Michał Janke 06 Mar '11

06 Mar '11

Yey, it worked - well, partially at least. I just tested it against 0.9.3 sources, and since it patched with only two slight offsets, I gave it a go. The SST chip got written and verified correctly, though erasing failed. Unfortunately my coreboot rom image seems not fully functional, so I'll have to dig that problem - tomorrow :) Many thanks, jankes 2011/3/3 Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de>: > Reported by: Michal Janke <jankeso(a)gmail.com> > > flashrom -V: http://paste.flashrom.org/view.php?id=370 > lspci: http://paste.flashrom.org/view.php?id=371 > superiotool: http://paste.flashrom.org/view.php?id=372 and > http://www.flashrom.org/pipermail/flashrom/2011-March/005878.html > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > --- > board_enable.c | 29 +++++++++++++++++++++++------ > 1 files changed, 23 insertions(+), 6 deletions(-) > > diff --git a/board_enable.c b/board_enable.c > index 5776bf5..26c5fbc 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -543,7 +543,10 @@ static int it8707f_write_enable_2e(void) > return it8707f_write_enable(0x2e); > } > > -static int pc87360_gpio_set(uint8_t gpio, int raise) > +#define PC87360_ID 0xE1 > +#define PC87364_ID 0xE4 > + > +static int pc8736x_gpio_set(uint8_t chipid, uint8_t gpio, int raise) > { > static const int bankbase[] = {0, 4, 8, 10, 12}; > int gpio_bank = gpio / 8; > @@ -552,13 +555,13 @@ static int pc87360_gpio_set(uint8_t gpio, int raise) > uint8_t id, val; > > if (gpio_bank > 4) { > - msg_perr("PC87360: Invalid GPIO %d\n", gpio); > + msg_perr("PC8736x: Invalid GPIO %d\n", gpio); > return -1; > } > > id = sio_read(0x2E, 0x20); > - if (id != 0xE1) { > - msg_perr("PC87360: unexpected ID %02x\n", id); > + if (id != chipid) { > + msg_perr("PC8736x: unexpected ID %02x (expected %02x)\n", id, chipid); > return -1; > } > > @@ -1483,9 +1486,22 @@ static int board_hp_vl400(void) > int ret; > ret = intel_ich_gpio_set(25, 1); /* Master write enable ? */ > if (!ret) > - ret = pc87360_gpio_set(0x09, 1); /* #WP ? */ > + ret = pc8736x_gpio_set(PC87360_ID, 0x09, 1); /* #WP ? */ > + if (!ret) > + ret = pc8736x_gpio_set(PC87360_ID, 0x27, 1); /* #TBL */ > + return ret; > +} > + > +/* > + * Suited for: > + * - HP e-Vectra P2706T: 810E + ICH + PC87364 > + */ > +static int board_hp_p2706t(void) > +{ > + int ret; > + ret = pc8736x_gpio_set(PC87364_ID, 0x25, 1); > if (!ret) > - ret = pc87360_gpio_set(0x27, 1); /* #TBL */ > + ret = pc8736x_gpio_set(PC87364_ID, 0x26, 1); > return ret; > } > > @@ -1940,6 +1956,7 @@ const struct board_pciid_enable board_pciid_enables[] = { > {0x8086, 0x24c3, 0x1458, 0x24c2, 0x8086, 0x24cd, 0x1458, 0x5004, NULL, NULL, NULL, "GIGABYTE", "GA-8PE667 Ultra 2", 0, OK, intel_ich_gpio32_raise}, > {0x10DE, 0x026C, 0x1458, 0xA102, 0x10DE, 0x0260, 0x1458, 0x5001, NULL, NULL, NULL, "GIGABYTE", "GA-K8N51GMF-9", 0, OK, nvidia_mcp_gpio3b_raise}, > {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, OK, nvidia_mcp_gpio21_raise}, > + {0x8086, 0x2415, 0x103c, 0x1250, 0x10b7, 0x9200, 0x103c, 0x1247, NULL, NULL, NULL, "HP", "e-Vectra P2706T", 0, OK, board_hp_p2706t}, > {0x1166, 0x0223, 0x103c, 0x320d, 0x14e4, 0x1678, 0x103c, 0x703e, NULL, "hp", "dl145_g3", "HP", "ProLiant DL145 G3", 0, OK, board_hp_dl145_g3_enable}, > {0x1166, 0x0223, 0x103c, 0x320d, 0x14e4, 0x1648, 0x103c, 0x310f, NULL, "hp", "dl165_g6", "HP", "ProLiant DL165 G6", 0, OK, board_hp_dl165_g6_enable}, > {0x8086, 0x2580, 0x103c, 0x2a08, 0x8086, 0x2640, 0x103c, 0x2a0a, NULL, NULL, NULL, "HP", "Puffer2-UL8E", 0, OK, intel_ich_gpio18_raise}, > -- > 1.7.2.3 > >

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Re: [flashrom] [PATCH] Add coreboot IDs to make manual selection of HP xw9400 possible
by Carl-Daniel Hailfinger 06 Mar '11

06 Mar '11

[stripped all people from CC, because it is unlikely they are still interested] Auf 02.06.2010 09:08, Michael Karcher schrieb: > you experience problems trying to flash back to the HP BIOS, because with > the original Tyan BIOS, flashrom is unable to detect you have the HP OEM > version of the board. This is why flashrom does not remove write protection > anymore. The attached patch adds a coreboot ID for the HP xw9400 board, which > makes it possible to tell flashrom you are on an xw9400 from the command line. > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH] Add W39L040
by Carl-Daniel Hailfinger 06 Mar '11

06 Mar '11

Hi Ivan, did you try Michael's patch? Auf 17.12.2010 01:14, Michael Karcher schrieb: > this patch should add support for the W39L040 chip to flashrom. Please > try it on your hardware. If you can't compile flashrom yourself, ask > on the mailing list or our IRC channel (#flashrom on freenode). > Michael, if you add a signoff, this is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH] Add support for "ST M25PX16" chip.
by Carl Worth 06 Mar '11

06 Mar '11

This was created by simply copying the M25PX32 block and verifying with the M25PX16 datasheet which values needed to be changed. (The only changes are the model_id and the 4 size-related fields). Also, this commit sets the new M25PX16 as having write support tested, (where the M25PX32 does not). This is after running successful write and verify operations to 4 different M25PX16 chips with a Dediprog SF100. Signed-off-by: Carl Worth <carl.d.worth(a)intel.com> --- flashchips.c | 29 +++++++++++++++++++++++++++++ flashchips.h | 1 + 2 files changed, 30 insertions(+), 0 deletions(-) diff --git a/flashchips.c b/flashchips.c index e7a2223..0b84ae1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6269,6 +6269,35 @@ struct flashchip flashchips[] = { { .vendor = "ST", + .name = "M25PX16", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ST_ID, + .model_id = ST_M25PX16, + .total_size = 2048, + .page_size = 256, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 512 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "ST", .name = "M25PX32", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ST_ID, diff --git a/flashchips.h b/flashchips.h index 6504edf..bbdb5ae 100644 --- a/flashchips.h +++ b/flashchips.h @@ -531,6 +531,7 @@ #define ST_M25P32 0x2016 #define ST_M25P64 0x2017 #define ST_M25P128 0x2018 +#define ST_M25PX16 0x7115 #define ST_M25PX32 0x7116 #define ST_M25PX64 0x7117 #define ST_M25PE10 0x8011 -- 1.7.2.3

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[commit] r1270 - trunk
by repository service 06 Mar '11

06 Mar '11

Author: hailfinger Date: Sun Mar 6 19:45:40 2011 New Revision: 1270 URL: http://flashrom.org/trac/flashrom/changeset/1270 Log: Add support for ST M25PX16 and mark it as supported. Tests were performed with write and verify operations to 4 different M25PX16 chips with a Dediprog SF100. Signed-off-by: Carl Worth <carl.d.worth(a)intel.com> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Mar 6 19:31:11 2011 (r1269) +++ trunk/flashchips.c Sun Mar 6 19:45:40 2011 (r1270) @@ -6516,6 +6516,35 @@ { .vendor = "ST", + .name = "M25PX16", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ST_ID, + .model_id = ST_M25PX16, + .total_size = 2048, + .page_size = 256, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 512 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "ST", .name = "M25PX32", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ST_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Mar 6 19:31:11 2011 (r1269) +++ trunk/flashchips.h Sun Mar 6 19:45:40 2011 (r1270) @@ -533,6 +533,7 @@ #define ST_M25P32 0x2016 #define ST_M25P64 0x2017 #define ST_M25P128 0x2018 +#define ST_M25PX16 0x7115 #define ST_M25PX32 0x7116 #define ST_M25PX64 0x7117 #define ST_M25PE10 0x8011

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SST49LF080A fully tested and EVGA nForce 780i board supported
by Brandon Dowdy 06 Mar '11

06 Mar '11

This patch marks this chip as fully tested and the nForce 780i mainboard as supported. Signed-off-by: Brandon Dowdy <brandonrd7(a)gmail.com>

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[commit] r1269 - trunk
by repository service 06 Mar '11

06 Mar '11

Author: hailfinger Date: Sun Mar 6 19:31:11 2011 New Revision: 1269 URL: http://flashrom.org/trac/flashrom/changeset/1269 Log: Mark SST49LF080A as fully tested. Mark EVGA nForce 780i board as supported. Full logs are here: http://www.flashrom.org/pipermail/flashrom/2011-January/005779.html Signed-off-by: Brandon Dowdy <brandonrd7(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c trunk/print.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Mar 6 18:58:05 2011 (r1268) +++ trunk/flashchips.c Sun Mar 6 19:31:11 2011 (r1269) @@ -6144,7 +6144,7 @@ .total_size = 1024, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = TIMING_FIXME, .block_erasers = Modified: trunk/print.c ============================================================================== --- trunk/print.c Sun Mar 6 18:58:05 2011 (r1268) +++ trunk/print.c Sun Mar 6 19:31:11 2011 (r1269) @@ -463,6 +463,7 @@ B("EPoX", "EP-8NPA7I", 1, "http://epox.com/product.asp?ID=EP-8NPA7I", NULL), B("EPoX", "EP-8RDA3+", 1, "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL), B("EPoX", "EP-BX3", 1, "http://www.epox.com/product.asp?ID=EP-BX3", NULL), + B("EVGA", "132-CK-NF78", 1, "http://http://www.evga.com/articles/385.asp", NULL), B("FIC", "VA-502", 0, "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."), B("Foxconn", "A6VMX", 1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=…", NULL), B("Fujitsu-Siemens", "ESPRIMO P5915", 1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRI…", "Mainboard model is D2312-A2."),

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Add NSC PC87364 support to superiotool
by Michael Karcher 06 Mar '11

06 Mar '11

Hello jankeso, in the process of writing a board enable procedure for your mainboard I stumbled upon the fact that the chip used to control the write enable line is most likely your Super I/O chip, which is a NSC PC87364. superiotool currently does not support dumping that chip, so I can not verify that indeed the GPIO port of the Super I/O chip is accessed (at address 0x80C). I attached a patch to dump the contents of that chip to this mail. Please apply that patch to current superiotool CVS sources (to be obtained from svn://coreboot.org/repos/trunk/util/superiotool) and attach the output to a reply to this mail or upload to paste.flashrom.org. This mail has been cc'ed to the coreboot list for getting this patch included into superiotool. If something is wrong with that patch, please Cc: me, as I am not subscribed to the coreboot list. Thanks. Regards, Michael Karcher

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