Hi,
as the topic reflects flashrom 0.9.6.1+r1563-1 was unable to flash my
Gigabyte Z87m-d3h.
Much thanks goes to Carldani on IRC for helping me get my board back to
a bootable state.
It would be great if the upcoming LTS of Ubuntu, Trusty 14.04 can be
upgraded since these boards are common and should be supported out of
the box.
A great IRC community and my thanks go out to you all for the work that
goes in to maintaining and updating Flashrom.
For me, being blind and using text to speech I …
[View More]use this tool, I also
recommend Flashrom to vinuxproject.org users that are also blind and
want an accessible method to flash their chips.
Thank you
Kind regards
Rob Whyte
http://www.launchpad.net/~fudge
[View Less]
(note I'm not subscribed to the list)
This patch adds support for the ASUS A7V8X-MX motherboard.
Before, despite being mentionned as supported on
http://flashrom.org/Supported_hardware , flashrom failed to detect the
flash chip:
http://paste.flashrom.org/view.php?id=2041
After, the flash chip is detected:
http://paste.flashrom.org/view.php?id=2044
It seems the trick is the same as for the MX-SE variant, which is
already in.
I didn't try flashing as the only other chip I have doesn't …
[View More]seem to be
detected, probably because of incompatible pinout due to it being
LPC/FWH instead of parallel.
François.
[View Less]
I recently found a need to re-flash the option ROM on an Intel 82574L gigabit
ethernet card. These are a bit more common these days than the 82571 and 82572
and relatively cheap. It turns out this works with flashrom, but it doesn't
detect the PCI ID for the device out of the box. Below is a patch add it to
nicintel_spi.c. Note that there are probably other devices in the PRO/1000
family that would work too.
Here's an example run with the latest code from svn:
[...]
flashrom v0.9.7-…
[View More]unknown on FreeBSD 10.0-RELEASE (amd64)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Winbond flash chip "W25X40" (512 kB, SPI) on nicintel_spi.
Reading old flash chip contents... done.
Erasing and writing flash chip... Erase/write done.
Verifying flash... VERIFIED.
[...]
FreeBSD detects the device as follows:
em1@pci0:2:0:0: class=0x020000 card=0xa01f8086 chip=0x10d38086 rev=0x00
hdr=0x00
vendor = 'Intel Corporation'
device = '82574L Gigabit Network Connection'
class = network
subclass = ethernet
I also added links to the Intel PCIe ethernet controllers programming manual
and the 82574 datasheet.
Incidentally, thanks to everyone involved for their work in this project. It
helped me out of a bit of a jam.
-Bill
Signed-off-by: Bill Paul <wpaul(a)windriver.com>
Index: nicintel_spi.c
===================================================================
--- nicintel_spi.c (revision 1765)
+++ nicintel_spi.c (working copy)
@@ -17,14 +17,20 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/*
- * Datasheet:
+ * Datasheets:
* PCI/PCI-X Family of Gigabit Ethernet Controllers Software Developer's
Manual
* 82540EP/EM, 82541xx, 82544GC/EI, 82545GM/EM, 82546GB/EB, and 82547xx
* http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf
+ *
+ * PCIe GbE Controllers Open Source Software Developer's Manual
+ * http://www.intel.com/content/www/us/en/ethernet-controllers/pcie-gbe-
controllers-open-source-manual.html
+ *
+ * Intel 82574 Gigabit Ethernet Controller Family Datasheet
+ * http://www.intel.com/content/www/us/en/ethernet-controllers/82574l-gbe-
controller-datasheet.html
*/
#include <stdlib.h>
#include <unistd.h>
#include "flash.h"
@@ -70,10 +76,11 @@
const struct dev_entry nics_intel_spi[] = {
{PCI_VENDOR_ID_INTEL, 0x105e, OK, "Intel", "82571EB Gigabit Ethernet
Controller"},
{PCI_VENDOR_ID_INTEL, 0x1076, OK, "Intel", "82541GI Gigabit Ethernet
Controller"},
{PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet
Controller"},
{PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet
Controller"},
+ {PCI_VENDOR_ID_INTEL, 0x10d3, OK, "Intel", "82574L Gigabit Ethernet
Controller"},
{0},
};
static void nicintel_request_spibus(void)
--
=============================================================================
-Bill Paul (510) 749-2329 | Senior Member of Technical Staff,
wpaul(a)windriver.com | Master of Unix-Fu - Wind River Systems
=============================================================================
"I put a dollar in a change machine. Nothing changed." - George Carlin
=============================================================================
[View Less]
I recently found a need to re-flash the option ROM on an Intel 82574L gigabit
ethernet card. These are a bit more common these days than the 82571 and 82572
and relatively cheap. It turns out this works with flashrom, but it doesn't
detect the PCI ID for the device out of the box.
Attached is a patch add it to nicintel_spi.c. Note that there are probably
other devices in the PRO/1000 family that would work too.
Here's an example run with the latest code from svn:
[...]
flashrom v0.9.7-…
[View More]unknown on FreeBSD 10.0-RELEASE (amd64)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Winbond flash chip "W25X40" (512 kB, SPI) on nicintel_spi.
Reading old flash chip contents... done.
Erasing and writing flash chip... Erase/write done.
Verifying flash... VERIFIED.
[...]
FreeBSD detects the device as follows:
em1@pci0:2:0:0: class=0x020000 card=0xa01f8086 chip=0x10d38086 rev=0x00
hdr=0x00
vendor = 'Intel Corporation'
device = '82574L Gigabit Network Connection'
class = network
subclass = ethernet
I also added links to the Intel PCIe ethernet controllers programming manual
and the 82574 datasheet.
Incidentally, thanks to everyone involved for their work in this project. It
helped me out of a bit of a jam.
-Bill
--
=============================================================================
-Bill Paul (510) 749-2329 | Senior Member of Technical Staff,
wpaul(a)windriver.com | Master of Unix-Fu - Wind River Systems
=============================================================================
"I put a dollar in a change machine. Nothing changed." - George Carlin
=============================================================================
[View Less]
spi_read_status_register() is used in open-coded loops everywhere just
to check if SPI_SR_WIP bit cleared. The logic is missing a timeout
detection, and we can save quite a lot of code by introducing a function
which waits until SPI_SR_WIP is cleared or a timeout is reached.
Untested. May explode.
Unfinished. More functions need to be converted to the new style.
Will change behaviour if the chip is too slow or hangs. Should prevent
flashrom from hanging without any visible output.
Signed-off-…
[View More]by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Index: flashrom-spi_rdsr_refactor/spi25.c
===================================================================
--- flashrom-spi_rdsr_refactor/spi25.c (Revision 1653)
+++ flashrom-spi_rdsr_refactor/spi25.c (Arbeitskopie)
@@ -328,14 +328,9 @@
__func__);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 1-85 s, so wait in 1 s steps.
- */
- /* FIXME: We assume spi_read_status_register will never fail. */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(1000 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 120 * 1000 * 1000, JEDEC_CE_60);
+ return result;
}
int spi_chip_erase_62(struct flashctx *flash)
@@ -365,14 +360,9 @@
__func__);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 2-5 s, so wait in 100 ms steps.
- */
- /* FIXME: We assume spi_read_status_register will never fail. */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(100 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 120 * 1000 * 1000, JEDEC_CE_62);
+ return result;
}
int spi_chip_erase_c7(struct flashctx *flash)
@@ -401,14 +391,9 @@
msg_cerr("%s failed during command execution\n", __func__);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 1-85 s, so wait in 1 s steps.
- */
- /* FIXME: We assume spi_read_status_register will never fail. */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(1000 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 120 * 1000 * 1000, JEDEC_CE_C7);
+ return result;
}
int spi_block_erase_52(struct flashctx *flash, unsigned int addr,
@@ -444,13 +429,9 @@
__func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 100-4000 ms, so wait in 100 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(100 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_52);
+ return result;
}
/* Block size is usually
@@ -491,13 +472,9 @@
__func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 100-4000 ms, so wait in 100 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(100 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_D8);
+ return result;
}
/* Block size is usually
@@ -536,13 +513,9 @@
__func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 100-4000 ms, so wait in 100 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(100 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_D7);
+ return result;
}
/* Sector size is usually 4k, though Macronix eliteflash has 64k */
@@ -579,13 +552,9 @@
__func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 15-800 ms, so wait in 10 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(10 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_SE);
+ return result;
}
int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
@@ -619,13 +588,9 @@
msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 10 ms, so wait in 1 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(1 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_50);
+ return result;
}
int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
@@ -659,13 +624,9 @@
msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 8 ms, so wait in 1 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(1 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_81);
+ return result;
}
int spi_block_erase_60(struct flashctx *flash, unsigned int addr,
Index: flashrom-spi_rdsr_refactor/spi25_statusreg.c
===================================================================
--- flashrom-spi_rdsr_refactor/spi25_statusreg.c (Revision 1653)
+++ flashrom-spi_rdsr_refactor/spi25_statusreg.c (Arbeitskopie)
@@ -43,7 +43,6 @@
static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode)
{
int result;
- int i = 0;
/*
* WRSR requires either EWSR or WREN depending on chip type.
* The code below relies on the fact hat EWSR and WREN have the same
@@ -78,17 +77,10 @@
/* WRSR performs a self-timed erase before the changes take effect.
* This may take 50-85 ms in most cases, and some chips apparently
* allow running RDSR only once. Therefore pick an initial delay of
- * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
+ * 100 ms, then wait until a total of 5 s have elapsed.
*/
programmer_delay(100 * 1000);
- while (spi_read_status_register(flash) & SPI_SR_WIP) {
- if (++i > 490) {
- msg_cerr("Error: WIP bit after WRSR never cleared\n");
- return TIMEOUT_ERROR;
- }
- programmer_delay(10 * 1000);
- }
- return 0;
+ return spi_wait_status_register_ready(flash, 4900 * 1000, JEDEC_WRSR);
}
int spi_write_status_register(struct flashctx *flash, int status)
@@ -108,6 +100,28 @@
return ret;
}
+/* timeout is specified in usecs. */
+int spi_wait_status_register_ready(struct flashctx *flash, int timeout, uint8_t opcode)
+{
+ /* At least 1 usec between iterations. */
+ int single_delay = (timeout / 100) ? : 1;
+ int elapsed = 0;
+ int halftime = 0;
+
+ while (spi_read_status_register(flash) & SPI_SR_WIP) {
+ elapsed += single_delay;
+ if ((elapsed > timeout / 2) && !halftime) {
+ msg_cdbg("Debug: WIP bit after %02x didn't clear within %i us.\n", opcode, timeout/2);
+ }
+ if (elapsed >= timeout) {
+ msg_cerr("Error: WIP bit after %02x didn't clear within %i us.\n", opcode, timeout);
+ return TIMEOUT_ERROR;
+ }
+ programmer_delay(single_delay);
+ }
+ return 0;
+}
+
uint8_t spi_read_status_register(struct flashctx *flash)
{
static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
Index: flashrom-spi_rdsr_refactor/chipdrivers.h
===================================================================
--- flashrom-spi_rdsr_refactor/chipdrivers.h (Revision 1653)
+++ flashrom-spi_rdsr_refactor/chipdrivers.h (Arbeitskopie)
@@ -60,6 +60,7 @@
/* spi25_statusreg.c */
uint8_t spi_read_status_register(struct flashctx *flash);
+int spi_wait_status_register_ready(struct flashctx *flash, int timeout, uint8_t opcode);
int spi_write_status_register(struct flashctx *flash, int status);
int spi_prettyprint_status_register_plain(struct flashctx *flash);
int spi_prettyprint_status_register_default_bp1(struct flashctx *flash);
--
http://www.hailfinger.org/
[View Less]
Hi
I'm correctly flashing my motherboard ASUS M3N-H/HDMI for upgrading to a
new official ASUS BIOS under Kubuntu 13.10.
I join a tar.gz file with all results of manipulations how it's ask by this
software.
Thank's for your great Jobs guy
Sincerely
Franc SERRES
--
Que l'Open source soit avec toi.
Utilise l'Open source Luc...
A non-text attachment has been stripped: FlashBIOS_ASUS_M3N-H⁄HDMI.tar.gz
It is available at http://paste.flashrom.org/view.php?id=2039
Hi Carl,
i found dediprog_spi_send_command in dediprog.c, after below action:
ret = usb_control_msg(dediprog_handle, 0xc2, 0x01, 0xbb8, 0x0000,
(char *)readarr, readcnt, DEFAULT_TIMEOUT);
readarr will become 0x534631 ("SF1"), even i didn't put a ROM on my SF100.
i have no idea about this usb device request, the meaning of wValue 0xbb8
to dediprog device
hope this info help for debug, thanks.
BR,
Kurt
2014-03-05 8:35 GMT+08:00 Kurt Qiao <kurtqqh(a)gmail.com>:
…
[View More]> resent loop flashrom.org
>
> Hi Carl,
>
> Thanks for reply.
> 1. i update SF100 fm to v5.5.0, need to support windows8
> 2. here's my libusb dpkg info
> ii libusb-0.1-4 2:0.1.12-20 userspace USB programming library
> ii libusb-1.0-0 2:1.0.9~rc3-2u userspace USB programming library
> ii libusb-dev 2:0.1.12-20 userspace USB programming library
> developmen
>
> BR,
> Kurt
>
>
> 2014-03-05 8:33 GMT+08:00 Kurt Qiao <kurtqqh(a)gmail.com>:
>
> Hi Carl,
>>
>> Thanks for reply.
>> 1. i update SF100 fm to v5.5.0, need to support windows8
>> 2. here's my libusb dpkg info
>> ii libusb-0.1-4 2:0.1.12-20 userspace USB programming library
>> ii libusb-1.0-0 2:1.0.9~rc3-2u userspace USB programming library
>> ii libusb-dev 2:0.1.12-20 userspace USB programming library
>> developmen
>>
>> BR,
>> Kurt
>>
>>
>> 2014-03-05 8:14 GMT+08:00 Carl-Daniel Hailfinger <
>> c-d.hailfinger.devel.2006(a)gmx.net>:
>>
>> Hi Kurt,
>>>
>>> Am 24.02.2014 09:29 schrieb Kurt Qiao:
>>> > hope anyone can help me out, i try to implement flashrom to support
>>> > dediprog SF100 on my Ubuntu. config as below:
>>> > OS: Ubuntu12.04 X64
>>> > Dediprog: SF100, fm ver: 5.5.0
>>>
>>> We only have tested flashrom support with SF100 firmware versions from
>>> 2.0 to 5.2. It should work with firmware version 5.5, but we have not
>>> tested it.
>>>
>>>
>>> > SPI ROM: winbond W25Q64FW, id 0xef 6017
>>> >
>>> > plugging my SF100, and use below cmd
>>> > flashrom -p dediprog -V
>>> > i can see the program detect my sf100 but fail to detect the SPI
>>> ROM. log
>>> > as attached file.
>>> > ---log----
>>> > Probing for Winbond W25Q64.V, 8192 kB: RDID byte 0 parity violation.
>>> > probe_spi_rdid_generic: id1 0x53, id2 0x4631
>>> > ----log---
>>> >
>>> > as the log shows, seems flashrom read SPI ROM id is 0x53, 0x4631,
>>> but
>>> > actually my SPI ROM on board is winbond with id 0xef, 0x6017(i confirm
>>> this
>>> > with windows dediprog).
>>> > so i have no idea why flashrom detect wrong id, and the flashchips.h
>>> > already have WINBOND_NEX_W25Q64_W 0x6017 support.
>>>
>>> 0x53 0x46 0x31 is the string "SF1". This string is returned by the SF100
>>> if we query the firmware version.
>>> I think we have a bug in the dediprog firmware or in the dediprog driver
>>> or in libusb. Which version of libusb are you using?
>>>
>>> Regards,
>>> Carl-Daniel
>>>
>>> --
>>> http://www.hailfinger.org/
>>>
>>>
>>
>
[View Less]
resent loop flashrom.org
Hi Carl,
Thanks for reply.
1. i update SF100 fm to v5.5.0, need to support windows8
2. here's my libusb dpkg info
ii libusb-0.1-4 2:0.1.12-20 userspace USB programming library
ii libusb-1.0-0 2:1.0.9~rc3-2u userspace USB programming library
ii libusb-dev 2:0.1.12-20 userspace USB programming library
developmen
BR,
Kurt
2014-03-05 8:33 GMT+08:00 Kurt Qiao <kurtqqh(a)gmail.com>:
> Hi Carl,
>
> Thanks for reply.
> 1. i update …
[View More]SF100 fm to v5.5.0, need to support windows8
> 2. here's my libusb dpkg info
> ii libusb-0.1-4 2:0.1.12-20 userspace USB programming library
> ii libusb-1.0-0 2:1.0.9~rc3-2u userspace USB programming library
> ii libusb-dev 2:0.1.12-20 userspace USB programming library
> developmen
>
> BR,
> Kurt
>
>
> 2014-03-05 8:14 GMT+08:00 Carl-Daniel Hailfinger <
> c-d.hailfinger.devel.2006(a)gmx.net>:
>
> Hi Kurt,
>>
>> Am 24.02.2014 09:29 schrieb Kurt Qiao:
>> > hope anyone can help me out, i try to implement flashrom to support
>> > dediprog SF100 on my Ubuntu. config as below:
>> > OS: Ubuntu12.04 X64
>> > Dediprog: SF100, fm ver: 5.5.0
>>
>> We only have tested flashrom support with SF100 firmware versions from
>> 2.0 to 5.2. It should work with firmware version 5.5, but we have not
>> tested it.
>>
>>
>> > SPI ROM: winbond W25Q64FW, id 0xef 6017
>> >
>> > plugging my SF100, and use below cmd
>> > flashrom -p dediprog -V
>> > i can see the program detect my sf100 but fail to detect the SPI ROM.
>> log
>> > as attached file.
>> > ---log----
>> > Probing for Winbond W25Q64.V, 8192 kB: RDID byte 0 parity violation.
>> > probe_spi_rdid_generic: id1 0x53, id2 0x4631
>> > ----log---
>> >
>> > as the log shows, seems flashrom read SPI ROM id is 0x53, 0x4631, but
>> > actually my SPI ROM on board is winbond with id 0xef, 0x6017(i confirm
>> this
>> > with windows dediprog).
>> > so i have no idea why flashrom detect wrong id, and the flashchips.h
>> > already have WINBOND_NEX_W25Q64_W 0x6017 support.
>>
>> 0x53 0x46 0x31 is the string "SF1". This string is returned by the SF100
>> if we query the firmware version.
>> I think we have a bug in the dediprog firmware or in the dediprog driver
>> or in libusb. Which version of libusb are you using?
>>
>> Regards,
>> Carl-Daniel
>>
>> --
>> http://www.hailfinger.org/
>>
>>
>
[View Less]