flashrom

flashrom@flashrom.org

6 participants
9186 discussions

Start a nNew thread

NVIDIA MCP73
by Koen Rousseau 22 Mar '14

22 Mar '14

Reading, writing an verifying the BIOS on my old Acer Aspire M5640 PC's motherboard worked like a charm. Many thanks!

1 0

SuperMicro H8QME2 motherboards work great with Flashrom
by Greg Tippitt 21 Mar '14

21 Mar '14

On the hardware section of the wiki the SuperMicro H8QME2 was not mentioned, but several others from SM were supported. I needed to upgrade the BIOS on my motherboard before I could upgrade from dual core to hex core Opteron CPUs. It worked dead simple. I tried to do the -z option to send in, but it said that option wasn't compiled for. Thanks for a great program Greg Tippitt

1 0

W836xx: Foxconn nT435/nT535: flashrom -V
by Matt Keys 20 Mar '14

20 Mar '14

Hello, I was looking into coreboot compatibility with my nettop and noticed within the flashrom output (full log attached) : " Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. " You'll find the requested output of flashrom -V below. Regards, Matt ------ root@nettop:~# flashrom -V flashrom v0.9.6.1-r1563 on Linux 3.11.0-18-generic (x86_64) flashrom is free … [View More]

1 0

Re: [flashrom] Intel S5000PAL: Flash Not Found
by Sean Everson 19 Mar '14

19 Mar '14

All, I have a number of Intel S5000PAL motherboards that I would like to use FLASHROM to manage if at all possible. According to the Intel Docs at: http://download.intel.com/support/motherboards/server/s5000pal/sb/s5000pal_… The motherboard has the 6321ESB chipset which is listed as supported on the flashrom.org wiki page. When I try to use FLASHROM to read the flash I get an error message that the flash is not found. Can someone provide me with some guidance on what additional … [View More]information or steps I can take to investigate this further? I have pasted the flashrom -V output here: http://pastebin.com/Rr24eXa5 Thanks for your help! --Sean On Wed, Mar 19, 2014 at 12:18 PM, Sean Everson <sean.everson(a)gmail.com> wrote: > All, > > > I have a number of Intel S5000PAL motherboards that I would like to use > FLASHROM to manage if at all possible. According to the Intel Docs at: > > > http://download.intel.com/support/motherboards/server/s5000pal/sb/s5000pal_… > > > The box contains the 6321ESB chipset which is listed as supported on the > flashrom.org wiki page. > > > When I try to use FLASHROM to read the flash I get an error message that the > flash is not found. Can someone provide me with some guidance on what > additional information or steps I can take to investigate this further? > > > I am including the output from flashrom -V below. > > > Thanks for your help! > > > --Sean > > > > # ./flashrom -V -p internal -r /tmp/bios.bin > > flashrom v0.9.7-r1764 on Linux 2.6.32.24 (x86_64) > > flashrom is free software, get the source code at http://www.flashrom.org > > > flashrom was built with libpci 3.2.1, GCC 4.7.1, little endian > > Command line (5 args): ./flashrom -V -p internal -r /tmp/bios.bin > > Calibrating delay loop... OS timer resolution is 1 usecs, 2824M loops per > second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = > 10025 us, 4 myus = 4 us, OK. > > Initializing internal programmer > > No coreboot table found. > > Using Internal DMI decoder. > > DMI string chassis-type: "Rack Mount Chassis" > > DMI string system-manufacturer: "Intel" > > DMI string system-product-name: "T5000PAL" > > DMI string system-version: "Not Specified" > > DMI string baseboard-manufacturer: "Intel" > > DMI string baseboard-product-name: "T5000PAL0 " > > DMI string baseboard-version: "FRU Ver 0.05" > > W836xx enter config mode worked or we were already in config mode. W836xx > leave config mode had no effect. > > Active config mode, unknown reg 0x20 ID: f2. > > Please send the output of "flashrom -V" to > > flashrom(a)flashrom.org with W836xx: your board name: flashrom -V > > as the subject to help us finish support for your Super I/O. Thanks. > > Found chipset "Intel 631xESB/632xESB/3100" with PCI ID 8086:2670. Enabling > flash write... > > 0xfff80000/0xffb80000 FWH IDSEL: 0x0 > > 0xfff00000/0xffb00000 FWH IDSEL: 0x0 > > 0xffe80000/0xffa80000 FWH IDSEL: 0x0 > > 0xffe00000/0xffa00000 FWH IDSEL: 0x0 > > 0xffd80000/0xff980000 FWH IDSEL: 0x0 > > 0xffd00000/0xff900000 FWH IDSEL: 0x0 > > 0xffc80000/0xff880000 FWH IDSEL: 0x0 > > 0xffc00000/0xff800000 FWH IDSEL: 0x0 > > 0xff700000/0xff300000 FWH IDSEL: 0x4 > > 0xff600000/0xff200000 FWH IDSEL: 0x5 > > 0xff500000/0xff100000 FWH IDSEL: 0x6 > > 0xff400000/0xff000000 FWH IDSEL: 0x7 > > 0xfff80000/0xffb80000 FWH decode enabled > > 0xfff00000/0xffb00000 FWH decode enabled > > 0xffe80000/0xffa80000 FWH decode enabled > > 0xffe00000/0xffa00000 FWH decode enabled > > 0xffd80000/0xff980000 FWH decode enabled > > 0xffd00000/0xff900000 FWH decode enabled > > 0xffc80000/0xff880000 FWH decode enabled > > 0xffc00000/0xff800000 FWH decode enabled > > 0xff700000/0xff300000 FWH decode disabled > > 0xff600000/0xff200000 FWH decode disabled > > 0xff500000/0xff100000 FWH decode disabled > > 0xff400000/0xff000000 FWH decode disabled > > Maximum FWH chip size: 0x400000 bytesSPI Read Configuration: prefetching > disabled, caching enabled, > > BIOS_CNTL = 0x03: BIOS Lock Enable: enabled, BIOS Write Enable: enabled > > Warning: Setting Bios Control at 0xdc from 0x02 to 0x01 failed. > > New value is 0x03. > > OK. > > The following protocols are supported: FWH. > > Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 > is normal flash content, id2 is normal flash content > > Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 is > normal flash content, id2 is normal flash content > > Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > > Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, > id1 is normal flash content, id2 is normal flash content > > Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x9b, id2 0x0c, > id1 is normal flash content, id2 is normal flash content > > Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > > Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2 > 0xd0, id1 is normal flash content, id2 is normal flash content > > Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 > 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash > content > > Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x9b, id2 > 0x0c, id1 is normal flash content, id2 is normal flash content > > Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 > is normal flash content, id2 is normal flash content > > Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xc9, id2 > 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash > content > > Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > > Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x00, id2 0x00, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > > Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 is > normal flash content, id2 is normal flash content > > Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 is > normal flash content, id2 is normal flash content > > Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > > Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > > Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is > normal flash content, id2 is normal flash content > > Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x00, id2 0x00, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > > Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 is > normal flash content, id2 is normal flash content > > Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 > parity violation, id1 is normal flash content, id2 is normal flash content > > Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x9b, id2 > 0x0c, id1 is normal flash content, id2 is normal flash content > > Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x9b, id2 > 0x0c, id1 is normal flash content, id2 is normal flash content > > Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x9b, id2 > 0x0c, id1 is normal flash content, id2 is normal flash content > > Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2 > 0xd0, id1 is normal flash content, id2 is normal flash content > > Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xc9, id2 > 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash > content > > Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 > 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash content > > No EEPROM/flash device found. > > Note: flashrom can never write if the flash chip isn't found automatically. > > Restoring PCI config space for 00:1f:0 reg 0xdc > > [View Less]

1 0

Re: [flashrom] GSoC-2014 Flashrom project "Locking and unlocking of access protections of flash chips"
by David Hendricks 19 Mar '14

19 Mar '14

On Wed, Mar 19, 2014 at 5:58 AM, Allen Yan <lexkde(a)gmail.com> wrote: > Hi, David, > I was reading flashrom code base following the internal programmer > way. I also read mail > "http://www.flashrom.org/pipermail/flashrom/2013-March/010704.html" > and checked the Ibex peak datasheet about ME firmware. Here are some > questions: > about "Locking and unlocking of access protections of flash chips" > 1 which mechanism locks the flash?a software way or a … [View More]hardware way > by the programmer. As in the Atmel AT25DL161, the protection ways are > "hardware protection, using WP pin", "Sector lockdown with permanent > freeze option", "individual sector protection with global > protect/unprotect feature". > All of the above :-) You will need to determine: - Which write-protection scheme is in place? Is it intended to prevent erroneous software from writing to the flash, or is it intended to prevent any re-writing of the flash? - Can it be disabled / worked around so that content can be updated? - How to restore the settings when you are finished. > 2 Does this problem concerns the ME firmware issue. > Yes. > 3 How to do the test? Is the test at specific mainboard and flash chip > enough? > IIRC Flashrom already tests for motherboards which are known to require a workaround, for example if a GPIO must be inverted in order to de-assert /WP. board_enable.c has many of these tests. It also knows about block protect bits in SPI ROMs. I think the main issue with modern systems (Intel in particular) is the management engine. > 4 How to value the work at last as stefan mentioned in the suggestion? > > > Actually, a little frustrating after I saw stefanct's mail. > It's very valuable :-) I put some effort into this functionality for ChromeOS, since handling write-protection is a requirement for Chromebooks. Here are some examples: Skip regions locked via flash descriptor for Intel platforms: https://chromium.googlesource.com/chromiumos/third_party/flashrom/+/1ed1d35… writeprotect.c, which contains block protect mapping for several flash chips: https://chromium.googlesource.com/chromiumos/third_party/flashrom/+/master/… Unfortunately we never reached a consensus regarding how to port this code to upstream. It would be nice if somebody like you can help to re-factor this code so that it can be accepted upstream. > On 3/18/14, Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > > On Mon, 17 Mar 2014 09:56:43 +0800 > > 严进一 <lexkde(a)gmail.com> wrote: > > > >> Hi, > >> I am Jinyi Yan , a second year PhD candidate from Shanghai Institute of > >> Micro-system and Information Technology, Chinese Academy of Sciences. I > >> used to be a mainboard BIOS engineer in ASUS Technology Suzhou Co., Ltd > >> for about two years (2007.7~2009.2). My major now is optoelectronics. > But > >> I have a lot of fun while programming, in my heart the working > experience > >> of being a BIOS engineer is still very exciting. > >> I think GsoC is a nice platform for me to participate the open source > >> community. When I search the GsoC projects and organizations, the > coreboot > >> and flashrom projects are definitely the right choices for me. I have a > >> spare ASUS P5KPL PC at my hand, but the chipset is not in the support > list > >> of coreboot project. So I consider the flashrom project is the better > >> choice. I also have a home-made flash programmer based on uspasp. > >> I'd like to choose “Locking and unlocking of access protections of flash > >> chips” for GSoC 2014. > >> Now I'm not very familiar with the program structure of flashrom, so I > >> expect your guidence and hope to contribute for flashrom and coreboot > even > >> if my application is not accpeted. > >> Thanks! Look forward to your kind advice! > > > > Hello Jinyi, > > > > thanks for your interest in flashrom. I have been the most active > > flashrom developer in the last years and would probably be responsible > > to integrate your work and answer questions if you get stuck. I agree > > that the coreboot-related projects are probably the best choice for you > > (there are not many low-level projects participating sadly... that's > > how I ended up here too ;). I also have to admit that the P5KPL is > > probably not very helpful AFAICT. But I don't think that this is a show > > stopper regarding coreboot (or seabios) projects and that your skills > > and insights obtained at ASUS regarding x86 might be more useful in a > > non-flashrom project. Also, the project you chose requires to > > understand two code bases ("ours" and that maintained by google/ > > chromiumos ppl) and interact with two communities and persuade at least > > one of them that your solution is sound and profitable. On the other > > hand, I am biased because I will apply for a flashrom GSoC project > > myself probably. ;) > > The code bases have a very similar core so that should not be a big > > issue at all. Producing something that will be praised by everyone on > > the other hand is really hard. The vanilla flashrom community is > > traditionally very (very) picky regarding changes, especially user > > interface changes. This is also the reason why there is a chromiumos > > fork of flashrom... > > > > I have talked to David (dhendrix) and he is willing to mentor you this > > year. If you want to pursue this project (and the patch you sent seems > > to indicate that ;) I suggest you talk to him directly about details > > of the assignment (here or on IRC). > > > > Adding new flash chips as you have done is a very good first step to > > get to know flashrom a bit better. The fun begins with the awkward > > models though :) > > I suggest you test flashrom on any hardware available to you (including > > network cards for example)... there is always room for improvement and > > learning a foreign code base is always easier when on has a specific > > goal to reach. > > -- > > Kind regards/Mit freundlichen Grüßen, Stefan Tauner > > > > _______________________________________________ > > flashrom mailing list > > flashrom(a)flashrom.org > > http://www.flashrom.org/mailman/listinfo/flashrom > -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc. [View Less]

1 0

FAILED: PCENGINES APU
by markus 19 Mar '14

19 Mar '14

C:\>flashrom -p internal:laptop=this_is_not_a_laptop -c MX25L1605A/MX25L1606E -w APUBIO.ROM flashrom v0.9.6.1-r1705 on FreeDOS 7 (i786) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... delay loop is unreliable, trying to continue OK. pcilib: Bus 00 seen twice (firmware bug). Ignored. coreboot table found at 0x7e17cc00. Bad command or filename - "dmidecode". Bad command or filename - "dmidecode". Bad command or filename - "dmidecode". Bad … [View More]command or filename - "dmidecode". Bad command or filename - "dmidecode". Bad command or filename - "dmidecode". Bad command or filename - "dmidecode". ======================================================================== WARNING! You may be running flashrom on an unsupported laptop. We could not detect this for sure because your vendor has not setup the SMBIOS tables correctly. You can enforce execution by adding '-p internal:laptop=this_is_not_a_laptop' to the command line, but please read the following warning if you are not sure. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Proceeding anyway because user forced us to. Found chipset "AMD SB7x0/SB8x0/SB9x0". Enabling flash write... OK. Found Macronix flash chip "MX25L1605A/MX25L1606E" (2048 kB, SPI) at physical address 0xffe00000. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... FAILED at 0x00000000! Expected=0x4c, Found=0xcc, failed byte count from 0x00000000-0x001fffff: 0xe2a0 Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! -- Best regards, Markus Better Privacy with PGP encrypted Mail: http://activezone.de/pgp/ Fingerprint: 58C5 8BAF 6FCE B24F 1881 B5B8 F2A8 E1D0 484B 0054 Threema ID: 7ZRET2JY „Wer die Freiheit aufgibt um Sicherheit zu gewinnen, der wird am Ende beides verlieren.“ -- Benjamin Franklin [View Less]

1 0

[commit] r1769 - trunk
by repository service 19 Mar '14

19 Mar '14

Author: stefanct Date: Wed Mar 19 18:17:06 2014 New Revision: 1769 URL: http://flashrom.org/trac/flashrom/changeset/1769 Log: linux_spi: Stop messing up the units of SPI speed. 'speed' is stored in Hz, so rename the variable to 'speed_hz' to clarify any potential confusion. Also, when printing the speed after setting it with an ioctl, convert it to kHz to match the units given in the message. Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Acked-by: Stefan Tauner <stefan.… [View More]

1 0

[commit] r1768 - trunk
by repository service 19 Mar '14

19 Mar '14

Author: stefanct Date: Wed Mar 19 18:17:00 2014 New Revision: 1768 URL: http://flashrom.org/trac/flashrom/changeset/1768 Log: linux_spi: Fix conversion from kHz to Hz. A kilohertz is exactly 1000 hertz, not 1024 hertz. Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/linux_spi.c Modified: trunk/linux_spi.c ============================================================================== --- … [View More]

1 0

Intel S5000PAL: Flash Not Found
by Sean Everson 19 Mar '14

19 Mar '14

*All,I have a number of Intel S5000PAL motherboards that I would like to use FLASHROM to manage if at all possible. According to the Intel Docs at:http://download.intel.com/support/motherboards/server/s5000pal/sb/s5000p… <http://download.intel.com/support/motherboards/server/s5000pal/sb/s5000pal_…>The box contains the 6321ESB chipset which is listed as supported on the flashrom.org <http://flashrom.org> wiki page.When I try to use FLASHROM to read the flash I get an error message … [View More]that the flash is not found. Can someone provide me with some guidance on what additional information or steps I can take to investigate this further?I am including the output from flashrom -V below.Thanks for your help!--Sean# ./flashrom -V -p internal -r /tmp/bios.binflashrom v0.9.7-r1764 on Linux 2.6.32.24 (x86_64)flashrom is free software, get the source code at http://www.flashrom.org <http://www.flashrom.org>flashrom was built with libpci 3.2.1, GCC 4.7.1, little endianCommand line (5 args): ./flashrom -V -p internal -r /tmp/bios.binCalibrating delay loop... OS timer resolution is 1 usecs, 2824M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = 10025 us, 4 myus = 4 us, OK.Initializing internal programmerNo coreboot table found.Using Internal DMI decoder.DMI string chassis-type: "Rack Mount Chassis"DMI string system-manufacturer: "Intel"DMI string system-product-name: "T5000PAL"DMI string system-version: "Not Specified"DMI string baseboard-manufacturer: "Intel"DMI string baseboard-product-name: "T5000PAL0 "DMI string baseboard-version: "FRU Ver 0.05"W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect.Active config mode, unknown reg 0x20 ID: f2.Please send the output of "flashrom -V" to flashrom(a)flashrom.org <flashrom(a)flashrom.org> with W836xx: your board name: flashrom -Vas the subject to help us finish support for your Super I/O. Thanks.Found chipset "Intel 631xESB/632xESB/3100" with PCI ID 8086:2670. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x00xfff00000/0xffb00000 FWH IDSEL: 0x00xffe80000/0xffa80000 FWH IDSEL: 0x00xffe00000/0xffa00000 FWH IDSEL: 0x00xffd80000/0xff980000 FWH IDSEL: 0x00xffd00000/0xff900000 FWH IDSEL: 0x00xffc80000/0xff880000 FWH IDSEL: 0x00xffc00000/0xff800000 FWH IDSEL: 0x00xff700000/0xff300000 FWH IDSEL: 0x40xff600000/0xff200000 FWH IDSEL: 0x50xff500000/0xff100000 FWH IDSEL: 0x60xff400000/0xff000000 FWH IDSEL: 0x70xfff80000/0xffb80000 FWH decode enabled0xfff00000/0xffb00000 FWH decode enabled0xffe80000/0xffa80000 FWH decode enabled0xffe00000/0xffa00000 FWH decode enabled0xffd80000/0xff980000 FWH decode enabled0xffd00000/0xff900000 FWH decode enabled0xffc80000/0xff880000 FWH decode enabled0xffc00000/0xff800000 FWH decode enabled0xff700000/0xff300000 FWH decode disabled0xff600000/0xff200000 FWH decode disabled0xff500000/0xff100000 FWH decode disabled0xff400000/0xff000000 FWH decode disabledMaximum FWH chip size: 0x400000 bytesSPI Read Configuration: prefetching disabled, caching enabled, BIOS_CNTL = 0x03: BIOS Lock Enable: enabled, BIOS Write Enable: enabledWarning: Setting Bios Control at 0xdc from 0x02 to 0x01 failed.New value is 0x03.OK.The following protocols are supported: FWH.Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash contentProbing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash contentProbing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xc9, id2 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash contentProbing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M50FW040, 512 kB: probe_82802ab: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xc9, id2 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xc9, id2 0x78, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x9b, id2 0x0c, id1 is normal flash content, id2 is normal flash contentNo EEPROM/flash device found.Note: flashrom can never write if the flash chip isn't found automatically.Restoring PCI config space for 00:1f:0 reg 0xdc* [View Less]

1 0

GSoC-2014 Flashrom project "Locking and unlocking of access protections of flash chips"
by 严进一 19 Mar '14

19 Mar '14

Hi, I am Jinyi Yan , a second year PhD candidate from Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences. I used to be a mainboard BIOS engineer in ASUS Technology Suzhou Co., Ltd for about two years (2007.7~2009.2). My major now is optoelectronics. But I have a lot of fun while programming, in my heart the working experience of being a BIOS engineer is still very exciting. I think GsoC is a nice platform for me to participate the open source community. … [View More]

3 2

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom