spi_read_status_register() is used in open-coded loops everywhere just
to check if SPI_SR_WIP bit cleared. The logic is missing a timeout
detection, and we can save quite a lot of code by introducing a function
which waits until SPI_SR_WIP is cleared or a timeout is reached.
Untested. May explode.
Unfinished. More functions need to be converted to the new style.
Will change behaviour if the chip is too slow or hangs. Should prevent
flashrom from hanging without any visible output.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Index: flashrom-spi_rdsr_refactor/spi25.c
===================================================================
--- flashrom-spi_rdsr_refactor/spi25.c (Revision 1653)
+++ flashrom-spi_rdsr_refactor/spi25.c (Arbeitskopie)
@@ -328,14 +328,9 @@
__func__);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 1-85 s, so wait in 1 s steps.
- */
- /* FIXME: We assume spi_read_status_register will never fail. */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(1000 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 120 * 1000 * 1000, JEDEC_CE_60);
+ return result;
}
int spi_chip_erase_62(struct flashctx *flash)
@@ -365,14 +360,9 @@
__func__);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 2-5 s, so wait in 100 ms steps.
- */
- /* FIXME: We assume spi_read_status_register will never fail. */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(100 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 120 * 1000 * 1000, JEDEC_CE_62);
+ return result;
}
int spi_chip_erase_c7(struct flashctx *flash)
@@ -401,14 +391,9 @@
msg_cerr("%s failed during command execution\n", __func__);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 1-85 s, so wait in 1 s steps.
- */
- /* FIXME: We assume spi_read_status_register will never fail. */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(1000 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 120 * 1000 * 1000, JEDEC_CE_C7);
+ return result;
}
int spi_block_erase_52(struct flashctx *flash, unsigned int addr,
@@ -444,13 +429,9 @@
__func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 100-4000 ms, so wait in 100 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(100 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_52);
+ return result;
}
/* Block size is usually
@@ -491,13 +472,9 @@
__func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 100-4000 ms, so wait in 100 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(100 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_D8);
+ return result;
}
/* Block size is usually
@@ -536,13 +513,9 @@
__func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 100-4000 ms, so wait in 100 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(100 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_D7);
+ return result;
}
/* Sector size is usually 4k, though Macronix eliteflash has 64k */
@@ -579,13 +552,9 @@
__func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 15-800 ms, so wait in 10 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(10 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_SE);
+ return result;
}
int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
@@ -619,13 +588,9 @@
msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 10 ms, so wait in 1 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(1 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_50);
+ return result;
}
int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
@@ -659,13 +624,9 @@
msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr);
return result;
}
- /* Wait until the Write-In-Progress bit is cleared.
- * This usually takes 8 ms, so wait in 1 ms steps.
- */
- while (spi_read_status_register(flash) & SPI_SR_WIP)
- programmer_delay(1 * 1000);
/* FIXME: Check the status register for errors. */
- return 0;
+ result = spi_wait_status_register_ready(flash, 10 * 1000 * 1000, JEDEC_BE_81);
+ return result;
}
int spi_block_erase_60(struct flashctx *flash, unsigned int addr,
Index: flashrom-spi_rdsr_refactor/spi25_statusreg.c
===================================================================
--- flashrom-spi_rdsr_refactor/spi25_statusreg.c (Revision 1653)
+++ flashrom-spi_rdsr_refactor/spi25_statusreg.c (Arbeitskopie)
@@ -43,7 +43,6 @@
static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode)
{
int result;
- int i = 0;
/*
* WRSR requires either EWSR or WREN depending on chip type.
* The code below relies on the fact hat EWSR and WREN have the same
@@ -78,17 +77,10 @@
/* WRSR performs a self-timed erase before the changes take effect.
* This may take 50-85 ms in most cases, and some chips apparently
* allow running RDSR only once. Therefore pick an initial delay of
- * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
+ * 100 ms, then wait until a total of 5 s have elapsed.
*/
programmer_delay(100 * 1000);
- while (spi_read_status_register(flash) & SPI_SR_WIP) {
- if (++i > 490) {
- msg_cerr("Error: WIP bit after WRSR never cleared\n");
- return TIMEOUT_ERROR;
- }
- programmer_delay(10 * 1000);
- }
- return 0;
+ return spi_wait_status_register_ready(flash, 4900 * 1000, JEDEC_WRSR);
}
int spi_write_status_register(struct flashctx *flash, int status)
@@ -108,6 +100,28 @@
return ret;
}
+/* timeout is specified in usecs. */
+int spi_wait_status_register_ready(struct flashctx *flash, int timeout, uint8_t opcode)
+{
+ /* At least 1 usec between iterations. */
+ int single_delay = (timeout / 100) ? : 1;
+ int elapsed = 0;
+ int halftime = 0;
+
+ while (spi_read_status_register(flash) & SPI_SR_WIP) {
+ elapsed += single_delay;
+ if ((elapsed > timeout / 2) && !halftime) {
+ msg_cdbg("Debug: WIP bit after %02x didn't clear within %i us.\n", opcode, timeout/2);
+ }
+ if (elapsed >= timeout) {
+ msg_cerr("Error: WIP bit after %02x didn't clear within %i us.\n", opcode, timeout);
+ return TIMEOUT_ERROR;
+ }
+ programmer_delay(single_delay);
+ }
+ return 0;
+}
+
uint8_t spi_read_status_register(struct flashctx *flash)
{
static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
Index: flashrom-spi_rdsr_refactor/chipdrivers.h
===================================================================
--- flashrom-spi_rdsr_refactor/chipdrivers.h (Revision 1653)
+++ flashrom-spi_rdsr_refactor/chipdrivers.h (Arbeitskopie)
@@ -60,6 +60,7 @@
/* spi25_statusreg.c */
uint8_t spi_read_status_register(struct flashctx *flash);
+int spi_wait_status_register_ready(struct flashctx *flash, int timeout, uint8_t opcode);
int spi_write_status_register(struct flashctx *flash, int status);
int spi_prettyprint_status_register_plain(struct flashctx *flash);
int spi_prettyprint_status_register_default_bp1(struct flashctx *flash);
--
http://www.hailfinger.org/
Hi
I'm correctly flashing my motherboard ASUS M3N-H/HDMI for upgrading to a
new official ASUS BIOS under Kubuntu 13.10.
I join a tar.gz file with all results of manipulations how it's ask by this
software.
Thank's for your great Jobs guy
Sincerely
Franc SERRES
--
Que l'Open source soit avec toi.
Utilise l'Open source Luc...
A non-text attachment has been stripped: FlashBIOS_ASUS_M3N-H⁄HDMI.tar.gz
It is available at http://paste.flashrom.org/view.php?id=2039
Hi Carl,
i found dediprog_spi_send_command in dediprog.c, after below action:
ret = usb_control_msg(dediprog_handle, 0xc2, 0x01, 0xbb8, 0x0000,
(char *)readarr, readcnt, DEFAULT_TIMEOUT);
readarr will become 0x534631 ("SF1"), even i didn't put a ROM on my SF100.
i have no idea about this usb device request, the meaning of wValue 0xbb8
to dediprog device
hope this info help for debug, thanks.
BR,
Kurt
2014-03-05 8:35 GMT+08:00 Kurt Qiao <kurtqqh(a)gmail.com>:
> resent loop flashrom.org
>
> Hi Carl,
>
> Thanks for reply.
> 1. i update SF100 fm to v5.5.0, need to support windows8
> 2. here's my libusb dpkg info
> ii libusb-0.1-4 2:0.1.12-20 userspace USB programming library
> ii libusb-1.0-0 2:1.0.9~rc3-2u userspace USB programming library
> ii libusb-dev 2:0.1.12-20 userspace USB programming library
> developmen
>
> BR,
> Kurt
>
>
> 2014-03-05 8:33 GMT+08:00 Kurt Qiao <kurtqqh(a)gmail.com>:
>
> Hi Carl,
>>
>> Thanks for reply.
>> 1. i update SF100 fm to v5.5.0, need to support windows8
>> 2. here's my libusb dpkg info
>> ii libusb-0.1-4 2:0.1.12-20 userspace USB programming library
>> ii libusb-1.0-0 2:1.0.9~rc3-2u userspace USB programming library
>> ii libusb-dev 2:0.1.12-20 userspace USB programming library
>> developmen
>>
>> BR,
>> Kurt
>>
>>
>> 2014-03-05 8:14 GMT+08:00 Carl-Daniel Hailfinger <
>> c-d.hailfinger.devel.2006(a)gmx.net>:
>>
>> Hi Kurt,
>>>
>>> Am 24.02.2014 09:29 schrieb Kurt Qiao:
>>> > hope anyone can help me out, i try to implement flashrom to support
>>> > dediprog SF100 on my Ubuntu. config as below:
>>> > OS: Ubuntu12.04 X64
>>> > Dediprog: SF100, fm ver: 5.5.0
>>>
>>> We only have tested flashrom support with SF100 firmware versions from
>>> 2.0 to 5.2. It should work with firmware version 5.5, but we have not
>>> tested it.
>>>
>>>
>>> > SPI ROM: winbond W25Q64FW, id 0xef 6017
>>> >
>>> > plugging my SF100, and use below cmd
>>> > flashrom -p dediprog -V
>>> > i can see the program detect my sf100 but fail to detect the SPI
>>> ROM. log
>>> > as attached file.
>>> > ---log----
>>> > Probing for Winbond W25Q64.V, 8192 kB: RDID byte 0 parity violation.
>>> > probe_spi_rdid_generic: id1 0x53, id2 0x4631
>>> > ----log---
>>> >
>>> > as the log shows, seems flashrom read SPI ROM id is 0x53, 0x4631,
>>> but
>>> > actually my SPI ROM on board is winbond with id 0xef, 0x6017(i confirm
>>> this
>>> > with windows dediprog).
>>> > so i have no idea why flashrom detect wrong id, and the flashchips.h
>>> > already have WINBOND_NEX_W25Q64_W 0x6017 support.
>>>
>>> 0x53 0x46 0x31 is the string "SF1". This string is returned by the SF100
>>> if we query the firmware version.
>>> I think we have a bug in the dediprog firmware or in the dediprog driver
>>> or in libusb. Which version of libusb are you using?
>>>
>>> Regards,
>>> Carl-Daniel
>>>
>>> --
>>> http://www.hailfinger.org/
>>>
>>>
>>
>
resent loop flashrom.org
Hi Carl,
Thanks for reply.
1. i update SF100 fm to v5.5.0, need to support windows8
2. here's my libusb dpkg info
ii libusb-0.1-4 2:0.1.12-20 userspace USB programming library
ii libusb-1.0-0 2:1.0.9~rc3-2u userspace USB programming library
ii libusb-dev 2:0.1.12-20 userspace USB programming library
developmen
BR,
Kurt
2014-03-05 8:33 GMT+08:00 Kurt Qiao <kurtqqh(a)gmail.com>:
> Hi Carl,
>
> Thanks for reply.
> 1. i update SF100 fm to v5.5.0, need to support windows8
> 2. here's my libusb dpkg info
> ii libusb-0.1-4 2:0.1.12-20 userspace USB programming library
> ii libusb-1.0-0 2:1.0.9~rc3-2u userspace USB programming library
> ii libusb-dev 2:0.1.12-20 userspace USB programming library
> developmen
>
> BR,
> Kurt
>
>
> 2014-03-05 8:14 GMT+08:00 Carl-Daniel Hailfinger <
> c-d.hailfinger.devel.2006(a)gmx.net>:
>
> Hi Kurt,
>>
>> Am 24.02.2014 09:29 schrieb Kurt Qiao:
>> > hope anyone can help me out, i try to implement flashrom to support
>> > dediprog SF100 on my Ubuntu. config as below:
>> > OS: Ubuntu12.04 X64
>> > Dediprog: SF100, fm ver: 5.5.0
>>
>> We only have tested flashrom support with SF100 firmware versions from
>> 2.0 to 5.2. It should work with firmware version 5.5, but we have not
>> tested it.
>>
>>
>> > SPI ROM: winbond W25Q64FW, id 0xef 6017
>> >
>> > plugging my SF100, and use below cmd
>> > flashrom -p dediprog -V
>> > i can see the program detect my sf100 but fail to detect the SPI ROM.
>> log
>> > as attached file.
>> > ---log----
>> > Probing for Winbond W25Q64.V, 8192 kB: RDID byte 0 parity violation.
>> > probe_spi_rdid_generic: id1 0x53, id2 0x4631
>> > ----log---
>> >
>> > as the log shows, seems flashrom read SPI ROM id is 0x53, 0x4631, but
>> > actually my SPI ROM on board is winbond with id 0xef, 0x6017(i confirm
>> this
>> > with windows dediprog).
>> > so i have no idea why flashrom detect wrong id, and the flashchips.h
>> > already have WINBOND_NEX_W25Q64_W 0x6017 support.
>>
>> 0x53 0x46 0x31 is the string "SF1". This string is returned by the SF100
>> if we query the firmware version.
>> I think we have a bug in the dediprog firmware or in the dediprog driver
>> or in libusb. Which version of libusb are you using?
>>
>> Regards,
>> Carl-Daniel
>>
>> --
>> http://www.hailfinger.org/
>>
>>
>
Hi Kurt,
Am 24.02.2014 09:29 schrieb Kurt Qiao:
> hope anyone can help me out, i try to implement flashrom to support
> dediprog SF100 on my Ubuntu. config as below:
> OS: Ubuntu12.04 X64
> Dediprog: SF100, fm ver: 5.5.0
We only have tested flashrom support with SF100 firmware versions from
2.0 to 5.2. It should work with firmware version 5.5, but we have not
tested it.
> SPI ROM: winbond W25Q64FW, id 0xef 6017
>
> plugging my SF100, and use below cmd
> flashrom -p dediprog -V
> i can see the program detect my sf100 but fail to detect the SPI ROM. log
> as attached file.
> ---log----
> Probing for Winbond W25Q64.V, 8192 kB: RDID byte 0 parity violation.
> probe_spi_rdid_generic: id1 0x53, id2 0x4631
> ----log---
>
> as the log shows, seems flashrom read SPI ROM id is 0x53, 0x4631, but
> actually my SPI ROM on board is winbond with id 0xef, 0x6017(i confirm this
> with windows dediprog).
> so i have no idea why flashrom detect wrong id, and the flashchips.h
> already have WINBOND_NEX_W25Q64_W 0x6017 support.
0x53 0x46 0x31 is the string "SF1". This string is returned by the SF100
if we query the firmware version.
I think we have a bug in the dediprog firmware or in the dediprog driver
or in libusb. Which version of libusb are you using?
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
Mapping a chip with the internal programmer on x86 will fail if the chip
is larger than 16 MByte due to traditional x86 architecture constraints.
No LPC/FWH chips of sizes bigger than 4 MByte are known, and Parallel
chips are limited to older x86 chipsets and way smaller sizes because of
address line shortage. We do see quite large SPI chips (even >16 MByte)
and flashrom shouldn't fail probing or accessing them. Given that we
have no chance to map those chips into the address space completely,
make sure they are handled properly with indirect accesses
Caveat: The code is proof-of-concept quality and litters the codebase
with exit(1). We need to discuss what do do in that case.
Testing should be done on a x86 machine which has SPI flash, and with
r1702 reverted to have the 32 MByte chips again in flashchips.c (ignore
the incorrect r1701 changelog which speaks of 32 MByte chip removal,
that only happens in r1702).
If flashrom successfully finishes probing without an abort in between,
the patch does what it should. Or not. Read on.
Without this patch and a reverted r1702, flashrom may successfully
finish probing anyway due to the earlier physmap cleanups by Niklas
Söderlund (r1744 and r1745). That's just the result from missing error
checks, though.
Applying this patch against a r1701 checkout (all files being r1701)
should result in a fixed probe vs. a failing probe for plain r1701.
A backported version of the patch against r1701 can be found at
http://paste.flashrom.org/view.php?id=2027
Thanks for reading.
Regards,
Carl-Daniel
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Index: flashrom-internal_no_chip_mapping_larger_16mbyte/flash.h
===================================================================
--- flashrom-internal_no_chip_mapping_larger_16mbyte/flash.h (Revision 1764)
+++ flashrom-internal_no_chip_mapping_larger_16mbyte/flash.h (Arbeitskopie)
@@ -186,6 +186,7 @@
struct flashctx {
struct flashchip *chip;
+ bool virtual_memory_is_usable;
chipaddr virtual_memory;
/* Some flash devices have an additional register space. */
chipaddr virtual_registers;
Index: flashrom-internal_no_chip_mapping_larger_16mbyte/it87spi.c
===================================================================
--- flashrom-internal_no_chip_mapping_larger_16mbyte/it87spi.c (Revision 1764)
+++ flashrom-internal_no_chip_mapping_larger_16mbyte/it87spi.c (Arbeitskopie)
@@ -385,7 +385,7 @@
* the mainboard does not use IT87 SPI translation. This should be done
* via a programmer parameter for the internal programmer.
*/
- if ((flash->chip->total_size * 1024 > 512 * 1024)) {
+ if (!flash->virtual_memory_is_usable || (flash->chip->total_size * 1024 > 512 * 1024)) {
spi_read_chunked(flash, buf, start, len, 3);
} else {
mmio_readn((void *)(flash->virtual_memory + start), buf, len);
Index: flashrom-internal_no_chip_mapping_larger_16mbyte/internal.c
===================================================================
--- flashrom-internal_no_chip_mapping_larger_16mbyte/internal.c (Revision 1764)
+++ flashrom-internal_no_chip_mapping_larger_16mbyte/internal.c (Arbeitskopie)
@@ -365,45 +365,69 @@
}
#endif
+void *internal_map(const char *descr, uintptr_t phys_addr, size_t len)
+{
+ return physmap(descr, phys_addr, len);
+}
+
+void internal_unmap(void *virt_addr, size_t len)
+{
+ physunmap(virt_addr, len);
+}
+
static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr)
{
+ if (!flash->virtual_memory_is_usable)
+ exit(1);
mmio_writeb(val, (void *) addr);
}
static void internal_chip_writew(const struct flashctx *flash, uint16_t val,
chipaddr addr)
{
+ if (!flash->virtual_memory_is_usable)
+ exit(1);
mmio_writew(val, (void *) addr);
}
static void internal_chip_writel(const struct flashctx *flash, uint32_t val,
chipaddr addr)
{
+ if (!flash->virtual_memory_is_usable)
+ exit(1);
mmio_writel(val, (void *) addr);
}
static uint8_t internal_chip_readb(const struct flashctx *flash,
const chipaddr addr)
{
+ if (!flash->virtual_memory_is_usable)
+ exit(1);
return mmio_readb((void *) addr);
}
static uint16_t internal_chip_readw(const struct flashctx *flash,
const chipaddr addr)
{
+ if (!flash->virtual_memory_is_usable)
+ exit(1);
return mmio_readw((void *) addr);
}
static uint32_t internal_chip_readl(const struct flashctx *flash,
const chipaddr addr)
{
+ if (!flash->virtual_memory_is_usable)
+ exit(1);
return mmio_readl((void *) addr);
}
static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
const chipaddr addr, size_t len)
{
+ if (!flash->virtual_memory_is_usable)
+ exit(1);
mmio_readn((void *)addr, buf, len);
return;
}
Index: flashrom-internal_no_chip_mapping_larger_16mbyte/wbsio_spi.c
===================================================================
--- flashrom-internal_no_chip_mapping_larger_16mbyte/wbsio_spi.c (Revision 1764)
+++ flashrom-internal_no_chip_mapping_larger_16mbyte/wbsio_spi.c (Arbeitskopie)
@@ -20,6 +20,7 @@
#if defined(__i386__) || defined(__x86_64__)
+#include <stdlib.h>
#include "flash.h"
#include "chipdrivers.h"
#include "programmer.h"
@@ -204,6 +205,8 @@
static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
unsigned int start, unsigned int len)
{
+ if (!flash->virtual_memory_is_usable)
+ exit(1);
mmio_readn((void *)(flash->virtual_memory + start), buf, len);
return 0;
}
Index: flashrom-internal_no_chip_mapping_larger_16mbyte/flashrom.c
===================================================================
--- flashrom-internal_no_chip_mapping_larger_16mbyte/flashrom.c (Revision 1764)
+++ flashrom-internal_no_chip_mapping_larger_16mbyte/flashrom.c (Arbeitskopie)
@@ -68,8 +68,8 @@
.type = OTHER,
.devs.note = NULL,
.init = internal_init,
- .map_flash_region = physmap,
- .unmap_flash_region = physunmap,
+ .map_flash_region = internal_map,
+ .unmap_flash_region = internal_unmap,
.delay = internal_delay,
},
#endif
@@ -1086,6 +1086,10 @@
base = flashbase ? flashbase : (0xffffffff - size + 1);
flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size);
+ if (flash->virtual_memory == (chipaddr)ERROR_PTR)
+ flash->virtual_memory_is_usable = false;
+ else
+ flash->virtual_memory_is_usable = true;
/* We handle a forced match like a real match, we just avoid probing. Note that probe_flash()
* is only called with force=1 after normal probing failed.
Index: flashrom-internal_no_chip_mapping_larger_16mbyte/programmer.h
===================================================================
--- flashrom-internal_no_chip_mapping_larger_16mbyte/programmer.h (Revision 1764)
+++ flashrom-internal_no_chip_mapping_larger_16mbyte/programmer.h (Arbeitskopie)
@@ -325,6 +325,8 @@
int register_superio(struct superio s);
extern enum chipbustype internal_buses_supported;
int internal_init(void);
+void *internal_map(const char *descr, uintptr_t phys_addr, size_t len);
+void internal_unmap(void *virt_addr, size_t len);
#endif
/* hwaccess.c */
--
http://www.hailfinger.org/
Hey,
I'm thinking about upgrading my BIOS and found "flashrom" in DEBIAN-repositories. Running a "read" on the builtin BIOS I saw the request for sending you some information - so here you are.
Does "guesswork" mean, it might be unsafe to use this software on this board/bios?
Thanks for your work!
Greetings,
Volker
This ist the requested output
flashrom v0.9.6.1-r1563 on Linux 3.13-3.slh.2-aptosid-686 (i686)
flashrom is free software, get the source code at http://www.flashrom.org
flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian
Command line (3 args): flashrom -V -p internal
Calibrating delay loop... OS timer resolution is 2 usecs, 1238M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1001 us, 10000 myus = 9989 us, 8 myus = 9 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "System Manufacturer"
DMI string system-product-name: "System Product Name"
DMI string system-version: "System Version"
DMI string baseboard-manufacturer: "NF-M2SV"
DMI string baseboard-product-name: "www.abit.com.tw "
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found ITE Super I/O, ID 0x8726 on port 0x2e
Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. Enabling flash write... This chipset is not really supported yet. Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
Flash bus type is LPC
Found SMBus device 10de:03eb at 00:01:1
MCP SPI BAR is at 0x00000000
MCP SPI is not used.
Please send the output of "flashrom -V" to flashrom(a)flashrom.org with
your board name: flashrom -V as the subject to help us finish support for your
chipset. Thanks.
OK.
Super I/O ID 0x8726 is not on the list of flash capable controllers.
The following protocols are supported: LPC.
Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xda, id2 0x50
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x40, id2 0x07, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xda, id2 0x50
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xda, id2 0x50
Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xda, id2 0x50
Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xda, id2 0x50
Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xda, id2 0x50
Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xda, id2 0x50
Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xda, id2 0x50
Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xda, id2 0x50
Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xda, id2 0x50
Found Winbond flash chip "W39V040C" (512 kB, LPC) at physical address 0xfff80000.
Lockout bits:
Hardware bootblock locking (#TBL) is not active.
Hardware remaining chip locking (#WP) is not active..
Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xda, id2 0x50
Found Winbond flash chip "W39V040C" (512 kB, LPC).
No operations were specified.
Restoring PCI config space for 00:01:0 reg 0x6d
Restoring PCI config space for 00:01:0 reg 0x90
Restoring PCI config space for 00:01:0 reg 0x8c
Restoring PCI config space for 00:01:0 reg 0x88