flashrom May 2013

flashrom@flashrom.org

30 participants
97 discussions

Fwd: Added chipsets
by Steven Zakulec 16 May '13

16 May '13

---------- Forwarded message ---------- From: Николай Николаев <evrinoma(a)gmail.com> Date: Thu, May 16, 2013 at 7:03 AM Subject: Re: [flashrom] Added chipsets To: Steven Zakulec <spzakulec(a)gmail.com> Hi Steven "Notes on specific chips: GigaDevice GD25Q512- .voltage = {2700, 3600}, My datasheet (v1.1 March 13 2012, GD25Q10/512) says 2.4-3.6V" I used last datasheet from web site gigadevice - datasheet (v1.1 March 13 2012, GD25Q10/512) says 2.7-3.6V http://www.gigadevice.com/WebPage/PageDetail.php?PageId=129&WebPageTypeId=9… but this document says 2.4 http://www.gigadevice.com/UserFiles/File/datasheet0320/GD25Q10&512_Rev1.1.p… we can easy write 2.4 - 3.6 V Thanks you right i made a mull with M25 and M45 chips. I send a new patch 2013/5/16 Steven Zakulec <spzakulec(a)gmail.com> > This review covers the GigaDevice (except GD25Q10) to Numonyx (partial, > list below) chips that were added. > Here's a couple of general notes: > Please add page programming eraseblocks > > WREN & WRSR flags only get added when the chip actually has the command. > > > Numonyx M45PE10- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 7, April 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > Numonyx M45PE20- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 6, May 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > Numonyx M45PE40- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 9, May 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > Numonyx M45PE80- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 6, May 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > Numonyx M45PE16- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 8, May 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > I'll cover the rest of the Numonyx chips from the patch in a follow-up > review. > > > > -- With best regards Nikolay Nikolaev С Уважением Николаев Николай

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Re: [flashrom] z68extreme4 mainboard
by David MacKinnon 16 May '13

16 May '13

Possibly more helpful, sorry. It's an ASRock Z68 Extreme4, can't remember which gen, not the latest one. Also attaching lspci -nnvvvxxx and superiotool output this time. Happy to help if you want me to run stuff, or possibly even ssh access to the box. On Thu, May 16, 2013 at 3:21 PM, David MacKinnon <blaedd(a)gmail.com> wrote: > Following instructions ;-) In case someone hasn't sent you this one before. > > >

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z68extreme4 mainboard
by David MacKinnon 15 May '13

15 May '13

Following instructions ;-) In case someone hasn't sent you this one before.

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Re: [flashrom] Added chipsets
by Steven Zakulec 15 May '13

15 May '13

This review covers the GigaDevice (except GD25Q10) to Numonyx (partial, list below) chips that were added. Here's a couple of general notes: Please add page programming eraseblocks WREN & WRSR flags only get added when the chip actually has the command. Notes on specific chips: GigaDevice GD25Q512- .voltage = {2700, 3600}, My datasheet (v1.1 March 13 2012, GD25Q10/512) says 2.4-3.6V Numonyx M45PE10- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 7, April 2008) doesn't have a Write Status Register operation- only a Read Status Register. Numonyx M45PE20- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 6, May 2008) doesn't have a Write Status Register operation- only a Read Status Register. Numonyx M45PE40- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 9, May 2008) doesn't have a Write Status Register operation- only a Read Status Register. Numonyx M45PE80- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 6, May 2008) doesn't have a Write Status Register operation- only a Read Status Register. Numonyx M45PE16- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 8, May 2008) doesn't have a Write Status Register operation- only a Read Status Register. I'll cover the rest of the Numonyx chips from the patch in a follow-up review.

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Re: [flashrom] About flashing mx25l4005 on Itona TC2331
by Bin X 15 May '13

15 May '13

Thanks for the reply. I will do some homework on the coreboot. However I think my chanllenge here is to find a program (I don't have hardware programmer) to flash the chip. I run flashrom.exe -p internal -c MX25L4005(A/C) -VVV and here is what I gotflashrom v0.9.6.1-r1671 on MS-DOS 7 (i686)flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.5, GCC 4.4.4, little endianCommand line (5 args): c:/bios/flashrom.exe -p internal -c MX25L4005(A/C) -VVVCalibrating delay loop... OS timer resolution is 110000 usecs, 298M loops per second, delay more than 10% too short (got 84% of expected delay), recalculating... 347M loops per second, 10 myus = 0 us, 100 myus = 0 us, 1000 myus = 0 us, 10000 myus = 0 us, 440000 myus = 440000 us, OK.Initializing internal programmerNo coreboot table found.DMI string system-manufacturer: ""DMI string system-product-name: ""DMI string system-version: ""DMI string baseboard-manufacturer: ""DMI string baseboard-product-name: ""DMI string baseboard-version: ""DMI string chassis-type: ""DMI chassis-type is not specific enough.Found ITE Super I/O, ID 0x8712 on port 0x2eBad Command or file nameBad Command or file nameBad Command or file nameBad Command or file nameBad Command or file nameBad Command or file name I am not sure which part is wrong. Is it because I don't have a full dos enviroment? Thanks, > Date: Tue, 14 May 2013 22:05:06 +0200 > From: vidwer(a)gmail.com > To: z2333(a)outlook.com > CC: flashrom(a)flashrom.org; coreboot(a)coreboot.org > Subject: Re: [flashrom] About flashing mx25l4005 on Itona TC2331 > > 2013/5/14 Bin X <z2333(a)outlook.com>: > > I apologize if it does not make sense at all since this is my first attempt > > to flash a bios with unmatched bios ID. > > > > I was trying to flash bios on a Itona TC2331 to get rid of the limitation > > they put on of any IDE HDD and USB HDD can’t be larger than 64mb. > > coreboot can do that, but you have to spend 'some' time on adding > support for your particular mainboard. > > See http://b2b.gigabyte.com/products/product-page.aspx?pid=3215#sp > ("Chipset VIA CN700 chipset with VIA VT8237R Plus") and > http://www.coreboot.org/Supported_Chipsets_and_Devices > > > > > The current bios rom, flash program and documentation can be found here: > > > > ftp://ftpguest:letmein@ftp.vxl.net/../Utilities/BIOS/TC23YY/ > > > > Since I don’t have any working rom so I am hoping to use the file from this > > board > > > > http://b2b.gigabyte.com/products/product-page.aspx?pid=3215#dl > > > > Because they are from the same vendor and used the same chipset. I > > understand it may not work at all but decide to take the risk. > > > > However, I can’t find any program to flash the bios that can ignore the bios > > ID. The vendor provided one can flash the bios but does not have the option > > to ignore the unmatched bios ID. Flashrom failed at probing the chipset. > > > > The building Q-Flash tells that it is MX25L4005 which should be supported by > > Flashrom. I also tried “internal:laptop=this_is_not_a_laptop” and still no > > success. > > It's very good that you found that programmer parameter. However, the > Gigabyte product picture shows that this (non-VXL) board uses LPC > flash instead of SPI. > > What we're interested in is what flashrom's output looks like when > there is - your words - no success. Does its output end with many > times "<hexadecimal value>:S"? > > > > > So I am not sure what else I should try to make Flashrom work. > > > > Any suggestions? > > > > Thanks, > > > > > > _______________________________________________ > > flashrom mailing list > > flashrom(a)flashrom.org > > http://www.flashrom.org/mailman/listinfo/flashrom > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom

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Re: [flashrom] how to comment on patch?
by Paul Menzel 15 May '13

15 May '13

Dear Siyuan, Am Mittwoch, den 15.05.2013, 17:14 +0800 schrieb WANG Siyuan: > how to comment on this patch: http://patchwork.coreboot.org/patch/3894/ Patchwork just processes messages from the mailing list. So you have to comment by replying to the message. You can download the original patch file in mbox format (see the mbox link [1] next to Download) and import it into your mail program (like Thunderbird). Then you can hit on reply and your comment is threaded correctly as the Message-ID is put into the `Reply-To` or `Reference` header fields. Thanks, Paul [1] http://patchwork.coreboot.org/patch/3894/mbox/

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Re: [flashrom] how to comment on patch?
by Stefan Tauner 15 May '13

15 May '13

On Wed, 15 May 2013 17:14:16 +0800 WANG Siyuan <wangsiyuanbuaa(a)gmail.com> wrote: > Hi, > how to comment on this patch: http://patchwork.coreboot.org/patch/3894/ Hello, patchwork does not support it directly. One can either extract the needed information from the stored header details in patchwork and manually create a proper reply, or google for the originating mail in our mail archive, e.g.: http://www.flashrom.org/pipermail/flashrom/2013-March/010745.html Clicking on the mail address on top should then create a proper reply mail template. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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how to comment on patch?
by WANG Siyuan 15 May '13

15 May '13

Hi, how to comment on this patch: http://patchwork.coreboot.org/patch/3894/ -- Yours sincerely, WANG Siyuan

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Read test - Dell Dimension C521
by Gil 15 May '13

15 May '13

seems fine flashrom v0.9.6.1-r1563 on Linux generic (i686) flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian Command line (5 args): flashrom -VVV -p internal -o fl1 Calibrating delay loop... OS timer resolution is 2 usecs, 948M loops per second, 10 myus = 12 us, 100 myus = 101 us, 1000 myus = 997 us, 10000 myus = 10369 us, 8 myus = 9 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Dell Inc" DMI string system-product-name: "Dimension C521" DMI string system-version: " " DMI string baseboard-manufacturer: "Dell Inc" DMI string baseboard-product-name: " " DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP51" with PCI ID 10de:0260. Enabling flash write... OK. ... The following protocols are supported: Non-SPI. ... Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x9d, id2 0x6e Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH) at physical address 0xfff80000. ... Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH). No operations were specified. Restoring PCI config space for 00:0a:0 reg 0x6d Saved BIOS ROM ok

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Flash chips >= 32MB
by Johannes Krampf 14 May '13

14 May '13

Hello, I spoke with stefanct on IRC today about using flash chips of 32MB size to store a small Linux installation next to coreboot. Apparently he will work on support for 32 bit addresses needed for chips > 16MB during his GSOC and he told me to write to this email address and he would give me a definite answer after this summer. Furthermore I've attached the log output when reading the flash of my board (Asrock E350M1/USB3), maybe this can be of use. From reading the specs, the highest capacity chip from Winbond for "PDIP8 300mil" is the W25Q128FV. There is a 256Mbit version, but only in different packages. Mh, a cli-only system should fit in a compressed 16MB ramdisk, but adding X and a browser (midori) would already be a huge challenge on 32M. Anyway, I hope your work will succeed. Good luck, Johannes

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flashrom May 2013