flashrom July 2010

flashrom@flashrom.org

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[commit] r1113 - trunk
by repository service 28 Jul '10

28 Jul '10

Author: hailfinger Date: Wed Jul 28 17:08:35 2010 New Revision: 1113 URL: http://flashrom.org/trac/coreboot/changeset/1113 Log: Add Nvidia nForce MCP61/MCP65/MCP67/MCP78S/MCP73/MCP79 SPI flashing support. Huge thanks go to Michael Karcher for reverse engineering the interface and to Johannes Sjölund for testing the first iterations of my patch on his hardware until it worked. Thanks to the following testers of the patch: * MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland * MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy * MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden * MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker * MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund * MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz * MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers * MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose * MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan * MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt * MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson" flashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x SPI is detected. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Added: trunk/mcp6x_spi.c Modified: trunk/Makefile trunk/chipset_enable.c trunk/programmer.h trunk/spi.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Wed Jul 28 00:41:39 2010 (r1112) +++ trunk/Makefile Wed Jul 28 17:08:35 2010 (r1113) @@ -118,8 +118,12 @@ ifeq ($(CONFIG_RAYER_SPI), yes) override CONFIG_BITBANG_SPI = yes else +ifeq ($(CONFIG_INTERNAL), yes) +override CONFIG_BITBANG_SPI = yes +else CONFIG_BITBANG_SPI ?= no endif +endif # Always enable 3Com NICs for now. CONFIG_NIC3COM ?= yes @@ -162,7 +166,7 @@ FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o # FIXME: The PROGRAMMER_OBJS below should only be included on x86. -PROGRAMMER_OBJS += it87spi.o ichspi.o sb600spi.o wbsio_spi.o +PROGRAMMER_OBJS += it87spi.o ichspi.o sb600spi.o wbsio_spi.o mcp6x_spi.o NEED_PCI := yes endif Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Wed Jul 28 00:41:39 2010 (r1112) +++ trunk/chipset_enable.c Wed Jul 28 17:08:35 2010 (r1113) @@ -868,18 +868,16 @@ return 0; } -/* This is a shot in the dark. Even if the code is totally bogus for some - * chipsets, users will at least start to send in reports. +/** + * The MCP6x/MCP7x code is based on cleanroom reverse engineering. + * It is assumed that LPC chips need the MCP55 code and SPI chips need the + * code provided in enable_flash_mcp6x_7x_common. */ -static int enable_flash_mcp6x_7x_common(struct pci_dev *dev, const char *name) +static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) { int ret = 0; + int want_spi = 0; uint8_t val; - uint16_t status; - char *busname; - uint32_t mcp_spibaraddr; - void *mcp_spibar; - struct pci_dev *smbusdev; msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); @@ -887,20 +885,31 @@ val = pci_read_byte(dev, 0x8a); msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " "is %i\n", val, (val >> 6) & 0x1, (val >> 5) & 0x1); + switch ((val >> 5) & 0x3) { case 0x0: + ret = enable_flash_mcp55(dev, name); buses_supported = CHIP_BUSTYPE_LPC; + msg_pdbg("Flash bus type is LPC\n"); break; case 0x2: - buses_supported = CHIP_BUSTYPE_SPI; + want_spi = 1; + /* SPI is added in mcp6x_spi_init if it works. + * Do we really want to disable LPC in this case? + */ + buses_supported = CHIP_BUSTYPE_NONE; + msg_pdbg("Flash bus type is SPI\n"); + msg_perr("SPI on this chipset is WIP. Write is unsupported!\n"); + programmer_may_write = 0; break; default: - buses_supported = CHIP_BUSTYPE_UNKNOWN; + /* Should not happen. */ + buses_supported = CHIP_BUSTYPE_NONE; + msg_pdbg("Flash bus type is unknown (none)\n"); + msg_pinfo("Something went wrong with bus type detection.\n"); + goto out_msg; break; } - busname = flashbuses_to_text(buses_supported); - msg_pdbg("Guessed flash bus type is %s\n", busname); - free(busname); /* Force enable SPI and disable LPC? Not a good idea. */ #if 0 @@ -909,62 +918,8 @@ pci_write_byte(dev, 0x8a, val); #endif - /* Look for the SMBus device (SMBus PCI class) */ - smbusdev = pci_dev_find_vendorclass(0x10de, 0x0c05); - if (!smbusdev) { - if (buses_supported & CHIP_BUSTYPE_SPI) { - msg_perr("ERROR: SMBus device not found. Not enabling " - "SPI.\n"); - buses_supported &= ~CHIP_BUSTYPE_SPI; - ret = 1; - } else { - msg_pinfo("Odd. SMBus device not found.\n"); - } - goto out_msg; - } - msg_pdbg("Found SMBus device %04x:%04x at %02x:%02x:%01x\n", - smbusdev->vendor_id, smbusdev->device_id, - smbusdev->bus, smbusdev->dev, smbusdev->func); - - /* Locate the BAR where the SPI interface lives. */ - mcp_spibaraddr = pci_read_long(smbusdev, 0x74); - msg_pdbg("SPI BAR is at 0x%08x, ", mcp_spibaraddr); - /* We hope this has native alignment. We know the SPI interface (well, - * a set of GPIOs that is connected to SPI flash) is at offset 0x530, - * so we expect a size of at least 0x800. Clear the lower bits. - * It is entirely possible that the BAR is 64k big and the low bits are - * reserved for an entirely different purpose. - */ - mcp_spibaraddr &= ~0x7ff; - msg_pdbg("after clearing low bits BAR is at 0x%08x\n", mcp_spibaraddr); - - /* Accessing a NULL pointer BAR is evil. Don't do it. */ - if (mcp_spibaraddr && (buses_supported == CHIP_BUSTYPE_SPI)) { - /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ - mcp_spibar = physmap("MCP67 SPI", mcp_spibaraddr, 0x544); - -/* Guessed. If this is correct, migrate to a separate MCP67 SPI driver. */ -#define MCP67_SPI_CS (1 << 1) -#define MCP67_SPI_SCK (1 << 2) -#define MCP67_SPI_MOSI (1 << 3) -#define MCP67_SPI_MISO (1 << 4) -#define MCP67_SPI_ENABLE (1 << 0) -#define MCP67_SPI_IDLE (1 << 8) - - status = mmio_readw(mcp_spibar + 0x530); - msg_pdbg("SPI control is 0x%04x, enable=%i, idle=%i\n", - status, status & 0x1, (status >> 8) & 0x1); - /* FIXME: Remove the physunmap once the SPI driver exists. */ - physunmap(mcp_spibar, 0x544); - } else if (!mcp_spibaraddr && (buses_supported & CHIP_BUSTYPE_SPI)) { - msg_pdbg("Strange. MCP SPI BAR is invalid.\n"); - buses_supported &= ~CHIP_BUSTYPE_SPI; + if (mcp6x_spi_init(want_spi)) { ret = 1; - } else if (mcp_spibaraddr && !(buses_supported & CHIP_BUSTYPE_SPI)) { - msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" - " doesn't have SPI enabled.\n"); - } else { - msg_pdbg("MCP SPI is not used.\n"); } out_msg: msg_pinfo("Please send the output of \"flashrom -V\" to " @@ -974,68 +929,6 @@ return ret; } -/** - * The MCP61/MCP67 code is guesswork based on cleanroom reverse engineering. - * Due to that, it only reads info and doesn't change any settings. - * It is assumed that LPC chips need the MCP55 code and SPI chips need the - * code provided in enable_flash_mcp6x_7x_common. Until we know for sure, call - * enable_flash_mcp55 from this function only if enable_flash_mcp6x_7x_common - * indicates the flash chip is LPC. Warning: enable_flash_mcp55 - * might make SPI flash inaccessible. The same caveat applies to SPI init - * for LPC flash. - */ -static int enable_flash_mcp67(struct pci_dev *dev, const char *name) -{ - int result = 0; - - result = enable_flash_mcp6x_7x_common(dev, name); - if (result) - return result; - - /* Not sure if this is correct. No docs as usual. */ - switch (buses_supported) { - case CHIP_BUSTYPE_LPC: - result = enable_flash_mcp55(dev, name); - break; - case CHIP_BUSTYPE_SPI: - msg_pinfo("SPI on this chipset is not supported yet.\n"); - buses_supported = CHIP_BUSTYPE_NONE; - break; - default: - msg_pinfo("Something went wrong with bus type detection.\n"); - buses_supported = CHIP_BUSTYPE_NONE; - break; - } - - return result; -} - -static int enable_flash_mcp7x(struct pci_dev *dev, const char *name) -{ - int result = 0; - - result = enable_flash_mcp6x_7x_common(dev, name); - if (result) - return result; - - /* Not sure if this is correct. No docs as usual. */ - switch (buses_supported) { - case CHIP_BUSTYPE_LPC: - msg_pinfo("LPC on this chipset is not supported yet.\n"); - break; - case CHIP_BUSTYPE_SPI: - msg_pinfo("SPI on this chipset is not supported yet.\n"); - buses_supported = CHIP_BUSTYPE_NONE; - break; - default: - msg_pinfo("Something went wrong with bus type detection.\n"); - buses_supported = CHIP_BUSTYPE_NONE; - break; - } - - return result; -} - static int enable_flash_ht1000(struct pci_dev *dev, const char *name) { uint8_t val; @@ -1187,22 +1080,22 @@ {0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ - {0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, - {0x10de, 0x03e1, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, - {0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, - {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, - {0x10de, 0x0440, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, - {0x10de, 0x0441, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, - {0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, - {0x10de, 0x0443, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, - {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp67}, - {0x10de, 0x075c, NT, "NVIDIA", "MCP78S", enable_flash_mcp7x}, - {0x10de, 0x075d, NT, "NVIDIA", "MCP78S", enable_flash_mcp7x}, - {0x10de, 0x07d7, NT, "NVIDIA", "MCP73", enable_flash_mcp7x}, - {0x10de, 0x0aac, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, - {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, - {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, - {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, + {0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, + {0x10de, 0x03e1, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, + {0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, + {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, + {0x10de, 0x0440, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, + {0x10de, 0x0441, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, + {0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, + {0x10de, 0x0443, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, + {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x}, + {0x10de, 0x075c, NT, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, + {0x10de, 0x075d, NT, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, + {0x10de, 0x07d7, NT, "NVIDIA", "MCP73", enable_flash_mcp6x_7x}, + {0x10de, 0x0aac, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, Added: trunk/mcp6x_spi.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/mcp6x_spi.c Wed Jul 28 17:08:35 2010 (r1113) @@ -0,0 +1,193 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Driver for the Nvidia MCP6x/MCP7x MCP6X_SPI controller. + * Based on clean room reverse engineered docs from + * http://www.flashrom.org/pipermail/flashrom/2009-December/001180.html + * created by Michael Karcher. + */ + +#if defined(__i386__) || defined(__x86_64__) + +#include <stdint.h> +#include <stdlib.h> +#include <ctype.h> +#include "flash.h" +#include "programmer.h" + +/* Bit positions for each pin. */ + +#define MCP6X_SPI_CS 1 +#define MCP6X_SPI_SCK 2 +#define MCP6X_SPI_MOSI 3 +#define MCP6X_SPI_MISO 4 +#define MCP6X_SPI_REQUEST 0 +#define MCP6X_SPI_GRANT 8 + +void *mcp6x_spibar = NULL; + +static void mcp6x_request_spibus(void) +{ + uint8_t tmp; + + tmp = mmio_readb(mcp6x_spibar + 0x530); + tmp |= 1 << MCP6X_SPI_REQUEST; + mmio_writeb(tmp, mcp6x_spibar + 0x530); + + /* Wait until we are allowed to use the SPI bus. */ + while (!(mmio_readw(mcp6x_spibar + 0x530) & (1 << MCP6X_SPI_GRANT))) ; +} + +static void mcp6x_release_spibus(void) +{ + uint8_t tmp; + + tmp = mmio_readb(mcp6x_spibar + 0x530); + tmp &= ~(1 << MCP6X_SPI_REQUEST); + mmio_writeb(tmp, mcp6x_spibar + 0x530); +} + +static void mcp6x_bitbang_set_cs(int val) +{ + uint8_t tmp; + + /* Requesting and releasing the SPI bus is handled in here to allow the + * chipset to use its own SPI engine for native reads. + */ + if (val == 0) + mcp6x_request_spibus(); + + tmp = mmio_readb(mcp6x_spibar + 0x530); + tmp &= ~(1 << MCP6X_SPI_CS); + tmp |= (val << MCP6X_SPI_CS); + mmio_writeb(tmp, mcp6x_spibar + 0x530); + + if (val == 1) + mcp6x_release_spibus(); +} + +static void mcp6x_bitbang_set_sck(int val) +{ + uint8_t tmp; + + tmp = mmio_readb(mcp6x_spibar + 0x530); + tmp &= ~(1 << MCP6X_SPI_SCK); + tmp |= (val << MCP6X_SPI_SCK); + mmio_writeb(tmp, mcp6x_spibar + 0x530); +} + +static void mcp6x_bitbang_set_mosi(int val) +{ + uint8_t tmp; + + tmp = mmio_readb(mcp6x_spibar + 0x530); + tmp &= ~(1 << MCP6X_SPI_MOSI); + tmp |= (val << MCP6X_SPI_MOSI); + mmio_writeb(tmp, mcp6x_spibar + 0x530); +} + +static int mcp6x_bitbang_get_miso(void) +{ + uint8_t tmp; + + tmp = mmio_readb(mcp6x_spibar + 0x530); + tmp = (tmp >> MCP6X_SPI_MISO) & 0x1; + return tmp; +} + +static const struct bitbang_spi_master bitbang_spi_master_mcp6x = { + .type = BITBANG_SPI_MASTER_MCP, + .set_cs = mcp6x_bitbang_set_cs, + .set_sck = mcp6x_bitbang_set_sck, + .set_mosi = mcp6x_bitbang_set_mosi, + .get_miso = mcp6x_bitbang_get_miso, +}; + +int mcp6x_spi_init(int want_spi) +{ + uint16_t status; + uint32_t mcp6x_spibaraddr; + struct pci_dev *smbusdev; + + /* Look for the SMBus device (SMBus PCI class) */ + smbusdev = pci_dev_find_vendorclass(0x10de, 0x0c05); + if (!smbusdev) { + if (want_spi) { + msg_perr("ERROR: SMBus device not found. Not enabling " + "SPI.\n"); + return 1; + } else { + msg_pinfo("Odd. SMBus device not found.\n"); + return 0; + } + } + msg_pdbg("Found SMBus device %04x:%04x at %02x:%02x:%01x\n", + smbusdev->vendor_id, smbusdev->device_id, + smbusdev->bus, smbusdev->dev, smbusdev->func); + + + /* Locate the BAR where the SPI interface lives. */ + mcp6x_spibaraddr = pci_read_long(smbusdev, 0x74); + /* BAR size is 64k, bits 15..4 are zero, bit 3..0 declare a + * 32-bit non-prefetchable memory BAR. + */ + mcp6x_spibaraddr &= ~0xffff; + msg_pdbg("MCP SPI BAR is at 0x%08x\n", mcp6x_spibaraddr); + + /* Accessing a NULL pointer BAR is evil. Don't do it. */ + if (!mcp6x_spibaraddr && want_spi) { + msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR " + "is invalid.\n"); + return 1; + } else if (!mcp6x_spibaraddr && !want_spi) { + msg_pdbg("MCP SPI is not used.\n"); + return 0; + } else if (mcp6x_spibaraddr && !want_spi) { + msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" + " doesn't have SPI enabled.\n"); + /* FIXME: Should we enable SPI anyway? */ + return 0; + } + /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ + mcp6x_spibar = physmap("Nvidia MCP6x SPI", mcp6x_spibaraddr, 0x544); + +#if 0 + /* FIXME: Run the physunmap in a shutdown function. */ + physunmap(mcp6x_spibar, 0x544); +#endif + + status = mmio_readw(mcp6x_spibar + 0x530); + msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n", + status, (status >> MCP6X_SPI_REQUEST) & 0x1, + (status >> MCP6X_SPI_GRANT) & 0x1); + + /* 1 usec halfperiod delay for now. */ + if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 1)) { + /* This should never happen. */ + msg_perr("MCP6X bitbang SPI master init failed!\n"); + return 1; + } + + buses_supported |= CHIP_BUSTYPE_SPI; + spi_controller = SPI_CONTROLLER_MCP6X_BITBANG; + + return 0; +} + +#endif Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Wed Jul 28 00:41:39 2010 (r1112) +++ trunk/programmer.h Wed Jul 28 17:08:35 2010 (r1113) @@ -110,6 +110,11 @@ #if CONFIG_RAYER_SPI == 1 BITBANG_SPI_MASTER_RAYER, #endif +#if CONFIG_INTERNAL == 1 +#if defined(__i386__) || defined(__x86_64__) + BITBANG_SPI_MASTER_MCP, +#endif +#endif }; struct bitbang_spi_master { @@ -404,6 +409,13 @@ int rayer_spi_init(void); #endif +/* mcp6x_spi.c */ +#if CONFIG_INTERNAL == 1 +#if defined(__i386__) || defined(__x86_64__) +int mcp6x_spi_init(int want_spi); +#endif +#endif + /* bitbang_spi.c */ int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); @@ -455,6 +467,7 @@ SPI_CONTROLLER_SB600, SPI_CONTROLLER_VIA, SPI_CONTROLLER_WBSIO, + SPI_CONTROLLER_MCP6X_BITBANG, #endif #endif #if CONFIG_FT2232_SPI == 1 Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Wed Jul 28 00:41:39 2010 (r1112) +++ trunk/spi.c Wed Jul 28 17:08:35 2010 (r1113) @@ -83,6 +83,13 @@ .read = wbsio_spi_read, .write_256 = spi_chip_write_1_new, }, + + { /* SPI_CONTROLLER_MCP6X_BITBANG */ + .command = bitbang_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = bitbang_spi_read, + .write_256 = bitbang_spi_write_256, + }, #endif #endif

1 0

[PATCH] add support for Asus P4S800-MX
by David Borg 28 Jul '10

28 Jul '10

Patch to add support for the Asus P4S800-MX motherboard and SIS 963 chipset. Invalidates previous patch: [PATCH] add support for SIS963 If anyone has the output of superiotool -deV for the following working boards, please forward them, so I can merge the functions w836xx_unlock_memw_enable_2e and w836xx_memw_enable_2e, and maybe fix the function w836xx_memw_enable which I believe has a typo, such that sio_mask(port, 0x24, 0x28, 0x28); becomes : sio_mask(port, 0x24, 0x28, 0x38); Motherboards: Albatron - PM266A Pro ASUS - A7V8X-MX SE EPoX - EP-8K5A2 Shuttle - AK31 Tyan - S2498 (Tomcat K7M) Termtek - TK-3370 (Rev:2.5B) MSI - MS-6590 (KT4 Ultra) MSI - MS-6712 (KT4V) MSI - MS-7005 (651M-L) Signed-off-by: David Borg <borg.db(a)gmail.com> Regards, David

1 1

Add URLs for three boards, fix a typo and add a note
by Idwer Vollering 28 Jul '10

28 Jul '10

Add URLs for boards ASUS K8V, ASUS K8V SE Deluxe, Elitegroup K7S5A. FIxes a typo, adds a note for ASUS M2N-E. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com>

3 2

[PATCH] Split off programmer.h from flash.h
by Carl-Daniel Hailfinger 28 Jul '10

28 Jul '10

Split off programmer.h from flash.h. Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h inherited header from coreboot, internal programmer only spi.h SPI command definitions (do we want the same for JEDEC?) NOTE: This patch was created after running svn cp flash.h programmer.h and if you want to apply it, please run the same command before running patch. Due to this, the diff for programmer.h is not about what I added to programmer.c, but rather about what I removed from flash.h to get programmer.c. Compile tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-programmer_h/flash.h =================================================================== --- flashrom-programmer_h/flash.h (Revision 1108) +++ flashrom-programmer_h/flash.h (Arbeitskopie) @@ -35,88 +35,7 @@ typedef unsigned long chipaddr; -enum programmer { -#if CONFIG_INTERNAL == 1 - PROGRAMMER_INTERNAL, -#endif -#if CONFIG_DUMMY == 1 - PROGRAMMER_DUMMY, -#endif -#if CONFIG_NIC3COM == 1 - PROGRAMMER_NIC3COM, -#endif -#if CONFIG_NICREALTEK == 1 - PROGRAMMER_NICREALTEK, - PROGRAMMER_NICREALTEK2, -#endif -#if CONFIG_NICNATSEMI == 1 - PROGRAMMER_NICNATSEMI, -#endif -#if CONFIG_GFXNVIDIA == 1 - PROGRAMMER_GFXNVIDIA, -#endif -#if CONFIG_DRKAISER == 1 - PROGRAMMER_DRKAISER, -#endif -#if CONFIG_SATASII == 1 - PROGRAMMER_SATASII, -#endif -#if CONFIG_ATAHPT == 1 - PROGRAMMER_ATAHPT, -#endif -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - PROGRAMMER_IT87SPI, -#endif -#endif -#if CONFIG_FT2232_SPI == 1 - PROGRAMMER_FT2232_SPI, -#endif -#if CONFIG_SERPROG == 1 - PROGRAMMER_SERPROG, -#endif -#if CONFIG_BUSPIRATE_SPI == 1 - PROGRAMMER_BUSPIRATE_SPI, -#endif -#if CONFIG_DEDIPROG == 1 - PROGRAMMER_DEDIPROG, -#endif -#if CONFIG_RAYER_SPI == 1 - PROGRAMMER_RAYER_SPI, -#endif - PROGRAMMER_INVALID /* This must always be the last entry. */ -}; - -extern enum programmer programmer; - -struct programmer_entry { - const char *vendor; - const char *name; - - int (*init) (void); - int (*shutdown) (void); - - void * (*map_flash_region) (const char *descr, unsigned long phys_addr, - size_t len); - void (*unmap_flash_region) (void *virt_addr, size_t len); - - void (*chip_writeb) (uint8_t val, chipaddr addr); - void (*chip_writew) (uint16_t val, chipaddr addr); - void (*chip_writel) (uint32_t val, chipaddr addr); - void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len); - uint8_t (*chip_readb) (const chipaddr addr); - uint16_t (*chip_readw) (const chipaddr addr); - uint32_t (*chip_readl) (const chipaddr addr); - void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len); - void (*delay) (int usecs); -}; - -extern const struct programmer_entry programmer_table[]; - int register_shutdown(void (*function) (void *data), void *data); - -int programmer_init(char *param); -int programmer_shutdown(void); void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, size_t len); void programmer_unmap_flash_region(void *virt_addr, size_t len); @@ -130,23 +49,6 @@ void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void programmer_delay(int usecs); -enum bitbang_spi_master_type { - BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */ -#if CONFIG_RAYER_SPI == 1 - BITBANG_SPI_MASTER_RAYER, -#endif -}; - -struct bitbang_spi_master { - enum bitbang_spi_master_type type; - - /* Note that CS# is active low, so val=0 means the chip is active. */ - void (*set_cs) (int val); - void (*set_sck) (int val); - void (*set_mosi) (int val); - int (*get_miso) (void); -}; - #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) enum chipbustype { @@ -263,308 +165,11 @@ extern struct flashchip flashchips[]; -#if CONFIG_INTERNAL == 1 -struct penable { - uint16_t vendor_id; - uint16_t device_id; - int status; - const char *vendor_name; - const char *device_name; - int (*doit) (struct pci_dev *dev, const char *name); -}; - -extern const struct penable chipset_enables[]; - -struct board_pciid_enable { - /* Any device, but make it sensible, like the ISA bridge. */ - uint16_t first_vendor; - uint16_t first_device; - uint16_t first_card_vendor; - uint16_t first_card_device; - - /* Any device, but make it sensible, like - * the host bridge. May be NULL. - */ - uint16_t second_vendor; - uint16_t second_device; - uint16_t second_card_vendor; - uint16_t second_card_device; - - /* Pattern to match DMI entries */ - const char *dmi_pattern; - - /* The vendor / part name from the coreboot table. */ - const char *lb_vendor; - const char *lb_part; - - const char *vendor_name; - const char *board_name; - - int max_rom_decode_parallel; - int status; - int (*enable) (void); -}; - -extern const struct board_pciid_enable board_pciid_enables[]; - -struct board_info { - const char *vendor; - const char *name; - const int working; -#ifdef CONFIG_PRINT_WIKI - const char *url; - const char *note; -#endif -}; - -extern const struct board_info boards_known[]; -extern const struct board_info laptops_known[]; - -#endif - -/* udelay.c */ -void myusec_delay(int usecs); -void myusec_calibrate_delay(void); -void internal_delay(int usecs); - -#if NEED_PCI == 1 -/* pcidev.c */ - -extern uint32_t io_base_addr; -extern struct pci_access *pacc; -extern struct pci_dev *pcidev_dev; -struct pcidev_status { - uint16_t vendor_id; - uint16_t device_id; - int status; - const char *vendor_name; - const char *device_name; -}; -uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, const struct pcidev_status *devs); -uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, const struct pcidev_status *devs); -#endif - /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); void print_supported(void); -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1 -void print_supported_pcidevs(const struct pcidev_status *devs); -#endif void print_supported_wiki(void); -/* board_enable.c */ -void w836xx_ext_enter(uint16_t port); -void w836xx_ext_leave(uint16_t port); -int it8705f_write_enable(uint8_t port); -uint8_t sio_read(uint16_t port, uint8_t reg); -void sio_write(uint16_t port, uint8_t reg, uint8_t data); -void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); -int board_flash_enable(const char *vendor, const char *part); - -/* chipset_enable.c */ -int chipset_flash_enable(void); - -/* processor_enable.c */ -int processor_flash_enable(void); - -/* physmap.c */ -void *physmap(const char *descr, unsigned long phys_addr, size_t len); -void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len); -void physunmap(void *virt_addr, size_t len); -int setup_cpu_msr(int cpu); -void cleanup_cpu_msr(void); - -/* cbtable.c */ -void lb_vendor_dev_from_string(char *boardstring); -int coreboot_init(void); -extern char *lb_part, *lb_vendor; -extern int partvendor_from_cbtable; - -/* dmi.c */ -extern int has_dmi_support; -void dmi_init(void); -int dmi_match(const char *pattern); - -/* internal.c */ -#if NEED_PCI == 1 -struct superio { - uint16_t vendor; - uint16_t port; - uint16_t model; -}; -extern struct superio superio; -#define SUPERIO_VENDOR_NONE 0x0 -#define SUPERIO_VENDOR_ITE 0x1 -struct pci_dev *pci_dev_find_filter(struct pci_filter filter); -struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); -struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); -struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, - uint16_t card_vendor, uint16_t card_device); -#endif -void get_io_perms(void); -void release_io_perms(void); -#if CONFIG_INTERNAL == 1 -extern int is_laptop; -extern int force_boardenable; -extern int force_boardmismatch; -void probe_superio(void); -int internal_init(void); -int internal_shutdown(void); -void internal_chip_writeb(uint8_t val, chipaddr addr); -void internal_chip_writew(uint16_t val, chipaddr addr); -void internal_chip_writel(uint32_t val, chipaddr addr); -uint8_t internal_chip_readb(const chipaddr addr); -uint16_t internal_chip_readw(const chipaddr addr); -uint32_t internal_chip_readl(const chipaddr addr); -void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -#endif -void mmio_writeb(uint8_t val, void *addr); -void mmio_writew(uint16_t val, void *addr); -void mmio_writel(uint32_t val, void *addr); -uint8_t mmio_readb(void *addr); -uint16_t mmio_readw(void *addr); -uint32_t mmio_readl(void *addr); -void mmio_le_writeb(uint8_t val, void *addr); -void mmio_le_writew(uint16_t val, void *addr); -void mmio_le_writel(uint32_t val, void *addr); -uint8_t mmio_le_readb(void *addr); -uint16_t mmio_le_readw(void *addr); -uint32_t mmio_le_readl(void *addr); - -/* programmer.c */ -int noop_shutdown(void); -void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); -void fallback_unmap(void *virt_addr, size_t len); -uint8_t noop_chip_readb(const chipaddr addr); -void noop_chip_writeb(uint8_t val, chipaddr addr); -void fallback_chip_writew(uint16_t val, chipaddr addr); -void fallback_chip_writel(uint32_t val, chipaddr addr); -void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len); -uint16_t fallback_chip_readw(const chipaddr addr); -uint32_t fallback_chip_readl(const chipaddr addr); -void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); - -/* dummyflasher.c */ -#if CONFIG_DUMMY == 1 -int dummy_init(void); -int dummy_shutdown(void); -void *dummy_map(const char *descr, unsigned long phys_addr, size_t len); -void dummy_unmap(void *virt_addr, size_t len); -void dummy_chip_writeb(uint8_t val, chipaddr addr); -void dummy_chip_writew(uint16_t val, chipaddr addr); -void dummy_chip_writel(uint32_t val, chipaddr addr); -void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len); -uint8_t dummy_chip_readb(const chipaddr addr); -uint16_t dummy_chip_readw(const chipaddr addr); -uint32_t dummy_chip_readl(const chipaddr addr); -void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); -#endif - -/* nic3com.c */ -#if CONFIG_NIC3COM == 1 -int nic3com_init(void); -int nic3com_shutdown(void); -void nic3com_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nic3com_chip_readb(const chipaddr addr); -extern const struct pcidev_status nics_3com[]; -#endif - -/* gfxnvidia.c */ -#if CONFIG_GFXNVIDIA == 1 -int gfxnvidia_init(void); -int gfxnvidia_shutdown(void); -void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr); -uint8_t gfxnvidia_chip_readb(const chipaddr addr); -extern const struct pcidev_status gfx_nvidia[]; -#endif - -/* drkaiser.c */ -#if CONFIG_DRKAISER == 1 -int drkaiser_init(void); -int drkaiser_shutdown(void); -void drkaiser_chip_writeb(uint8_t val, chipaddr addr); -uint8_t drkaiser_chip_readb(const chipaddr addr); -extern const struct pcidev_status drkaiser_pcidev[]; -#endif - -/* nicrealtek.c */ -#if CONFIG_NICREALTEK == 1 -int nicrealtek_init(void); -int nicsmc1211_init(void); -int nicrealtek_shutdown(void); -void nicrealtek_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nicrealtek_chip_readb(const chipaddr addr); -extern const struct pcidev_status nics_realtek[]; -extern const struct pcidev_status nics_realteksmc1211[]; -#endif - -/* nicnatsemi.c */ -#if CONFIG_NICNATSEMI == 1 -int nicnatsemi_init(void); -int nicnatsemi_shutdown(void); -void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nicnatsemi_chip_readb(const chipaddr addr); -extern const struct pcidev_status nics_natsemi[]; -#endif - -/* satasii.c */ -#if CONFIG_SATASII == 1 -int satasii_init(void); -int satasii_shutdown(void); -void satasii_chip_writeb(uint8_t val, chipaddr addr); -uint8_t satasii_chip_readb(const chipaddr addr); -extern const struct pcidev_status satas_sii[]; -#endif - -/* atahpt.c */ -#if CONFIG_ATAHPT == 1 -int atahpt_init(void); -int atahpt_shutdown(void); -void atahpt_chip_writeb(uint8_t val, chipaddr addr); -uint8_t atahpt_chip_readb(const chipaddr addr); -extern const struct pcidev_status ata_hpt[]; -#endif - -/* ft2232_spi.c */ -#define FTDI_FT2232H 0x6010 -#define FTDI_FT4232H 0x6011 -int ft2232_spi_init(void); -int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); - -/* rayer_spi.c */ -#if CONFIG_RAYER_SPI == 1 -int rayer_spi_init(void); -#endif - -/* bitbang_spi.c */ -int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); -int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); - -/* buspirate_spi.c */ -struct buspirate_spispeeds { - const char *name; - const int speed; -}; -int buspirate_spi_init(void); -int buspirate_spi_shutdown(void); -int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); - -/* dediprog.c */ -int dediprog_init(void); -int dediprog_shutdown(void); -int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); - /* flashrom.c */ enum write_granularity { write_gran_1bit, @@ -572,15 +177,6 @@ write_gran_256bytes, }; extern enum chipbustype buses_supported; -struct decode_sizes { - uint32_t parallel; - uint32_t lpc; - uint32_t fwh; - uint32_t spi; -}; -extern struct decode_sizes max_rom_decode; -extern int programmer_may_write; -extern unsigned long flashbase; extern int verbose; extern const char * const flashrom_version; extern char *chip_to_probe; @@ -589,12 +185,9 @@ int erase_flash(struct flashchip *flash); struct flashchip *probe_flash(struct flashchip *first_flash, int force); int read_flash_to_file(struct flashchip *flash, char *filename); -void check_chip_supported(struct flashchip *flash); -int check_max_decode(enum chipbustype buses, uint32_t size); int min(int a, int b); int max(int a, int b); char *extract_param(char **haystack, char *needle, char *delim); -char *extract_programmer_param(char *param_name); int check_erased_range(struct flashchip *flash, int start, int len); int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); int need_erase(uint8_t *have, uint8_t *want, int len, enum write_granularity gran); @@ -634,130 +227,20 @@ int cli_classic(int argc, char *argv[]); /* layout.c */ -int show_id(uint8_t *bios, int size, int force); int read_romlayout(char *name); int find_romentry(char *name); int handle_romentries(uint8_t *buffer, struct flashchip *flash); /* spi.c */ -enum spi_controller { - SPI_CONTROLLER_NONE, -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - SPI_CONTROLLER_ICH7, - SPI_CONTROLLER_ICH9, - SPI_CONTROLLER_IT87XX, - SPI_CONTROLLER_SB600, - SPI_CONTROLLER_VIA, - SPI_CONTROLLER_WBSIO, -#endif -#endif -#if CONFIG_FT2232_SPI == 1 - SPI_CONTROLLER_FT2232, -#endif -#if CONFIG_DUMMY == 1 - SPI_CONTROLLER_DUMMY, -#endif -#if CONFIG_BUSPIRATE_SPI == 1 - SPI_CONTROLLER_BUSPIRATE, -#endif -#if CONFIG_DEDIPROG == 1 - SPI_CONTROLLER_DEDIPROG, -#endif -#if CONFIG_RAYER_SPI == 1 - SPI_CONTROLLER_RAYER, -#endif - SPI_CONTROLLER_INVALID /* This must always be the last entry. */ -}; -extern const int spi_programmer_count; struct spi_command { unsigned int writecnt; unsigned int readcnt; const unsigned char *writearr; unsigned char *readarr; }; -struct spi_programmer { - int (*command)(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); - int (*multicommand)(struct spi_command *cmds); - - /* Optimized functions for this programmer */ - int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len); - int (*write_256)(struct flashchip *flash, uint8_t *buf, int start, int len); -}; - -extern enum spi_controller spi_controller; -extern const struct spi_programmer spi_programmer[]; int spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int spi_send_multicommand(struct spi_command *cmds); -int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int default_spi_send_multicommand(struct spi_command *cmds); uint32_t spi_get_valid_read_addr(void); -/* ichspi.c */ -#if CONFIG_INTERNAL == 1 -extern uint32_t ichspi_bbar; -int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, - int ich_generation); -int via_init_spi(struct pci_dev *dev); -int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int ich_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len); -int ich_spi_send_multicommand(struct spi_command *cmds); -#endif - -/* it87spi.c */ -void enter_conf_mode_ite(uint16_t port); -void exit_conf_mode_ite(uint16_t port); -struct superio probe_superio_ite(void); -int init_superio_ite(void); -int it87spi_init(void); -int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); - -/* sb600spi.c */ -#if CONFIG_INTERNAL == 1 -int sb600_probe_spi(struct pci_dev *dev); -int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); -#endif - -/* wbsio_spi.c */ -#if CONFIG_INTERNAL == 1 -int wbsio_check_for_spi(void); -int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -#endif - -/* serprog.c */ -int serprog_init(void); -int serprog_shutdown(void); -void serprog_chip_writeb(uint8_t val, chipaddr addr); -uint8_t serprog_chip_readb(const chipaddr addr); -void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -void serprog_delay(int delay); - -/* serial.c */ -#if _WIN32 -typedef HANDLE fdtype; -#else -typedef int fdtype; -#endif - -void sp_flush_incoming(void); -fdtype sp_openserport(char *dev, unsigned int baud); -void __attribute__((noreturn)) sp_die(char *msg); -extern fdtype sp_fd; -int serialport_shutdown(void); -int serialport_write(unsigned char *buf, unsigned int writecnt); -int serialport_read(unsigned char *buf, unsigned int readcnt); - #endif /* !__FLASH_H__ */ Index: flashrom-programmer_h/drkaiser.c =================================================================== --- flashrom-programmer_h/drkaiser.c (Revision 1108) +++ flashrom-programmer_h/drkaiser.c (Arbeitskopie) @@ -20,6 +20,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_DRKAISER 0x1803 Index: flashrom-programmer_h/it87spi.c =================================================================== --- flashrom-programmer_h/it87spi.c (Revision 1108) +++ flashrom-programmer_h/it87spi.c (Arbeitskopie) @@ -29,6 +29,7 @@ #include <stdlib.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" #define ITE_SUPERIO_PORT1 0x2e Index: flashrom-programmer_h/pcidev.c =================================================================== --- flashrom-programmer_h/pcidev.c (Revision 1108) +++ flashrom-programmer_h/pcidev.c (Arbeitskopie) @@ -22,6 +22,7 @@ #include <string.h> #include <sys/types.h> #include "flash.h" +#include "programmer.h" uint32_t io_base_addr; struct pci_access *pacc; Index: flashrom-programmer_h/gfxnvidia.c =================================================================== --- flashrom-programmer_h/gfxnvidia.c (Revision 1108) +++ flashrom-programmer_h/gfxnvidia.c (Arbeitskopie) @@ -22,6 +22,7 @@ #include <string.h> #include <sys/types.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_NVIDIA 0x10de Index: flashrom-programmer_h/nicrealtek.c =================================================================== --- flashrom-programmer_h/nicrealtek.c (Revision 1108) +++ flashrom-programmer_h/nicrealtek.c (Arbeitskopie) @@ -22,6 +22,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_REALTEK 0x10ec #define PCI_VENDOR_ID_SMC1211 0x1113 Index: flashrom-programmer_h/serprog.c =================================================================== --- flashrom-programmer_h/serprog.c (Revision 1108) +++ flashrom-programmer_h/serprog.c (Arbeitskopie) @@ -22,7 +22,6 @@ #include <stdio.h> #include <stdlib.h> #include <unistd.h> -#include "flash.h" #include <string.h> #include <ctype.h> #include <fcntl.h> @@ -36,6 +35,8 @@ #include <errno.h> #include <inttypes.h> #include <termios.h> +#include "flash.h" +#include "programmer.h" #define MSGHEADER "serprog:" Index: flashrom-programmer_h/bitbang_spi.c =================================================================== --- flashrom-programmer_h/bitbang_spi.c (Revision 1108) +++ flashrom-programmer_h/bitbang_spi.c (Arbeitskopie) @@ -24,6 +24,7 @@ #include <ctype.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" /* Length of half a clock period in usecs. */ Index: flashrom-programmer_h/dummyflasher.c =================================================================== --- flashrom-programmer_h/dummyflasher.c (Revision 1108) +++ flashrom-programmer_h/dummyflasher.c (Arbeitskopie) @@ -24,6 +24,7 @@ #include <sys/types.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" static void tolower_string(char *str) { Index: flashrom-programmer_h/cli_classic.c =================================================================== --- flashrom-programmer_h/cli_classic.c (Revision 1108) +++ flashrom-programmer_h/cli_classic.c (Arbeitskopie) @@ -30,6 +30,7 @@ #include <getopt.h> #include "flash.h" #include "flashchips.h" +#include "programmer.h" static void cli_classic_usage(const char *name) { Index: flashrom-programmer_h/dmi.c =================================================================== --- flashrom-programmer_h/dmi.c (Revision 1108) +++ flashrom-programmer_h/dmi.c (Arbeitskopie) @@ -23,6 +23,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" int has_dmi_support = 0; Index: flashrom-programmer_h/internal.c =================================================================== --- flashrom-programmer_h/internal.c (Revision 1108) +++ flashrom-programmer_h/internal.c (Arbeitskopie) @@ -23,6 +23,7 @@ #include <stdlib.h> #include <sys/types.h> #include "flash.h" +#include "programmer.h" #if NEED_PCI == 1 struct pci_dev *pci_dev_find_filter(struct pci_filter filter) Index: flashrom-programmer_h/layout.c =================================================================== --- flashrom-programmer_h/layout.c (Revision 1108) +++ flashrom-programmer_h/layout.c (Arbeitskopie) @@ -23,6 +23,7 @@ #include <string.h> #include <ctype.h> #include "flash.h" +#include "programmer.h" #if CONFIG_INTERNAL == 1 char *mainboard_vendor = NULL; Index: flashrom-programmer_h/print_wiki.c =================================================================== --- flashrom-programmer_h/print_wiki.c (Revision 1108) +++ flashrom-programmer_h/print_wiki.c (Arbeitskopie) @@ -25,6 +25,7 @@ #include <time.h> #include "flash.h" #include "flashchips.h" +#include "programmer.h" static const char * const wiki_header = "= Supported devices =\n\n\ <div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ Index: flashrom-programmer_h/ichspi.c =================================================================== --- flashrom-programmer_h/ichspi.c (Revision 1108) +++ flashrom-programmer_h/ichspi.c (Arbeitskopie) @@ -38,6 +38,7 @@ #include <string.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" /* ICH9 controller register definition */ Index: flashrom-programmer_h/nicnatsemi.c =================================================================== --- flashrom-programmer_h/nicnatsemi.c (Revision 1108) +++ flashrom-programmer_h/nicnatsemi.c (Arbeitskopie) @@ -22,6 +22,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_NATSEMI 0x100b Index: flashrom-programmer_h/cbtable.c =================================================================== --- flashrom-programmer_h/cbtable.c (Revision 1108) +++ flashrom-programmer_h/cbtable.c (Arbeitskopie) @@ -28,6 +28,7 @@ #include <sys/types.h> #include <string.h> #include "flash.h" +#include "programmer.h" #include "coreboot_tables.h" char *lb_part = NULL, *lb_vendor = NULL; Index: flashrom-programmer_h/rayer_spi.c =================================================================== --- flashrom-programmer_h/rayer_spi.c (Revision 1108) +++ flashrom-programmer_h/rayer_spi.c (Arbeitskopie) @@ -31,6 +31,7 @@ #if defined(__i386__) || defined(__x86_64__) #include "flash.h" +#include "programmer.h" /* We have two sets of pins, out and in. The numbers for both sets are * independent and are bitshift values, not real pin numbers. Index: flashrom-programmer_h/dediprog.c =================================================================== --- flashrom-programmer_h/dediprog.c (Revision 1108) +++ flashrom-programmer_h/dediprog.c (Arbeitskopie) @@ -21,6 +21,7 @@ #include <usb.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" #define DEFAULT_TIMEOUT 3000 Index: flashrom-programmer_h/spi25.c =================================================================== --- flashrom-programmer_h/spi25.c (Revision 1108) +++ flashrom-programmer_h/spi25.c (Arbeitskopie) @@ -26,6 +26,7 @@ #include "flash.h" #include "flashchips.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" void spi_prettyprint_status_register(struct flashchip *flash); Index: flashrom-programmer_h/buspirate_spi.c =================================================================== --- flashrom-programmer_h/buspirate_spi.c (Revision 1108) +++ flashrom-programmer_h/buspirate_spi.c (Arbeitskopie) @@ -24,6 +24,7 @@ #include <ctype.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" /* Change this to #define if you want to test without a serial implementation */ Index: flashrom-programmer_h/serial.c =================================================================== --- flashrom-programmer_h/serial.c (Revision 1108) +++ flashrom-programmer_h/serial.c (Arbeitskopie) @@ -22,7 +22,6 @@ #include <stdio.h> #include <stdlib.h> #include <unistd.h> -#include "flash.h" #include <string.h> #include <ctype.h> #include <fcntl.h> @@ -35,6 +34,8 @@ #else #include <termios.h> #endif +#include "flash.h" +#include "programmer.h" fdtype sp_fd; Index: flashrom-programmer_h/atahpt.c =================================================================== --- flashrom-programmer_h/atahpt.c (Revision 1108) +++ flashrom-programmer_h/atahpt.c (Arbeitskopie) @@ -22,6 +22,7 @@ #include <string.h> #include <sys/types.h> #include "flash.h" +#include "programmer.h" #define BIOS_ROM_ADDR 0x90 #define BIOS_ROM_DATA 0x94 Index: flashrom-programmer_h/processor_enable.c =================================================================== --- flashrom-programmer_h/processor_enable.c (Revision 1108) +++ flashrom-programmer_h/processor_enable.c (Arbeitskopie) @@ -22,6 +22,7 @@ */ #include "flash.h" +#include "programmer.h" #if defined(__i386__) || defined(__x86_64__) Index: flashrom-programmer_h/spi.c =================================================================== --- flashrom-programmer_h/spi.c (Revision 1108) +++ flashrom-programmer_h/spi.c (Arbeitskopie) @@ -25,6 +25,7 @@ #include "flash.h" #include "flashchips.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" enum spi_controller spi_controller = SPI_CONTROLLER_NONE; Index: flashrom-programmer_h/nic3com.c =================================================================== --- flashrom-programmer_h/nic3com.c (Revision 1108) +++ flashrom-programmer_h/nic3com.c (Arbeitskopie) @@ -22,6 +22,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define BIOS_ROM_ADDR 0x04 #define BIOS_ROM_DATA 0x08 Index: flashrom-programmer_h/ft2232_spi.c =================================================================== --- flashrom-programmer_h/ft2232_spi.c (Revision 1108) +++ flashrom-programmer_h/ft2232_spi.c (Arbeitskopie) @@ -27,6 +27,7 @@ #include <ctype.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" #include <ftdi.h> Index: flashrom-programmer_h/satasii.c =================================================================== --- flashrom-programmer_h/satasii.c (Revision 1108) +++ flashrom-programmer_h/satasii.c (Arbeitskopie) @@ -22,6 +22,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_SII 0x1095 Index: flashrom-programmer_h/wbsio_spi.c =================================================================== --- flashrom-programmer_h/wbsio_spi.c (Revision 1108) +++ flashrom-programmer_h/wbsio_spi.c (Arbeitskopie) @@ -22,6 +22,7 @@ #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" #define WBSIO_PORT1 0x2e Index: flashrom-programmer_h/chipset_enable.c =================================================================== --- flashrom-programmer_h/chipset_enable.c (Revision 1108) +++ flashrom-programmer_h/chipset_enable.c (Arbeitskopie) @@ -32,6 +32,7 @@ #include <sys/types.h> #include <unistd.h> #include "flash.h" +#include "programmer.h" #if defined(__i386__) || defined(__x86_64__) Index: flashrom-programmer_h/sb600spi.c =================================================================== --- flashrom-programmer_h/sb600spi.c (Revision 1108) +++ flashrom-programmer_h/sb600spi.c (Arbeitskopie) @@ -25,6 +25,7 @@ #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" /* This struct is unused, but helps visualize the SB600 SPI BAR layout. Index: flashrom-programmer_h/flashrom.c =================================================================== --- flashrom-programmer_h/flashrom.c (Revision 1108) +++ flashrom-programmer_h/flashrom.c (Arbeitskopie) @@ -33,6 +33,7 @@ #endif #include "flash.h" #include "flashchips.h" +#include "programmer.h" const char * const flashrom_version = FLASHROM_VERSION; char *chip_to_probe = NULL; Index: flashrom-programmer_h/programmer.h =================================================================== --- flashrom-programmer_h/programmer.h (Revision 1108) +++ flashrom-programmer_h/programmer.h (Arbeitskopie) @@ -21,20 +21,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef __FLASH_H__ -#define __FLASH_H__ 1 +#ifndef __PROGRAMMER_H__ +#define __PROGRAMMER_H__ 1 -#include <stdint.h> -#include <stddef.h> -#include "hwaccess.h" -#ifdef _WIN32 -#include <windows.h> -#undef min -#undef max -#endif - -typedef unsigned long chipaddr; - enum programmer { #if CONFIG_INTERNAL == 1 PROGRAMMER_INTERNAL, @@ -113,22 +102,8 @@ extern const struct programmer_entry programmer_table[]; -int register_shutdown(void (*function) (void *data), void *data); - int programmer_init(char *param); int programmer_shutdown(void); -void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, - size_t len); -void programmer_unmap_flash_region(void *virt_addr, size_t len); -void chip_writeb(uint8_t val, chipaddr addr); -void chip_writew(uint16_t val, chipaddr addr); -void chip_writel(uint32_t val, chipaddr addr); -void chip_writen(uint8_t *buf, chipaddr addr, size_t len); -uint8_t chip_readb(const chipaddr addr); -uint16_t chip_readw(const chipaddr addr); -uint32_t chip_readl(const chipaddr addr); -void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -void programmer_delay(int usecs); enum bitbang_spi_master_type { BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */ @@ -147,122 +122,6 @@ int (*get_miso) (void); }; -#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) - -enum chipbustype { - CHIP_BUSTYPE_NONE = 0, - CHIP_BUSTYPE_PARALLEL = 1 << 0, - CHIP_BUSTYPE_LPC = 1 << 1, - CHIP_BUSTYPE_FWH = 1 << 2, - CHIP_BUSTYPE_SPI = 1 << 3, - CHIP_BUSTYPE_NONSPI = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH, - CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI, -}; - -/* - * How many different contiguous runs of erase blocks with one size each do - * we have for a given erase function? - */ -#define NUM_ERASEREGIONS 5 - -/* - * How many different erase functions do we have per chip? - */ -#define NUM_ERASEFUNCTIONS 5 - -#define FEATURE_REGISTERMAP (1 << 0) -#define FEATURE_BYTEWRITES (1 << 1) -#define FEATURE_LONG_RESET (0 << 4) -#define FEATURE_SHORT_RESET (1 << 4) -#define FEATURE_EITHER_RESET FEATURE_LONG_RESET -#define FEATURE_ADDR_FULL (0 << 2) -#define FEATURE_ADDR_MASK (3 << 2) -#define FEATURE_ADDR_2AA (1 << 2) -#define FEATURE_ADDR_AAA (2 << 2) -#define FEATURE_ADDR_SHIFTED (1 << 5) - -struct flashchip { - const char *vendor; - const char *name; - - enum chipbustype bustype; - - /* - * With 32bit manufacture_id and model_id we can cover IDs up to - * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's - * Identification code. - */ - uint32_t manufacture_id; - uint32_t model_id; - - int total_size; - int page_size; - int feature_bits; - - /* - * Indicate if flashrom has been tested with this flash chip and if - * everything worked correctly. - */ - uint32_t tested; - - int (*probe) (struct flashchip *flash); - - /* Delay after "enter/exit ID mode" commands in microseconds. */ - int probe_timing; - - /* - * Erase blocks and associated erase function. Any chip erase function - * is stored as chip-sized virtual block together with said function. - */ - struct block_eraser { - struct eraseblock{ - unsigned int size; /* Eraseblock size */ - unsigned int count; /* Number of contiguous blocks with that size */ - } eraseblocks[NUM_ERASEREGIONS]; - int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen); - } block_erasers[NUM_ERASEFUNCTIONS]; - - int (*printlock) (struct flashchip *flash); - int (*unlock) (struct flashchip *flash); - int (*write) (struct flashchip *flash, uint8_t *buf); - int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len); - - /* Some flash devices have an additional register space. */ - chipaddr virtual_memory; - chipaddr virtual_registers; -}; - -#define TEST_UNTESTED 0 - -#define TEST_OK_PROBE (1 << 0) -#define TEST_OK_READ (1 << 1) -#define TEST_OK_ERASE (1 << 2) -#define TEST_OK_WRITE (1 << 3) -#define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ) -#define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE) -#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE) -#define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE) -#define TEST_OK_MASK 0x0f - -#define TEST_BAD_PROBE (1 << 4) -#define TEST_BAD_READ (1 << 5) -#define TEST_BAD_ERASE (1 << 6) -#define TEST_BAD_WRITE (1 << 7) -#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) -#define TEST_BAD_MASK 0xf0 - -/* Timing used in probe routines. ZERO is -2 to differentiate between an unset - * field and zero delay. - * - * SPI devices will always have zero delay and ignore this field. - */ -#define TIMING_FIXME -1 -/* this is intentionally same value as fixme */ -#define TIMING_IGNORED -1 -#define TIMING_ZERO -2 - -extern struct flashchip flashchips[]; - #if CONFIG_INTERNAL == 1 struct penable { uint16_t vendor_id; @@ -319,7 +178,6 @@ extern const struct board_info boards_known[]; extern const struct board_info laptops_known[]; - #endif /* udelay.c */ @@ -329,7 +187,6 @@ #if NEED_PCI == 1 /* pcidev.c */ - extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_dev *pcidev_dev; @@ -345,12 +202,9 @@ #endif /* print.c */ -char *flashbuses_to_text(enum chipbustype bustype); -void print_supported(void); #if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1 void print_supported_pcidevs(const struct pcidev_status *devs); #endif -void print_supported_wiki(void); /* board_enable.c */ void w836xx_ext_enter(uint16_t port); @@ -566,12 +420,6 @@ int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); /* flashrom.c */ -enum write_granularity { - write_gran_1bit, - write_gran_1byte, - write_gran_256bytes, -}; -extern enum chipbustype buses_supported; struct decode_sizes { uint32_t parallel; uint32_t lpc; @@ -581,63 +429,12 @@ extern struct decode_sizes max_rom_decode; extern int programmer_may_write; extern unsigned long flashbase; -extern int verbose; -extern const char * const flashrom_version; -extern char *chip_to_probe; -void map_flash_registers(struct flashchip *flash); -int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len); -int erase_flash(struct flashchip *flash); -struct flashchip *probe_flash(struct flashchip *first_flash, int force); -int read_flash_to_file(struct flashchip *flash, char *filename); void check_chip_supported(struct flashchip *flash); int check_max_decode(enum chipbustype buses, uint32_t size); -int min(int a, int b); -int max(int a, int b); -char *extract_param(char **haystack, char *needle, char *delim); char *extract_programmer_param(char *param_name); -int check_erased_range(struct flashchip *flash, int start, int len); -int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); -int need_erase(uint8_t *have, uint8_t *want, int len, enum write_granularity gran); -char *strcat_realloc(char *dest, const char *src); -void print_version(void); -void print_banner(void); -int selfcheck(void); -int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it); -#define OK 0 -#define NT 1 /* Not tested */ - -/* Something happened that shouldn't happen, but we can go on */ -#define ERROR_NONFATAL 0x100 - -/* cli_output.c */ -/* Let gcc and clang check for correct printf-style format strings. */ -int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3))); -#define MSG_ERROR 0 -#define MSG_INFO 1 -#define MSG_DEBUG 2 -#define MSG_BARF 3 -#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */ -#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */ -#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */ -#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */ -#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */ -#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */ -#define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */ -#define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */ -#define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */ -#define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */ -#define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */ -#define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */ - -/* cli_classic.c */ -int cli_classic(int argc, char *argv[]); - /* layout.c */ int show_id(uint8_t *bios, int size, int force); -int read_romlayout(char *name); -int find_romentry(char *name); -int handle_romentries(uint8_t *buffer, struct flashchip *flash); /* spi.c */ enum spi_controller { @@ -670,12 +467,6 @@ SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; -struct spi_command { - unsigned int writecnt; - unsigned int readcnt; - const unsigned char *writearr; - unsigned char *readarr; -}; struct spi_programmer { int (*command)(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); @@ -688,13 +479,9 @@ extern enum spi_controller spi_controller; extern const struct spi_programmer spi_programmer[]; -int spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int spi_send_multicommand(struct spi_command *cmds); int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int default_spi_send_multicommand(struct spi_command *cmds); -uint32_t spi_get_valid_read_addr(void); /* ichspi.c */ #if CONFIG_INTERNAL == 1 @@ -760,4 +547,4 @@ int serialport_write(unsigned char *buf, unsigned int writecnt); int serialport_read(unsigned char *buf, unsigned int readcnt); -#endif /* !__FLASH_H__ */ +#endif /* !__PROGRAMMER_H__ */ Index: flashrom-programmer_h/print.c =================================================================== --- flashrom-programmer_h/print.c (Revision 1108) +++ flashrom-programmer_h/print.c (Arbeitskopie) @@ -24,6 +24,7 @@ #include <stdlib.h> #include "flash.h" #include "flashchips.h" +#include "programmer.h" /* * Return a string corresponding to the bustype parameter. Index: flashrom-programmer_h/board_enable.c =================================================================== --- flashrom-programmer_h/board_enable.c (Revision 1108) +++ flashrom-programmer_h/board_enable.c (Arbeitskopie) @@ -26,6 +26,7 @@ #include <string.h> #include "flash.h" +#include "programmer.h" #if defined(__i386__) || defined(__x86_64__) /* -- http://www.hailfinger.org/

2 2

[commit] r1112 - trunk
by repository service 28 Jul '10

28 Jul '10

Author: hailfinger Date: Wed Jul 28 00:41:39 2010 New Revision: 1112 URL: http://flashrom.org/trac/coreboot/changeset/1112 Log: Split off programmer.h from flash.h. Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Added: trunk/programmer.h - copied, changed from r1111, trunk/flash.h Modified: trunk/atahpt.c trunk/bitbang_spi.c trunk/board_enable.c trunk/buspirate_spi.c trunk/cbtable.c trunk/chipset_enable.c trunk/cli_classic.c trunk/dediprog.c trunk/dmi.c trunk/drkaiser.c trunk/dummyflasher.c trunk/flash.h trunk/flashrom.c trunk/ft2232_spi.c trunk/gfxnvidia.c trunk/ichspi.c trunk/internal.c trunk/it87spi.c trunk/layout.c trunk/nic3com.c trunk/nicnatsemi.c trunk/nicrealtek.c trunk/pcidev.c trunk/print.c trunk/print_wiki.c trunk/processor_enable.c trunk/rayer_spi.c trunk/satasii.c trunk/sb600spi.c trunk/serial.c trunk/serprog.c trunk/spi.c trunk/spi25.c trunk/wbsio_spi.c Modified: trunk/atahpt.c ============================================================================== --- trunk/atahpt.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/atahpt.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,6 +22,7 @@ #include <string.h> #include <sys/types.h> #include "flash.h" +#include "programmer.h" #define BIOS_ROM_ADDR 0x90 #define BIOS_ROM_DATA 0x94 Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/bitbang_spi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -24,6 +24,7 @@ #include <ctype.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" /* Length of half a clock period in usecs. */ Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/board_enable.c Wed Jul 28 00:41:39 2010 (r1112) @@ -26,6 +26,7 @@ #include <string.h> #include "flash.h" +#include "programmer.h" #if defined(__i386__) || defined(__x86_64__) /* Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/buspirate_spi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -24,6 +24,7 @@ #include <ctype.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" /* Change this to #define if you want to test without a serial implementation */ Modified: trunk/cbtable.c ============================================================================== --- trunk/cbtable.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/cbtable.c Wed Jul 28 00:41:39 2010 (r1112) @@ -28,6 +28,7 @@ #include <sys/types.h> #include <string.h> #include "flash.h" +#include "programmer.h" #include "coreboot_tables.h" char *lb_part = NULL, *lb_vendor = NULL; Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/chipset_enable.c Wed Jul 28 00:41:39 2010 (r1112) @@ -32,6 +32,7 @@ #include <sys/types.h> #include <unistd.h> #include "flash.h" +#include "programmer.h" #define NOT_DONE_YET 1 Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/cli_classic.c Wed Jul 28 00:41:39 2010 (r1112) @@ -30,6 +30,7 @@ #include <getopt.h> #include "flash.h" #include "flashchips.h" +#include "programmer.h" static void cli_classic_usage(const char *name) { Modified: trunk/dediprog.c ============================================================================== --- trunk/dediprog.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/dediprog.c Wed Jul 28 00:41:39 2010 (r1112) @@ -21,6 +21,7 @@ #include <usb.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" #define DEFAULT_TIMEOUT 3000 Modified: trunk/dmi.c ============================================================================== --- trunk/dmi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/dmi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -23,6 +23,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" int has_dmi_support = 0; Modified: trunk/drkaiser.c ============================================================================== --- trunk/drkaiser.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/drkaiser.c Wed Jul 28 00:41:39 2010 (r1112) @@ -20,6 +20,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_DRKAISER 0x1803 Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/dummyflasher.c Wed Jul 28 00:41:39 2010 (r1112) @@ -24,6 +24,7 @@ #include <sys/types.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" static void tolower_string(char *str) { Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/flash.h Wed Jul 28 00:41:39 2010 (r1112) @@ -35,88 +35,7 @@ typedef unsigned long chipaddr; -enum programmer { -#if CONFIG_INTERNAL == 1 - PROGRAMMER_INTERNAL, -#endif -#if CONFIG_DUMMY == 1 - PROGRAMMER_DUMMY, -#endif -#if CONFIG_NIC3COM == 1 - PROGRAMMER_NIC3COM, -#endif -#if CONFIG_NICREALTEK == 1 - PROGRAMMER_NICREALTEK, - PROGRAMMER_NICREALTEK2, -#endif -#if CONFIG_NICNATSEMI == 1 - PROGRAMMER_NICNATSEMI, -#endif -#if CONFIG_GFXNVIDIA == 1 - PROGRAMMER_GFXNVIDIA, -#endif -#if CONFIG_DRKAISER == 1 - PROGRAMMER_DRKAISER, -#endif -#if CONFIG_SATASII == 1 - PROGRAMMER_SATASII, -#endif -#if CONFIG_ATAHPT == 1 - PROGRAMMER_ATAHPT, -#endif -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - PROGRAMMER_IT87SPI, -#endif -#endif -#if CONFIG_FT2232_SPI == 1 - PROGRAMMER_FT2232_SPI, -#endif -#if CONFIG_SERPROG == 1 - PROGRAMMER_SERPROG, -#endif -#if CONFIG_BUSPIRATE_SPI == 1 - PROGRAMMER_BUSPIRATE_SPI, -#endif -#if CONFIG_DEDIPROG == 1 - PROGRAMMER_DEDIPROG, -#endif -#if CONFIG_RAYER_SPI == 1 - PROGRAMMER_RAYER_SPI, -#endif - PROGRAMMER_INVALID /* This must always be the last entry. */ -}; - -extern enum programmer programmer; - -struct programmer_entry { - const char *vendor; - const char *name; - - int (*init) (void); - int (*shutdown) (void); - - void * (*map_flash_region) (const char *descr, unsigned long phys_addr, - size_t len); - void (*unmap_flash_region) (void *virt_addr, size_t len); - - void (*chip_writeb) (uint8_t val, chipaddr addr); - void (*chip_writew) (uint16_t val, chipaddr addr); - void (*chip_writel) (uint32_t val, chipaddr addr); - void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len); - uint8_t (*chip_readb) (const chipaddr addr); - uint16_t (*chip_readw) (const chipaddr addr); - uint32_t (*chip_readl) (const chipaddr addr); - void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len); - void (*delay) (int usecs); -}; - -extern const struct programmer_entry programmer_table[]; - int register_shutdown(void (*function) (void *data), void *data); - -int programmer_init(char *param); -int programmer_shutdown(void); void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, size_t len); void programmer_unmap_flash_region(void *virt_addr, size_t len); @@ -130,23 +49,6 @@ void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void programmer_delay(int usecs); -enum bitbang_spi_master_type { - BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */ -#if CONFIG_RAYER_SPI == 1 - BITBANG_SPI_MASTER_RAYER, -#endif -}; - -struct bitbang_spi_master { - enum bitbang_spi_master_type type; - - /* Note that CS# is active low, so val=0 means the chip is active. */ - void (*set_cs) (int val); - void (*set_sck) (int val); - void (*set_mosi) (int val); - int (*get_miso) (void); -}; - #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) enum chipbustype { @@ -263,316 +165,11 @@ extern struct flashchip flashchips[]; -#if CONFIG_INTERNAL == 1 -struct penable { - uint16_t vendor_id; - uint16_t device_id; - int status; - const char *vendor_name; - const char *device_name; - int (*doit) (struct pci_dev *dev, const char *name); -}; - -extern const struct penable chipset_enables[]; - -struct board_pciid_enable { - /* Any device, but make it sensible, like the ISA bridge. */ - uint16_t first_vendor; - uint16_t first_device; - uint16_t first_card_vendor; - uint16_t first_card_device; - - /* Any device, but make it sensible, like - * the host bridge. May be NULL. - */ - uint16_t second_vendor; - uint16_t second_device; - uint16_t second_card_vendor; - uint16_t second_card_device; - - /* Pattern to match DMI entries */ - const char *dmi_pattern; - - /* The vendor / part name from the coreboot table. */ - const char *lb_vendor; - const char *lb_part; - - const char *vendor_name; - const char *board_name; - - int max_rom_decode_parallel; - int status; - int (*enable) (void); -}; - -extern const struct board_pciid_enable board_pciid_enables[]; - -struct board_info { - const char *vendor; - const char *name; - const int working; -#ifdef CONFIG_PRINT_WIKI - const char *url; - const char *note; -#endif -}; - -extern const struct board_info boards_known[]; -extern const struct board_info laptops_known[]; - -#endif - -/* udelay.c */ -void myusec_delay(int usecs); -void myusec_calibrate_delay(void); -void internal_delay(int usecs); - -#if NEED_PCI == 1 -/* pcidev.c */ - -extern uint32_t io_base_addr; -extern struct pci_access *pacc; -extern struct pci_dev *pcidev_dev; -struct pcidev_status { - uint16_t vendor_id; - uint16_t device_id; - int status; - const char *vendor_name; - const char *device_name; -}; -uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, const struct pcidev_status *devs); -uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, const struct pcidev_status *devs); -#endif - /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); void print_supported(void); -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1 -void print_supported_pcidevs(const struct pcidev_status *devs); -#endif void print_supported_wiki(void); -/* board_enable.c */ -void w836xx_ext_enter(uint16_t port); -void w836xx_ext_leave(uint16_t port); -int it8705f_write_enable(uint8_t port); -uint8_t sio_read(uint16_t port, uint8_t reg); -void sio_write(uint16_t port, uint8_t reg, uint8_t data); -void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); -int board_flash_enable(const char *vendor, const char *part); - -/* chipset_enable.c */ -int chipset_flash_enable(void); - -/* processor_enable.c */ -int processor_flash_enable(void); - -/* physmap.c */ -void *physmap(const char *descr, unsigned long phys_addr, size_t len); -void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len); -void physunmap(void *virt_addr, size_t len); -int setup_cpu_msr(int cpu); -void cleanup_cpu_msr(void); - -/* cbtable.c */ -void lb_vendor_dev_from_string(char *boardstring); -int coreboot_init(void); -extern char *lb_part, *lb_vendor; -extern int partvendor_from_cbtable; - -/* dmi.c */ -extern int has_dmi_support; -void dmi_init(void); -int dmi_match(const char *pattern); - -/* internal.c */ -#if NEED_PCI == 1 -struct superio { - uint16_t vendor; - uint16_t port; - uint16_t model; -}; -extern struct superio superio; -#define SUPERIO_VENDOR_NONE 0x0 -#define SUPERIO_VENDOR_ITE 0x1 -struct pci_dev *pci_dev_find_filter(struct pci_filter filter); -struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); -struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); -struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, - uint16_t card_vendor, uint16_t card_device); -#endif -void get_io_perms(void); -void release_io_perms(void); -#if CONFIG_INTERNAL == 1 -extern int is_laptop; -extern int force_boardenable; -extern int force_boardmismatch; -void probe_superio(void); -int internal_init(void); -int internal_shutdown(void); -void internal_chip_writeb(uint8_t val, chipaddr addr); -void internal_chip_writew(uint16_t val, chipaddr addr); -void internal_chip_writel(uint32_t val, chipaddr addr); -uint8_t internal_chip_readb(const chipaddr addr); -uint16_t internal_chip_readw(const chipaddr addr); -uint32_t internal_chip_readl(const chipaddr addr); -void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -#endif - -/* hwaccess.c */ -void mmio_writeb(uint8_t val, void *addr); -void mmio_writew(uint16_t val, void *addr); -void mmio_writel(uint32_t val, void *addr); -uint8_t mmio_readb(void *addr); -uint16_t mmio_readw(void *addr); -uint32_t mmio_readl(void *addr); -void mmio_le_writeb(uint8_t val, void *addr); -void mmio_le_writew(uint16_t val, void *addr); -void mmio_le_writel(uint32_t val, void *addr); -uint8_t mmio_le_readb(void *addr); -uint16_t mmio_le_readw(void *addr); -uint32_t mmio_le_readl(void *addr); -#define pci_mmio_writeb mmio_le_writeb -#define pci_mmio_writew mmio_le_writew -#define pci_mmio_writel mmio_le_writel -#define pci_mmio_readb mmio_le_readb -#define pci_mmio_readw mmio_le_readw -#define pci_mmio_readl mmio_le_readl - -/* programmer.c */ -int noop_shutdown(void); -void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); -void fallback_unmap(void *virt_addr, size_t len); -uint8_t noop_chip_readb(const chipaddr addr); -void noop_chip_writeb(uint8_t val, chipaddr addr); -void fallback_chip_writew(uint16_t val, chipaddr addr); -void fallback_chip_writel(uint32_t val, chipaddr addr); -void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len); -uint16_t fallback_chip_readw(const chipaddr addr); -uint32_t fallback_chip_readl(const chipaddr addr); -void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); - -/* dummyflasher.c */ -#if CONFIG_DUMMY == 1 -int dummy_init(void); -int dummy_shutdown(void); -void *dummy_map(const char *descr, unsigned long phys_addr, size_t len); -void dummy_unmap(void *virt_addr, size_t len); -void dummy_chip_writeb(uint8_t val, chipaddr addr); -void dummy_chip_writew(uint16_t val, chipaddr addr); -void dummy_chip_writel(uint32_t val, chipaddr addr); -void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len); -uint8_t dummy_chip_readb(const chipaddr addr); -uint16_t dummy_chip_readw(const chipaddr addr); -uint32_t dummy_chip_readl(const chipaddr addr); -void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); -#endif - -/* nic3com.c */ -#if CONFIG_NIC3COM == 1 -int nic3com_init(void); -int nic3com_shutdown(void); -void nic3com_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nic3com_chip_readb(const chipaddr addr); -extern const struct pcidev_status nics_3com[]; -#endif - -/* gfxnvidia.c */ -#if CONFIG_GFXNVIDIA == 1 -int gfxnvidia_init(void); -int gfxnvidia_shutdown(void); -void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr); -uint8_t gfxnvidia_chip_readb(const chipaddr addr); -extern const struct pcidev_status gfx_nvidia[]; -#endif - -/* drkaiser.c */ -#if CONFIG_DRKAISER == 1 -int drkaiser_init(void); -int drkaiser_shutdown(void); -void drkaiser_chip_writeb(uint8_t val, chipaddr addr); -uint8_t drkaiser_chip_readb(const chipaddr addr); -extern const struct pcidev_status drkaiser_pcidev[]; -#endif - -/* nicrealtek.c */ -#if CONFIG_NICREALTEK == 1 -int nicrealtek_init(void); -int nicsmc1211_init(void); -int nicrealtek_shutdown(void); -void nicrealtek_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nicrealtek_chip_readb(const chipaddr addr); -extern const struct pcidev_status nics_realtek[]; -extern const struct pcidev_status nics_realteksmc1211[]; -#endif - -/* nicnatsemi.c */ -#if CONFIG_NICNATSEMI == 1 -int nicnatsemi_init(void); -int nicnatsemi_shutdown(void); -void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nicnatsemi_chip_readb(const chipaddr addr); -extern const struct pcidev_status nics_natsemi[]; -#endif - -/* satasii.c */ -#if CONFIG_SATASII == 1 -int satasii_init(void); -int satasii_shutdown(void); -void satasii_chip_writeb(uint8_t val, chipaddr addr); -uint8_t satasii_chip_readb(const chipaddr addr); -extern const struct pcidev_status satas_sii[]; -#endif - -/* atahpt.c */ -#if CONFIG_ATAHPT == 1 -int atahpt_init(void); -int atahpt_shutdown(void); -void atahpt_chip_writeb(uint8_t val, chipaddr addr); -uint8_t atahpt_chip_readb(const chipaddr addr); -extern const struct pcidev_status ata_hpt[]; -#endif - -/* ft2232_spi.c */ -#define FTDI_FT2232H 0x6010 -#define FTDI_FT4232H 0x6011 -int ft2232_spi_init(void); -int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); - -/* rayer_spi.c */ -#if CONFIG_RAYER_SPI == 1 -int rayer_spi_init(void); -#endif - -/* bitbang_spi.c */ -int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); -int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); - -/* buspirate_spi.c */ -struct buspirate_spispeeds { - const char *name; - const int speed; -}; -int buspirate_spi_init(void); -int buspirate_spi_shutdown(void); -int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); - -/* dediprog.c */ -int dediprog_init(void); -int dediprog_shutdown(void); -int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); - /* flashrom.c */ enum write_granularity { write_gran_1bit, @@ -580,15 +177,6 @@ write_gran_256bytes, }; extern enum chipbustype buses_supported; -struct decode_sizes { - uint32_t parallel; - uint32_t lpc; - uint32_t fwh; - uint32_t spi; -}; -extern struct decode_sizes max_rom_decode; -extern int programmer_may_write; -extern unsigned long flashbase; extern int verbose; extern const char * const flashrom_version; extern char *chip_to_probe; @@ -597,12 +185,9 @@ int erase_flash(struct flashchip *flash); struct flashchip *probe_flash(struct flashchip *first_flash, int force); int read_flash_to_file(struct flashchip *flash, char *filename); -void check_chip_supported(struct flashchip *flash); -int check_max_decode(enum chipbustype buses, uint32_t size); int min(int a, int b); int max(int a, int b); char *extract_param(char **haystack, char *needle, char *delim); -char *extract_programmer_param(char *param_name); int check_erased_range(struct flashchip *flash, int start, int len); int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); int need_erase(uint8_t *have, uint8_t *want, int len, enum write_granularity gran); @@ -642,130 +227,20 @@ int cli_classic(int argc, char *argv[]); /* layout.c */ -int show_id(uint8_t *bios, int size, int force); int read_romlayout(char *name); int find_romentry(char *name); int handle_romentries(uint8_t *buffer, struct flashchip *flash); /* spi.c */ -enum spi_controller { - SPI_CONTROLLER_NONE, -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - SPI_CONTROLLER_ICH7, - SPI_CONTROLLER_ICH9, - SPI_CONTROLLER_IT87XX, - SPI_CONTROLLER_SB600, - SPI_CONTROLLER_VIA, - SPI_CONTROLLER_WBSIO, -#endif -#endif -#if CONFIG_FT2232_SPI == 1 - SPI_CONTROLLER_FT2232, -#endif -#if CONFIG_DUMMY == 1 - SPI_CONTROLLER_DUMMY, -#endif -#if CONFIG_BUSPIRATE_SPI == 1 - SPI_CONTROLLER_BUSPIRATE, -#endif -#if CONFIG_DEDIPROG == 1 - SPI_CONTROLLER_DEDIPROG, -#endif -#if CONFIG_RAYER_SPI == 1 - SPI_CONTROLLER_RAYER, -#endif - SPI_CONTROLLER_INVALID /* This must always be the last entry. */ -}; -extern const int spi_programmer_count; struct spi_command { unsigned int writecnt; unsigned int readcnt; const unsigned char *writearr; unsigned char *readarr; }; -struct spi_programmer { - int (*command)(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); - int (*multicommand)(struct spi_command *cmds); - - /* Optimized functions for this programmer */ - int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len); - int (*write_256)(struct flashchip *flash, uint8_t *buf, int start, int len); -}; - -extern enum spi_controller spi_controller; -extern const struct spi_programmer spi_programmer[]; int spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int spi_send_multicommand(struct spi_command *cmds); -int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int default_spi_send_multicommand(struct spi_command *cmds); uint32_t spi_get_valid_read_addr(void); -/* ichspi.c */ -#if CONFIG_INTERNAL == 1 -extern uint32_t ichspi_bbar; -int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, - int ich_generation); -int via_init_spi(struct pci_dev *dev); -int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int ich_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len); -int ich_spi_send_multicommand(struct spi_command *cmds); -#endif - -/* it87spi.c */ -void enter_conf_mode_ite(uint16_t port); -void exit_conf_mode_ite(uint16_t port); -struct superio probe_superio_ite(void); -int init_superio_ite(void); -int it87spi_init(void); -int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); - -/* sb600spi.c */ -#if CONFIG_INTERNAL == 1 -int sb600_probe_spi(struct pci_dev *dev); -int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); -#endif - -/* wbsio_spi.c */ -#if CONFIG_INTERNAL == 1 -int wbsio_check_for_spi(void); -int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -#endif - -/* serprog.c */ -int serprog_init(void); -int serprog_shutdown(void); -void serprog_chip_writeb(uint8_t val, chipaddr addr); -uint8_t serprog_chip_readb(const chipaddr addr); -void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -void serprog_delay(int delay); - -/* serial.c */ -#if _WIN32 -typedef HANDLE fdtype; -#else -typedef int fdtype; -#endif - -void sp_flush_incoming(void); -fdtype sp_openserport(char *dev, unsigned int baud); -void __attribute__((noreturn)) sp_die(char *msg); -extern fdtype sp_fd; -int serialport_shutdown(void); -int serialport_write(unsigned char *buf, unsigned int writecnt); -int serialport_read(unsigned char *buf, unsigned int readcnt); - #endif /* !__FLASH_H__ */ Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/flashrom.c Wed Jul 28 00:41:39 2010 (r1112) @@ -33,6 +33,7 @@ #endif #include "flash.h" #include "flashchips.h" +#include "programmer.h" const char * const flashrom_version = FLASHROM_VERSION; char *chip_to_probe = NULL; Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/ft2232_spi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -27,6 +27,7 @@ #include <ctype.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" #include <ftdi.h> Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/gfxnvidia.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,6 +22,7 @@ #include <string.h> #include <sys/types.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_NVIDIA 0x10de Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/ichspi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -38,6 +38,7 @@ #include <string.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" /* ICH9 controller register definition */ Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/internal.c Wed Jul 28 00:41:39 2010 (r1112) @@ -23,6 +23,7 @@ #include <stdlib.h> #include <sys/types.h> #include "flash.h" +#include "programmer.h" #if NEED_PCI == 1 struct pci_dev *pci_dev_find_filter(struct pci_filter filter) Modified: trunk/it87spi.c ============================================================================== --- trunk/it87spi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/it87spi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -29,6 +29,7 @@ #include <stdlib.h> #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" #define ITE_SUPERIO_PORT1 0x2e Modified: trunk/layout.c ============================================================================== --- trunk/layout.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/layout.c Wed Jul 28 00:41:39 2010 (r1112) @@ -23,6 +23,7 @@ #include <string.h> #include <ctype.h> #include "flash.h" +#include "programmer.h" #if CONFIG_INTERNAL == 1 char *mainboard_vendor = NULL; Modified: trunk/nic3com.c ============================================================================== --- trunk/nic3com.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/nic3com.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,6 +22,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define BIOS_ROM_ADDR 0x04 #define BIOS_ROM_DATA 0x08 Modified: trunk/nicnatsemi.c ============================================================================== --- trunk/nicnatsemi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/nicnatsemi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,6 +22,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_NATSEMI 0x100b Modified: trunk/nicrealtek.c ============================================================================== --- trunk/nicrealtek.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/nicrealtek.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,6 +22,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_REALTEK 0x10ec #define PCI_VENDOR_ID_SMC1211 0x1113 Modified: trunk/pcidev.c ============================================================================== --- trunk/pcidev.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/pcidev.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,6 +22,7 @@ #include <string.h> #include <sys/types.h> #include "flash.h" +#include "programmer.h" uint32_t io_base_addr; struct pci_access *pacc; Modified: trunk/print.c ============================================================================== --- trunk/print.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/print.c Wed Jul 28 00:41:39 2010 (r1112) @@ -24,6 +24,7 @@ #include <stdlib.h> #include "flash.h" #include "flashchips.h" +#include "programmer.h" /* * Return a string corresponding to the bustype parameter. Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/print_wiki.c Wed Jul 28 00:41:39 2010 (r1112) @@ -25,6 +25,7 @@ #include <time.h> #include "flash.h" #include "flashchips.h" +#include "programmer.h" static const char * const wiki_header = "= Supported devices =\n\n\ <div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ Modified: trunk/processor_enable.c ============================================================================== --- trunk/processor_enable.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/processor_enable.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,6 +22,7 @@ */ #include "flash.h" +#include "programmer.h" #if defined(__i386__) || defined(__x86_64__) Copied and modified: trunk/programmer.h (from r1111, trunk/flash.h) ============================================================================== --- trunk/flash.h Wed Jul 28 00:03:46 2010 (r1111, copy source) +++ trunk/programmer.h Wed Jul 28 00:41:39 2010 (r1112) @@ -21,19 +21,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef __FLASH_H__ -#define __FLASH_H__ 1 - -#include <stdint.h> -#include <stddef.h> -#include "hwaccess.h" -#ifdef _WIN32 -#include <windows.h> -#undef min -#undef max -#endif - -typedef unsigned long chipaddr; +#ifndef __PROGRAMMER_H__ +#define __PROGRAMMER_H__ 1 enum programmer { #if CONFIG_INTERNAL == 1 @@ -113,22 +102,8 @@ extern const struct programmer_entry programmer_table[]; -int register_shutdown(void (*function) (void *data), void *data); - int programmer_init(char *param); int programmer_shutdown(void); -void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, - size_t len); -void programmer_unmap_flash_region(void *virt_addr, size_t len); -void chip_writeb(uint8_t val, chipaddr addr); -void chip_writew(uint16_t val, chipaddr addr); -void chip_writel(uint32_t val, chipaddr addr); -void chip_writen(uint8_t *buf, chipaddr addr, size_t len); -uint8_t chip_readb(const chipaddr addr); -uint16_t chip_readw(const chipaddr addr); -uint32_t chip_readl(const chipaddr addr); -void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -void programmer_delay(int usecs); enum bitbang_spi_master_type { BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */ @@ -147,122 +122,6 @@ int (*get_miso) (void); }; -#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) - -enum chipbustype { - CHIP_BUSTYPE_NONE = 0, - CHIP_BUSTYPE_PARALLEL = 1 << 0, - CHIP_BUSTYPE_LPC = 1 << 1, - CHIP_BUSTYPE_FWH = 1 << 2, - CHIP_BUSTYPE_SPI = 1 << 3, - CHIP_BUSTYPE_NONSPI = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH, - CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI, -}; - -/* - * How many different contiguous runs of erase blocks with one size each do - * we have for a given erase function? - */ -#define NUM_ERASEREGIONS 5 - -/* - * How many different erase functions do we have per chip? - */ -#define NUM_ERASEFUNCTIONS 5 - -#define FEATURE_REGISTERMAP (1 << 0) -#define FEATURE_BYTEWRITES (1 << 1) -#define FEATURE_LONG_RESET (0 << 4) -#define FEATURE_SHORT_RESET (1 << 4) -#define FEATURE_EITHER_RESET FEATURE_LONG_RESET -#define FEATURE_ADDR_FULL (0 << 2) -#define FEATURE_ADDR_MASK (3 << 2) -#define FEATURE_ADDR_2AA (1 << 2) -#define FEATURE_ADDR_AAA (2 << 2) -#define FEATURE_ADDR_SHIFTED (1 << 5) - -struct flashchip { - const char *vendor; - const char *name; - - enum chipbustype bustype; - - /* - * With 32bit manufacture_id and model_id we can cover IDs up to - * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's - * Identification code. - */ - uint32_t manufacture_id; - uint32_t model_id; - - int total_size; - int page_size; - int feature_bits; - - /* - * Indicate if flashrom has been tested with this flash chip and if - * everything worked correctly. - */ - uint32_t tested; - - int (*probe) (struct flashchip *flash); - - /* Delay after "enter/exit ID mode" commands in microseconds. */ - int probe_timing; - - /* - * Erase blocks and associated erase function. Any chip erase function - * is stored as chip-sized virtual block together with said function. - */ - struct block_eraser { - struct eraseblock{ - unsigned int size; /* Eraseblock size */ - unsigned int count; /* Number of contiguous blocks with that size */ - } eraseblocks[NUM_ERASEREGIONS]; - int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen); - } block_erasers[NUM_ERASEFUNCTIONS]; - - int (*printlock) (struct flashchip *flash); - int (*unlock) (struct flashchip *flash); - int (*write) (struct flashchip *flash, uint8_t *buf); - int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len); - - /* Some flash devices have an additional register space. */ - chipaddr virtual_memory; - chipaddr virtual_registers; -}; - -#define TEST_UNTESTED 0 - -#define TEST_OK_PROBE (1 << 0) -#define TEST_OK_READ (1 << 1) -#define TEST_OK_ERASE (1 << 2) -#define TEST_OK_WRITE (1 << 3) -#define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ) -#define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE) -#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE) -#define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE) -#define TEST_OK_MASK 0x0f - -#define TEST_BAD_PROBE (1 << 4) -#define TEST_BAD_READ (1 << 5) -#define TEST_BAD_ERASE (1 << 6) -#define TEST_BAD_WRITE (1 << 7) -#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) -#define TEST_BAD_MASK 0xf0 - -/* Timing used in probe routines. ZERO is -2 to differentiate between an unset - * field and zero delay. - * - * SPI devices will always have zero delay and ignore this field. - */ -#define TIMING_FIXME -1 -/* this is intentionally same value as fixme */ -#define TIMING_IGNORED -1 -#define TIMING_ZERO -2 - -extern struct flashchip flashchips[]; - #if CONFIG_INTERNAL == 1 struct penable { uint16_t vendor_id; @@ -319,7 +178,6 @@ extern const struct board_info boards_known[]; extern const struct board_info laptops_known[]; - #endif /* udelay.c */ @@ -329,7 +187,6 @@ #if NEED_PCI == 1 /* pcidev.c */ - extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_dev *pcidev_dev; @@ -345,12 +202,9 @@ #endif /* print.c */ -char *flashbuses_to_text(enum chipbustype bustype); -void print_supported(void); #if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1 void print_supported_pcidevs(const struct pcidev_status *devs); #endif -void print_supported_wiki(void); /* board_enable.c */ void w836xx_ext_enter(uint16_t port); @@ -574,12 +428,6 @@ int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); /* flashrom.c */ -enum write_granularity { - write_gran_1bit, - write_gran_1byte, - write_gran_256bytes, -}; -extern enum chipbustype buses_supported; struct decode_sizes { uint32_t parallel; uint32_t lpc; @@ -589,63 +437,12 @@ extern struct decode_sizes max_rom_decode; extern int programmer_may_write; extern unsigned long flashbase; -extern int verbose; -extern const char * const flashrom_version; -extern char *chip_to_probe; -void map_flash_registers(struct flashchip *flash); -int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len); -int erase_flash(struct flashchip *flash); -struct flashchip *probe_flash(struct flashchip *first_flash, int force); -int read_flash_to_file(struct flashchip *flash, char *filename); void check_chip_supported(struct flashchip *flash); int check_max_decode(enum chipbustype buses, uint32_t size); -int min(int a, int b); -int max(int a, int b); -char *extract_param(char **haystack, char *needle, char *delim); char *extract_programmer_param(char *param_name); -int check_erased_range(struct flashchip *flash, int start, int len); -int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); -int need_erase(uint8_t *have, uint8_t *want, int len, enum write_granularity gran); -char *strcat_realloc(char *dest, const char *src); -void print_version(void); -void print_banner(void); -int selfcheck(void); -int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it); - -#define OK 0 -#define NT 1 /* Not tested */ - -/* Something happened that shouldn't happen, but we can go on */ -#define ERROR_NONFATAL 0x100 - -/* cli_output.c */ -/* Let gcc and clang check for correct printf-style format strings. */ -int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3))); -#define MSG_ERROR 0 -#define MSG_INFO 1 -#define MSG_DEBUG 2 -#define MSG_BARF 3 -#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */ -#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */ -#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */ -#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */ -#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */ -#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */ -#define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */ -#define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */ -#define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */ -#define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */ -#define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */ -#define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */ - -/* cli_classic.c */ -int cli_classic(int argc, char *argv[]); /* layout.c */ int show_id(uint8_t *bios, int size, int force); -int read_romlayout(char *name); -int find_romentry(char *name); -int handle_romentries(uint8_t *buffer, struct flashchip *flash); /* spi.c */ enum spi_controller { @@ -678,12 +475,6 @@ SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; -struct spi_command { - unsigned int writecnt; - unsigned int readcnt; - const unsigned char *writearr; - unsigned char *readarr; -}; struct spi_programmer { int (*command)(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); @@ -696,13 +487,9 @@ extern enum spi_controller spi_controller; extern const struct spi_programmer spi_programmer[]; -int spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int spi_send_multicommand(struct spi_command *cmds); int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int default_spi_send_multicommand(struct spi_command *cmds); -uint32_t spi_get_valid_read_addr(void); /* ichspi.c */ #if CONFIG_INTERNAL == 1 @@ -768,4 +555,4 @@ int serialport_write(unsigned char *buf, unsigned int writecnt); int serialport_read(unsigned char *buf, unsigned int readcnt); -#endif /* !__FLASH_H__ */ +#endif /* !__PROGRAMMER_H__ */ Modified: trunk/rayer_spi.c ============================================================================== --- trunk/rayer_spi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/rayer_spi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -31,6 +31,7 @@ #if defined(__i386__) || defined(__x86_64__) #include "flash.h" +#include "programmer.h" /* We have two sets of pins, out and in. The numbers for both sets are * independent and are bitshift values, not real pin numbers. Modified: trunk/satasii.c ============================================================================== --- trunk/satasii.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/satasii.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,6 +22,7 @@ #include <stdlib.h> #include "flash.h" +#include "programmer.h" #define PCI_VENDOR_ID_SII 0x1095 Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/sb600spi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -25,6 +25,7 @@ #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" /* This struct is unused, but helps visualize the SB600 SPI BAR layout. Modified: trunk/serial.c ============================================================================== --- trunk/serial.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/serial.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,7 +22,6 @@ #include <stdio.h> #include <stdlib.h> #include <unistd.h> -#include "flash.h" #include <string.h> #include <ctype.h> #include <fcntl.h> @@ -35,6 +34,8 @@ #else #include <termios.h> #endif +#include "flash.h" +#include "programmer.h" fdtype sp_fd; Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/serprog.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,7 +22,6 @@ #include <stdio.h> #include <stdlib.h> #include <unistd.h> -#include "flash.h" #include <string.h> #include <ctype.h> #include <fcntl.h> @@ -36,6 +35,8 @@ #include <errno.h> #include <inttypes.h> #include <termios.h> +#include "flash.h" +#include "programmer.h" #define MSGHEADER "serprog:" Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/spi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -25,6 +25,7 @@ #include "flash.h" #include "flashchips.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" enum spi_controller spi_controller = SPI_CONTROLLER_NONE; Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/spi25.c Wed Jul 28 00:41:39 2010 (r1112) @@ -26,6 +26,7 @@ #include "flash.h" #include "flashchips.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" void spi_prettyprint_status_register(struct flashchip *flash); Modified: trunk/wbsio_spi.c ============================================================================== --- trunk/wbsio_spi.c Wed Jul 28 00:03:46 2010 (r1111) +++ trunk/wbsio_spi.c Wed Jul 28 00:41:39 2010 (r1112) @@ -22,6 +22,7 @@ #include "flash.h" #include "chipdrivers.h" +#include "programmer.h" #include "spi.h" #define WBSIO_PORT1 0x2e

1 0

[commit] r1111 - trunk
by repository service 28 Jul '10

28 Jul '10

Author: hailfinger Date: Wed Jul 28 00:03:46 2010 New Revision: 1111 URL: http://flashrom.org/trac/coreboot/changeset/1111 Log: Convert all PCI-based external programmers to use special little-endian accessors for all MMIO regions of PCI devices. This patch does _not_ touch the internal programmer (which is PCI-based as well). Huge thanks go to Misha Manulis who worked with me to create a first version of this patch for the satasii programmer based on modification of generic code. Huge thanks also go to Segher Boessenkool for suggesting the pci_mmio_ prefix for the abstraction layer. NOTE to package maintainers: With this patch, compilation and usage of flashrom should be safe on x86, x86_64, MIPS (little and big endian) and PowerPC (big endian). The internal programmer is disabled on non-x86/x86_64 (but it compiles). The atahpt, nic3com, nicnatsemi, nicrealtek and rayer_spi can not be compiled on non-x86/x86_64 because port space I/O is not (yet) supported. Please compile with default settings on x86/x86_64 and with the following settings on all other architectures: make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no CONFIG_NICNATSEMI=no CONFIG_RAYER_SPI=no Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Misha Manulis <misha(a)manulis.com> Modified: trunk/chipset_enable.c trunk/drkaiser.c trunk/flash.h trunk/gfxnvidia.c trunk/satasii.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Wed Jul 28 00:00:42 2010 (r1110) +++ trunk/chipset_enable.c Wed Jul 28 00:03:46 2010 (r1111) @@ -33,10 +33,10 @@ #include <unistd.h> #include "flash.h" -#if defined(__i386__) || defined(__x86_64__) - #define NOT_DONE_YET 1 +#if defined(__i386__) || defined(__x86_64__) + static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name) { uint8_t tmp; Modified: trunk/drkaiser.c ============================================================================== --- trunk/drkaiser.c Wed Jul 28 00:00:42 2010 (r1110) +++ trunk/drkaiser.c Wed Jul 28 00:03:46 2010 (r1111) @@ -69,10 +69,10 @@ void drkaiser_chip_writeb(uint8_t val, chipaddr addr) { - mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); + pci_mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); } uint8_t drkaiser_chip_readb(const chipaddr addr) { - return mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); + return pci_mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); } Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Wed Jul 28 00:00:42 2010 (r1110) +++ trunk/flash.h Wed Jul 28 00:03:46 2010 (r1111) @@ -418,6 +418,8 @@ uint32_t internal_chip_readl(const chipaddr addr); void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); #endif + +/* hwaccess.c */ void mmio_writeb(uint8_t val, void *addr); void mmio_writew(uint16_t val, void *addr); void mmio_writel(uint32_t val, void *addr); @@ -430,6 +432,12 @@ uint8_t mmio_le_readb(void *addr); uint16_t mmio_le_readw(void *addr); uint32_t mmio_le_readl(void *addr); +#define pci_mmio_writeb mmio_le_writeb +#define pci_mmio_writew mmio_le_writew +#define pci_mmio_writel mmio_le_writel +#define pci_mmio_readb mmio_le_readb +#define pci_mmio_readw mmio_le_readw +#define pci_mmio_readl mmio_le_readl /* programmer.c */ int noop_shutdown(void); Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Wed Jul 28 00:00:42 2010 (r1110) +++ trunk/gfxnvidia.c Wed Jul 28 00:03:46 2010 (r1111) @@ -100,10 +100,10 @@ void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr) { - mmio_writeb(val, nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); + pci_mmio_writeb(val, nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); } uint8_t gfxnvidia_chip_readb(const chipaddr addr) { - return mmio_readb(nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); + return pci_mmio_readb(nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); } Modified: trunk/satasii.c ============================================================================== --- trunk/satasii.c Wed Jul 28 00:00:42 2010 (r1110) +++ trunk/satasii.c Wed Jul 28 00:03:46 2010 (r1111) @@ -61,7 +61,7 @@ sii_bar = physmap("SATA SIL registers", addr, 0x100) + reg_offset; /* Check if ROM cycle are OK. */ - if ((id != 0x0680) && (!(mmio_readl(sii_bar) & (1 << 26)))) + if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) msg_pinfo("Warning: Flash seems unconnected.\n"); buses_supported = CHIP_BUSTYPE_PARALLEL; @@ -80,32 +80,32 @@ { uint32_t ctrl_reg, data_reg; - while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ; + while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) ; /* Mask out unused/reserved bits, set writes and start transaction. */ ctrl_reg &= 0xfcf80000; ctrl_reg |= (1 << 25) | (0 << 24) | ((uint32_t) addr & 0x7ffff); - data_reg = (mmio_readl((sii_bar + 4)) & ~0xff) | val; - mmio_writel(data_reg, (sii_bar + 4)); - mmio_writel(ctrl_reg, sii_bar); + data_reg = (pci_mmio_readl((sii_bar + 4)) & ~0xff) | val; + pci_mmio_writel(data_reg, (sii_bar + 4)); + pci_mmio_writel(ctrl_reg, sii_bar); - while (mmio_readl(sii_bar) & (1 << 25)) ; + while (pci_mmio_readl(sii_bar) & (1 << 25)) ; } uint8_t satasii_chip_readb(const chipaddr addr) { uint32_t ctrl_reg; - while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ; + while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) ; /* Mask out unused/reserved bits, set reads and start transaction. */ ctrl_reg &= 0xfcf80000; ctrl_reg |= (1 << 25) | (1 << 24) | ((uint32_t) addr & 0x7ffff); - mmio_writel(ctrl_reg, sii_bar); + pci_mmio_writel(ctrl_reg, sii_bar); - while (mmio_readl(sii_bar) & (1 << 25)) ; + while (pci_mmio_readl(sii_bar) & (1 << 25)) ; - return (mmio_readl(sii_bar + 4)) & 0xff; + return (pci_mmio_readl(sii_bar + 4)) & 0xff; }

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[PATCH] Add a udev rules file for flashrom
by Uwe Hermann 28 Jul '10

28 Jul '10

See patch. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[commit] r1110 - trunk/util
by repository service 28 Jul '10

28 Jul '10

Author: uwe Date: Wed Jul 28 00:00:42 2010 New Revision: 1110 URL: http://flashrom.org/trac/coreboot/changeset/1110 Log: Add a udev rules file for flashrom. This allows USB-based external programmers to be used by non-root users (which are in the 'plugdev' group). The file is to be installed by the distros into the proper place (not sure if this is distro-specific). On Debian the file will end up in /etc/udev/rules.d/z60_flashrom.rules. On some systems the 'plugdev' group might have to adapted to whatever the respective distro uses. The following devices are listed so far: - Amontec JTAGkey(2) - Buspirate - Dediprog SF100 - DLP Design DLP-USB1232H - FTDI FT4232H Mini-Module Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Added: trunk/util/ trunk/util/z60_flashrom.rules Added: trunk/util/z60_flashrom.rules ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/util/z60_flashrom.rules Wed Jul 28 00:00:42 2010 (r1110) @@ -0,0 +1,55 @@ +## +## This file is part of the flashrom project. +## +## Copyright (C) 2010 Uwe Hermann <uwe(a)hermann-uwe.de> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +## +## Please keep this list sorted alphabetically by vendor/device name. +## + +## +## This is tested on udev version 154, other versions may need small fixes. +## +## Note that you might want to change the "plugdev" group to whatever is +## suitable for your respective distribution. +## + +ACTION!="add|change", GOTO="flashrom_rules_end" +SUBSYSTEM!="usb|usb_device", GOTO="flashrom_rules_end" + +# Amontec JTAGkey(2) +# http://www.amontec.com/jtagkey.shtml +ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="664", GROUP="plugdev" + +# Buspirate +# http://dangerousprototypes.com/2009/10/08/bus-pirate-raw-spi-mode/ +ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="664", GROUP="plugdev" + +# Dediprog SF100 +# http://www.dediprog.com/SPI-flash-in-circuit-programming/SF100 +ATTRS{idVendor}=="0483", ATTRS{idProduct}=="dada", MODE="664", GROUP="plugdev" + +# DLP Design DLP-USB1232H +# http://www.dlpdesign.com/usb/usb1232h.shtml +ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="664", GROUP="plugdev" + +# FTDI FT4232H Mini-Module +# http://www.ftdichip.com/Products/EvaluationKits/FT4232H_MiniModule.htm +ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="664", GROUP="plugdev" + +LABEL="flashrom_rules_end"

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[PATCH] ft2232_spi: JTAGkey support, 3rd try
by Jörg Fischer 27 Jul '10

27 Jul '10

Hi, here is the 3rd version of the JTAGkey patch against trunk. * rename FTDI_2232H to FTDI_2232H_PID, same for FTDI_4232H * add AMONTEC_JTAGKEY_PID to flash.h * add FTDI_VID (0x0403) to flash.h Signed-off-by: Joerg Fischer <turboj(a)gmx.de> Index: flashrom.8 =================================================================== --- flashrom.8 (Revision 1109) +++ flashrom.8 (Arbeitskopie) @@ -177,11 +177,11 @@ .sp .BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)" .sp -.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI\ +.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI \ translation unit)" .sp -.BR "* ft2232_spi" " (for SPI flash ROMs attached to a FT2232H/FT4232H based\ -USB SPI programmer)" +.BR "* ft2232_spi" " (for SPI flash ROMs attached to a FT2232H/FT4232H/JTAGkey \ +based USB SPI programmer)" .sp .BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog)" .sp @@ -351,7 +351,7 @@ syntax where .B model can be any of -.BR 2232H ", or " 4232H +.BR 2232H ", "JTAGkey ", or " 4232H and .B interface can be any of Index: flash.h =================================================================== --- flash.h (Revision 1109) +++ flash.h (Arbeitskopie) @@ -530,8 +530,10 @@ #endif /* ft2232_spi.c */ -#define FTDI_FT2232H 0x6010 -#define FTDI_FT4232H 0x6011 +#define FTDI_VID 0x0403 +#define FTDI_FT2232H_PID 0x6010 +#define FTDI_FT4232H_PID 0x6011 +#define AMONTEC_JTAGKEY_PID 0xCFF8 int ft2232_spi_init(void); int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); Index: ft2232_spi.c =================================================================== --- ft2232_spi.c (Revision 1109) +++ ft2232_spi.c (Arbeitskopie) @@ -45,8 +45,29 @@ #define BITMODE_BITBANG_NORMAL 1 #define BITMODE_BITBANG_SPI 2 +/* Set data bits low-byte command: + * value: 0x08 CS=high, DI=low, DO=low, SK=low + * dir: 0x0b CS=output, DI=input, DO=output, SK=output + * + * JTAGkey(2) needs to enable its output via Bit4 / GPIOL0 + * value: 0x18 OE=high, CS=high, DI=low, DO=low, SK=low + * dir: 0x1b OE=output, CS=output, DI=input, DO=output, SK=output + * + */ +static unsigned char cs_bits = 0x08; +static unsigned char pindir = 0x0b; static struct ftdi_context ftdic_context; +static const char * getFT2232name(int ft2232_type) +{ + switch(ft2232_type) { + case FTDI_FT2232H_PID: return "2232H"; + case AMONTEC_JTAGKEY_PID: return "JTAGkey"; + default: return "4232H"; + } + return "4232H"; +} + static int send_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size) { int r; @@ -76,16 +97,22 @@ int f; struct ftdi_context *ftdic = &ftdic_context; unsigned char buf[512]; - int ft2232_type = FTDI_FT4232H; + int ft2232_type = FTDI_FT4232H_PID; enum ftdi_interface ft2232_interface = INTERFACE_B; char *arg; arg = extract_programmer_param("type"); if (arg) { if (!strcasecmp(arg, "2232H")) - ft2232_type = FTDI_FT2232H; + ft2232_type = FTDI_FT2232H_PID; else if (!strcasecmp(arg, "4232H")) - ft2232_type = FTDI_FT4232H; + ft2232_type = FTDI_FT4232H_PID; + else if (!strcasecmp(arg, "jtagkey")) { + ft2232_type = AMONTEC_JTAGKEY_PID; + ft2232_interface = INTERFACE_A; + cs_bits = 0x18; + pindir = 0x1b; + } else { msg_perr("Error: Invalid device type specified.\n"); free(arg); @@ -110,7 +137,7 @@ } free(arg); msg_pdbg("Using device type %s ", - (ft2232_type == FTDI_FT2232H) ? "2232H" : "4232H"); + getFT2232name(ft2232_type)); msg_pdbg("interface %s\n", (ft2232_interface == INTERFACE_A) ? "A" : "B"); @@ -119,7 +146,7 @@ return EXIT_FAILURE; // TODO } - f = ftdi_usb_open(ftdic, 0x0403, ft2232_type); + f = ftdi_usb_open(ftdic, FTDI_VID, ft2232_type); if (f < 0 && f != -5) { msg_perr("Unable to open FTDI device: %d (%s)\n", f, @@ -178,14 +205,9 @@ return -1; msg_pdbg("Set data bits\n"); - /* Set data bits low-byte command: - * value: 0x08 CS=high, DI=low, DO=low, SK=low - * dir: 0x0b CS=output, DI=input, DO=output, SK=output - */ -#define CS_BIT 0x08 buf[0] = SET_BITS_LOW; - buf[1] = CS_BIT; - buf[2] = 0x0b; + buf[1] = cs_bits; + buf[2] = pindir; if (send_buf(ftdic, buf, 3)) return -1; @@ -230,8 +252,8 @@ */ msg_pspew("Assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = 0 & ~CS_BIT; /* assertive */ - buf[i++] = 0x0b; + buf[i++] = 0 & ~cs_bits; /* assertive */ + buf[i++] = pindir; if (writecnt) { buf[i++] = 0x11; @@ -272,8 +294,8 @@ msg_pspew("De-assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = CS_BIT; - buf[i++] = 0x0b; + buf[i++] = cs_bits; + buf[i++] = pindir; ret = send_buf(ftdic, buf, i); failed |= ret; if (ret)

1 0

netbook hp 2133 mini :(
by Paweł Stawicki 27 Jul '10

27 Jul '10

Hi, I tried flashrom on my netbook with this result No EEPROM/flash device found. :( netbook still works :) I'm attaching the result of: sudo ./flashrom -p internal:laptop=force_I_want_a_brick -V > flashrom.txt flashrom version: ubuntu@ubuntu:~/flashrom$ svn info Path: . URL: svn://coreboot.org/flashrom/trunk Repository Root: svn://coreboot.org/flashrom Repository UUID: 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 Revision: 1109 Node Kind: directory Schedule: normal Last Changed Author: mkarcher Last Changed Rev: 1109 Last Changed Date: 2010-07-25 00:50:54 +0200 (nie, 25 lip 2010) Best Regards Paweł

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flashrom July 2010