Attention is currently required from: Hsuan Ting Chen.
Hello Hsuan Ting Chen,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/flashrom/+/81792?usp=email
to review the following change.
Change subject: flashchips: Add write-protect support for MX25L12833F ......................................................................
flashchips: Add write-protect support for MX25L12833F
datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/8934/MX25L12833F,%203V,...
BUG=b:332486637 TEST=TBU
Change-Id: I379c833eea3ed3487504126f45c6df672a772ddc Signed-off-by: Hsuan Ting Chen roccochen@chromium.org --- M flashchips.c 1 file changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/92/81792/1
diff --git a/flashchips.c b/flashchips.c index 7a40f07..c0518cb 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9041,6 +9041,14 @@ .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP}, + .wps = {SECURITY, 7, OTP}, /* This bit is set by WPSEL command */ + }, + .decode_range = DECODE_RANGE_SPI25, },
{