Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/68674 )
Change subject: plumb max_rom_decode into board_enable_flash() helper ......................................................................
plumb max_rom_decode into board_enable_flash() helper
Change-Id: I180b047fc07be946cdc5ba93871f9ff4f4c67df4 Signed-off-by: Edward O'Callaghan quasisec@google.com --- M board_enable.c M include/programmer.h M internal.c 3 files changed, 16 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/68674/1
diff --git a/board_enable.c b/board_enable.c index 4903c0f..ad6e63a 100644 --- a/board_enable.c +++ b/board_enable.c @@ -2735,7 +2735,8 @@ board_handle_phase(P2); }
-int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model) +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model, + struct decode_sizes *max_rom_decode_) { const struct board_match *board = NULL; int ret = 0; @@ -2766,7 +2767,7 @@
/* limit the maximum size of the parallel bus */ if (board->max_rom_decode_parallel) - max_rom_decode.parallel = board->max_rom_decode_parallel * 1024; + max_rom_decode_->parallel = board->max_rom_decode_parallel * 1024;
if (board->enable != NULL) { msg_pinfo("Enabling full flash access for board "%s %s"... ", diff --git a/include/programmer.h b/include/programmer.h index 386e6ec..dba701f 100644 --- a/include/programmer.h +++ b/include/programmer.h @@ -227,7 +227,8 @@ void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); void board_handle_before_superio(void); void board_handle_before_laptop(void); -int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model); +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model, + struct decode_sizes *max_rom_decode_);
/* chipset_enable.c */ int chipset_flash_enable(const struct programmer_cfg *cfg); diff --git a/internal.c b/internal.c index 8c834e2..d12fb1b 100644 --- a/internal.c +++ b/internal.c @@ -298,7 +298,7 @@ * parallel writes on IT8705F. Also, this handles the manual chip select for Gigabyte's DualBIOS. */ init_superio_ite(cfg);
- if (board_flash_enable(board_vendor, board_model, cb_vendor, cb_model)) { + if (board_flash_enable(board_vendor, board_model, cb_vendor, cb_model, &max_rom_decode)) { msg_perr("Aborting to be safe.\n"); ret = 1; goto internal_init_exit;