Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/39173 )
Change subject: chipset_enable.c: Mark Skylake U Premium as DEP ......................................................................
chipset_enable.c: Mark Skylake U Premium as DEP
Tested reading, writing and erasing the internal flash chip using an Acer Aspire ES1-572 laptop with an Intel i3-6006U. However, since all ME-enabled chipsets are marked as DEP instead of OK, this one shall follow suit as well.
Change-Id: Ib8ee9b5e811df74d2f48bd409806c72fe862bc24 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/73/39173/1
diff --git a/chipset_enable.c b/chipset_enable.c index 84e4b6b..4afb0e4 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1987,7 +1987,7 @@ {0x8086, 0x9d41, B_S, NT, "Intel", "Skylake / Kaby Lake Sample", enable_flash_pch100}, {0x8086, 0x9d43, B_S, NT, "Intel", "Skylake U Base", enable_flash_pch100}, {0x8086, 0x9d46, B_S, NT, "Intel", "Skylake Y Premium", enable_flash_pch100}, - {0x8086, 0x9d48, B_S, NT, "Intel", "Skylake U Premium", enable_flash_pch100}, + {0x8086, 0x9d48, B_S, DEP, "Intel", "Skylake U Premium", enable_flash_pch100}, {0x8086, 0x9d4b, B_S, NT, "Intel", "Kaby Lake Y w/ iHDCP2.2 Prem.", enable_flash_pch100}, {0x8086, 0x9d4e, B_S, DEP, "Intel", "Kaby Lake U w/ iHDCP2.2 Prem.", enable_flash_pch100}, {0x8086, 0x9d50, B_S, NT, "Intel", "Kaby Lake U w/ iHDCP2.2 Base", enable_flash_pch100},
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/39173 )
Change subject: chipset_enable.c: Mark Skylake U Premium as DEP ......................................................................
Patch Set 1: Code-Review+1
David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/39173 )
Change subject: chipset_enable.c: Mark Skylake U Premium as DEP ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/39173 )
Change subject: chipset_enable.c: Mark Skylake U Premium as DEP ......................................................................
Patch Set 1:
Hello?
Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/39173 )
Change subject: chipset_enable.c: Mark Skylake U Premium as DEP ......................................................................
chipset_enable.c: Mark Skylake U Premium as DEP
Tested reading, writing and erasing the internal flash chip using an Acer Aspire ES1-572 laptop with an Intel i3-6006U. However, since all ME-enabled chipsets are marked as DEP instead of OK, this one shall follow suit as well.
Change-Id: Ib8ee9b5e811df74d2f48bd409806c72fe862bc24 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/flashrom/+/39173 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: David Hendricks david.hendricks@gmail.com --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified David Hendricks: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve
diff --git a/chipset_enable.c b/chipset_enable.c index 84e4b6b..4afb0e4 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1987,7 +1987,7 @@ {0x8086, 0x9d41, B_S, NT, "Intel", "Skylake / Kaby Lake Sample", enable_flash_pch100}, {0x8086, 0x9d43, B_S, NT, "Intel", "Skylake U Base", enable_flash_pch100}, {0x8086, 0x9d46, B_S, NT, "Intel", "Skylake Y Premium", enable_flash_pch100}, - {0x8086, 0x9d48, B_S, NT, "Intel", "Skylake U Premium", enable_flash_pch100}, + {0x8086, 0x9d48, B_S, DEP, "Intel", "Skylake U Premium", enable_flash_pch100}, {0x8086, 0x9d4b, B_S, NT, "Intel", "Kaby Lake Y w/ iHDCP2.2 Prem.", enable_flash_pch100}, {0x8086, 0x9d4e, B_S, DEP, "Intel", "Kaby Lake U w/ iHDCP2.2 Prem.", enable_flash_pch100}, {0x8086, 0x9d50, B_S, NT, "Intel", "Kaby Lake U w/ iHDCP2.2 Base", enable_flash_pch100},
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Angel Pons (Code Review) -
David Hendricks (Code Review)
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Nico Huber (Code Review)
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Paul Menzel (Code Review)