Attention is currently required from: Nico Huber, Edward O'Callaghan.
Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69195 )
Change subject: ichspi.c: Read chip ID and use it to populate `flash->chip` ......................................................................
Patch Set 13:
(6 comments)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/69195/comment/69c88667_1e98379d PS12, Line 1500: flash->chip->tested = TEST_OK_PREWB;
What if ich_hwseq_get_flash_id() bailed?
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/56764021_52c2054c PS12, Line 135: #define HSFC_CYCLE_RDID HSFC_FCYCLE_MASK(6)
My dyslexic brain can hardly keep track of all this pre-processor nonsense going on here but this al […]
Unresolving so I don't forget this.
https://review.coreboot.org/c/flashrom/+/69195/comment/73a14ecd_0f74a675 PS12, Line 1404: if ((chip->manufacture_id == mfg_id) && (chip->model_id == model_id))
Should check if it's a SPI flash and if the database numbers are for RDID.
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/040b2a42_8ec62e87 PS12, Line 1466: const int len = sizeof(data);
Why 4?
Done
https://review.coreboot.org/c/flashrom/+/69195/comment/961eeae5_6eebfe46 PS12, Line 1474: if (ich_exec_sync_hwseq_xfer(flash, HSFC_CYCLE_RDID, 1, len, ich_generation,
Should check if RDID cycle is supported (since PCH100).
Unresolving so I don't forget this.
https://review.coreboot.org/c/flashrom/+/69195/comment/f62fda05_9aa0771b PS12, Line 1494: return -1;
Does this break normal read/erase/write operation if there is no matching entry?
Done