[M] Change in flashrom[master]: flashchips: Add Macronix MX25V8035F support

[PoroCYon (Code Review)]

PoroCYon has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/73823 )

Change subject: flashchips: Add Macronix MX25V8035F support
......................................................................

flashchips: Add Macronix MX25V8035F support

See https://www.macronix.com/Lists/Datasheet/Attachments/8405/MX25V8035F,%202.5V... .

I've only tested this patch with the MX25V1635F I have here, though
other chips in the series exist as well. Tested using serprog and ftdi
by writing a few images to the flash and seeing if changes were stored
correctly.

Change-Id: Ic5be2da4cfa2a2ff044a519bb6f367f21c15e4b8
Signed-off-by: PoroCYon 
---
M flashchips.c
M include/flashchips.h
2 files changed, 53 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/73823/1

diff --git a/flashchips.c b/flashchips.c
index 745cee5..ad0dbad 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -9609,6 +9609,41 @@
    	.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
    	.voltage	= {2300, 3600},
    },
+	{
+		.vendor		= "Macronix",
+		.name		= "MX25V8035F",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= MACRONIX_ID,
+		.model_id	= MACRONIX_MX25V8035F,
+		.total_size	= 1024,
+		.page_size	= 256,
+		/* OTP: 8KiB total; enter 0xB1, exit 0xC1 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_SCUR,
+		.tested		= TEST_UNTESTED,
+		.probe		= PROBE_SPI_RDID,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { { 4 * 1024, 256} },
+				.block_erase = SPI_BLOCK_ERASE_20,
+			}, {
+				.eraseblocks = { {32 * 1024,  32} },
+				.block_erase = SPI_BLOCK_ERASE_52,
+			}, {
+				.eraseblocks = { {64 * 1024,  16} },
+				.block_erase = SPI_BLOCK_ERASE_D8,
+			}, {
+				.eraseblocks = { {1 * 1024 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_C7,
+			}
+		},
+		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,
+		.write		= SPI_CHIP_WRITE256, /* Multi I/O supported */
+		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {2300, 3600},
+	},

{
    	.vendor		= "Macronix",
diff --git a/include/flashchips.h b/include/flashchips.h
index 58a6d0e..70ed544 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -513,6 +513,7 @@
 #define MACRONIX_MX66L51235F	0x201a	/* MX66L51235F, MX25L51245G */
 #define MACRONIX_MX66L1G45G	0x201b	/* MX66L1G45G */
 #define MACRONIX_MX25V4035F	0x2313
+#define MACRONIX_MX25V8035F	0x2314
 #define MACRONIX_MX25U8032E	0x2534
 #define MACRONIX_MX25U1635E	0x2535
 #define MACRONIX_MX25U3235E	0x2536	/* Same as MX25U6435F */