Rick Altherr has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/71206 )
Change subject: flashchips: Remove 4-byte addressing flag for MT25QL128 and mark as tested ......................................................................
flashchips: Remove 4-byte addressing flag for MT25QL128 and mark as tested
Using both a Dediprog SF100 and a Bus Pirate, read and erase works correctly on a MT25QL128 but writes were failing to take effect. Currently, the entry in flashchips.c indicates that this device supports 4-byte addressing. Micron's datasheet indicates that it does not. After removing the 4-byte addressing feature flag, both SF100 and Bus Pirate were able to successfully read, erase, and write a MT25QL128 so also marking as tested.
Change-Id: I6341456c722840a413bd2c51fe9a78bbda5cdbab Signed-off-by: Rick Altherr kc8apf@kc8apf.net --- M flashchips.c 1 file changed, 19 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/06/71206/1
diff --git a/flashchips.c b/flashchips.c index 9818eac..d303eb9 100644 --- a/flashchips.c +++ b/flashchips.c @@ -11997,8 +11997,8 @@ .page_size = 256, /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, - .tested = TEST_UNTESTED, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_PREW, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers =