Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/66671 )
(
9 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: tree: Fix drivers to pass programmer_cfg to pcidev_init() ......................................................................
tree: Fix drivers to pass programmer_cfg to pcidev_init()
Allow for programmer_cfg plumbing in pcidev.c The pci drivers impacted are plumbed here as well.
Change-Id: Ie0c9d1c0866d44f64d037c596f2e30547fcfd58f Signed-off-by: Edward O'Callaghan quasisec@google.com Reviewed-on: https://review.coreboot.org/c/flashrom/+/66671 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Anastasia Klimchuk aklm@chromium.org Reviewed-by: Felix Singer felixsinger@posteo.net --- M atahpt.c M atapromise.c M atavia.c M drkaiser.c M gfxnvidia.c M include/programmer.h M it8212.c M nic3com.c M nicintel.c M nicintel_eeprom.c M nicintel_spi.c M nicnatsemi.c M nicrealtek.c M ogp_spi.c M pcidev.c M satamv.c M satasii.c M tests/tests.c M tests/wraps.h 19 files changed, 39 insertions(+), 20 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved
diff --git a/atahpt.c b/atahpt.c index 2ab51a8..5c636d1 100644 --- a/atahpt.c +++ b/atahpt.c @@ -92,7 +92,7 @@ if (rget_io_perms()) return 1;
- dev = pcidev_init(ata_hpt, PCI_BASE_ADDRESS_4); + dev = pcidev_init(cfg, ata_hpt, PCI_BASE_ADDRESS_4); if (!dev) return 1;
diff --git a/atapromise.c b/atapromise.c index 4be2f71..63463f5 100644 --- a/atapromise.c +++ b/atapromise.c @@ -140,7 +140,7 @@ if (rget_io_perms()) return 1;
- dev = pcidev_init(ata_promise, PCI_BASE_ADDRESS_4); + dev = pcidev_init(cfg, ata_promise, PCI_BASE_ADDRESS_4); if (!dev) return 1;
diff --git a/atavia.c b/atavia.c index 6e64bb4..51530a4 100644 --- a/atavia.c +++ b/atavia.c @@ -163,7 +163,7 @@ } free(arg);
- dev = pcidev_init(ata_via, PCI_ROM_ADDRESS); /* Actually no BAR setup needed at all. */ + dev = pcidev_init(cfg, ata_via, PCI_ROM_ADDRESS); /* Actually no BAR setup needed at all. */ if (!dev) return 1;
diff --git a/drkaiser.c b/drkaiser.c index 2fb6b91..b121eec 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -87,7 +87,7 @@ uint32_t addr; uint8_t *bar;
- dev = pcidev_init(drkaiser_pcidev, PCI_BASE_ADDRESS_2); + dev = pcidev_init(cfg, drkaiser_pcidev, PCI_BASE_ADDRESS_2); if (!dev) return 1;
diff --git a/gfxnvidia.c b/gfxnvidia.c index 19fa2b6..941f0e8 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -111,7 +111,7 @@ uint32_t reg32; uint8_t *bar;
- dev = pcidev_init(gfx_nvidia, PCI_BASE_ADDRESS_0); + dev = pcidev_init(cfg, gfx_nvidia, PCI_BASE_ADDRESS_0); if (!dev) return 1;
diff --git a/include/programmer.h b/include/programmer.h index 4ed68da..76da9f9 100644 --- a/include/programmer.h +++ b/include/programmer.h @@ -124,7 +124,7 @@ extern struct pci_access *pacc; int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); -struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar); +struct pci_dev *pcidev_init(const struct programmer_cfg *cfg, const struct dev_entry *devs, int bar); struct pci_dev *pcidev_scandev(struct pci_filter *filter, struct pci_dev *start); struct pci_dev *pcidev_getdevfn(struct pci_dev *dev, const int func); struct pci_dev *pcidev_find_vendorclass(uint16_t vendor, uint16_t devclass); diff --git a/it8212.c b/it8212.c index 4d73665..18d1173 100644 --- a/it8212.c +++ b/it8212.c @@ -78,7 +78,7 @@ { uint8_t *bar;
- struct pci_dev *dev = pcidev_init(devs_it8212, PCI_ROM_ADDRESS); + struct pci_dev *dev = pcidev_init(cfg, devs_it8212, PCI_ROM_ADDRESS); if (!dev) return 1;
diff --git a/nic3com.c b/nic3com.c index fd4fe2b..44710ed 100644 --- a/nic3com.c +++ b/nic3com.c @@ -111,7 +111,7 @@ if (rget_io_perms()) return 1;
- dev = pcidev_init(nics_3com, PCI_BASE_ADDRESS_0); + dev = pcidev_init(cfg, nics_3com, PCI_BASE_ADDRESS_0); if (!dev) return 1;
diff --git a/nicintel.c b/nicintel.c index 9ef0315..16cb5e4 100644 --- a/nicintel.c +++ b/nicintel.c @@ -85,7 +85,7 @@ uint8_t *control_bar;
/* FIXME: BAR2 is not available if the device uses the CardBus function. */ - dev = pcidev_init(nics_intel, PCI_BASE_ADDRESS_2); + dev = pcidev_init(cfg, nics_intel, PCI_BASE_ADDRESS_2); if (!dev) return 1;
diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c index 8e59a45..4d3e7d5 100644 --- a/nicintel_eeprom.c +++ b/nicintel_eeprom.c @@ -485,7 +485,7 @@ uint32_t eec = 0; uint8_t *eebar;
- struct pci_dev *dev = pcidev_init(nics_intel_ee, PCI_BASE_ADDRESS_0); + struct pci_dev *dev = pcidev_init(cfg, nics_intel_ee, PCI_BASE_ADDRESS_0); if (!dev) return 1;
diff --git a/nicintel_spi.c b/nicintel_spi.c index 74cb122..851b525 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -289,7 +289,7 @@ { struct pci_dev *dev = NULL;
- dev = pcidev_init(nics_intel_spi, PCI_BASE_ADDRESS_0); + dev = pcidev_init(cfg, nics_intel_spi, PCI_BASE_ADDRESS_0); if (!dev) return 1;
diff --git a/nicnatsemi.c b/nicnatsemi.c index b9c58bc..779fb33 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -96,7 +96,7 @@ if (rget_io_perms()) return 1;
- dev = pcidev_init(nics_natsemi, PCI_BASE_ADDRESS_0); + dev = pcidev_init(cfg, nics_natsemi, PCI_BASE_ADDRESS_0); if (!dev) return 1;
diff --git a/nicrealtek.c b/nicrealtek.c index 61eb38b..7bf1ac9 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -107,7 +107,7 @@ if (rget_io_perms()) return 1;
- dev = pcidev_init(nics_realtek, PCI_BASE_ADDRESS_0); + dev = pcidev_init(cfg, nics_realtek, PCI_BASE_ADDRESS_0); if (!dev) return 1;
diff --git a/ogp_spi.c b/ogp_spi.c index 47a3d80..94915a3 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -140,7 +140,7 @@ } free(type);
- dev = pcidev_init(ogp_spi, PCI_BASE_ADDRESS_0); + dev = pcidev_init(cfg, ogp_spi, PCI_BASE_ADDRESS_0); if (!dev) return 1;
diff --git a/pcidev.c b/pcidev.c index 72561f0..0b35944 100644 --- a/pcidev.c +++ b/pcidev.c @@ -257,7 +257,7 @@ * also matches the specified bus:device.function. * For convenience, this function also registers its own undo handlers. */ -struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar) +struct pci_dev *pcidev_init(const struct programmer_cfg *cfg, const struct dev_entry *devs, int bar) { struct pci_dev *dev; struct pci_dev *found_dev = NULL; @@ -272,7 +272,7 @@ pci_filter_init(pacc, &filter);
/* Filter by bb:dd.f (if supplied by the user). */ - pcidev_bdf = extract_programmer_param_str(NULL, "pci"); /* TODO(quasisec): pass prog_param */ + pcidev_bdf = extract_programmer_param_str(cfg, "pci"); if (pcidev_bdf != NULL) { if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) { msg_perr("Error: %s\n", msg); diff --git a/satamv.c b/satamv.c index 19ecf22..f886076 100644 --- a/satamv.c +++ b/satamv.c @@ -126,7 +126,7 @@ return 1;
/* BAR0 has all internal registers memory mapped. */ - dev = pcidev_init(satas_mv, PCI_BASE_ADDRESS_0); + dev = pcidev_init(cfg, satas_mv, PCI_BASE_ADDRESS_0); if (!dev) return 1;
diff --git a/satasii.c b/satasii.c index a56171b..44b7331 100644 --- a/satasii.c +++ b/satasii.c @@ -112,7 +112,7 @@ uint16_t reg_offset, id; uint8_t *bar;
- dev = pcidev_init(satas_sii, PCI_BASE_ADDRESS_0); + dev = pcidev_init(cfg, satas_sii, PCI_BASE_ADDRESS_0); if (!dev) return 1;
diff --git a/tests/tests.c b/tests/tests.c index 11348b5..7a448d4 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -52,7 +52,7 @@ .device_id = NON_ZERO, };
-struct pci_dev *__wrap_pcidev_init(void *devs, int bar) +struct pci_dev *__wrap_pcidev_init(const struct programmer_cfg *cfg, void *devs, int bar) { LOG_ME; return &mock_pci_dev; diff --git a/tests/wraps.h b/tests/wraps.h index bfa8a41..f97eaba 100644 --- a/tests/wraps.h +++ b/tests/wraps.h @@ -19,10 +19,12 @@ #include <stdio.h> #include "flash.h"
+struct programmer_cfg; /* defined in programmer.h */ + char *__wrap_strdup(const char *s); void __wrap_physunmap(void *virt_addr, size_t len); void *__wrap_physmap(const char *descr, uintptr_t phys_addr, size_t len); -struct pci_dev *__wrap_pcidev_init(void *devs, int bar); +struct pci_dev *__wrap_pcidev_init(const struct programmer_cfg *cfg, void *devs, int bar); uintptr_t __wrap_pcidev_readbar(void *dev, int bar); void __wrap_sio_write(uint16_t port, uint8_t reg, uint8_t data); uint8_t __wrap_sio_read(uint16_t port, uint8_t reg);