Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/67392 )
Change subject: tree/: plumb flashctx into programmer_delay() ......................................................................
tree/: plumb flashctx into programmer_delay()
Change-Id: I51792168525c145092f78236265ba43acf70bfad Signed-off-by: Edward O'Callaghan quasisec@google.com --- M 82802ab.c M amd_imc.c M at45db.c M atavia.c M bitbang_spi.c M cli_classic.c M dediprog.c M dummyflasher.c M edi.c M en29lv640b.c M flashrom.c M ichspi.c M include/flash.h M it87spi.c M jedec.c M nicintel_eeprom.c M pony_spi.c M raiden_debug_spi.c M s25f.c M spi25.c M spi25_statusreg.c M sst28sf040.c M stm50.c M w29ee011.c M w39.c M wbsio_spi.c 26 files changed, 106 insertions(+), 96 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/92/67392/1
diff --git a/82802ab.c b/82802ab.c index 1db69e6..a600dc5 100644 --- a/82802ab.c +++ b/82802ab.c @@ -44,11 +44,11 @@
/* Reset to get a clean state */ chip_writeb(flash, 0xFF, bios); - programmer_delay(10); + programmer_delay(flash, 10);
/* Enter ID mode */ chip_writeb(flash, 0x90, bios); - programmer_delay(10); + programmer_delay(flash, 10);
id1 = chip_readb(flash, bios + (0x00 << shifted)); id2 = chip_readb(flash, bios + (0x01 << shifted)); @@ -56,7 +56,7 @@ /* Leave ID mode */ chip_writeb(flash, 0xFF, bios);
- programmer_delay(10); + programmer_delay(flash, 10);
msg_cdbg("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2);
@@ -113,7 +113,7 @@ // now start it chip_writeb(flash, 0x20, bios + page); chip_writeb(flash, 0xd0, bios + page); - programmer_delay(10); + programmer_delay(flash, 10);
// now let's see what the register is status = wait_82802ab(flash); diff --git a/amd_imc.c b/amd_imc.c index 4d3715e..b11eca3 100644 --- a/amd_imc.c +++ b/amd_imc.c @@ -60,7 +60,7 @@ msg_pwarn("IMC MBOX: Timeout!\n"); return 1; } - programmer_delay(1000); + programmer_delay(NULL, 1000); } return 0; } diff --git a/at45db.c b/at45db.c index 3f586a2..992f3a4 100644 --- a/at45db.c +++ b/at45db.c @@ -309,7 +309,7 @@ return 0; if (ret != 0 || retries-- == 0) return 1; - programmer_delay(us); + programmer_delay(flash, us); } }
diff --git a/atavia.c b/atavia.c index a0be396..2148147 100644 --- a/atavia.c +++ b/atavia.c @@ -90,7 +90,7 @@ ready = true; break; } else { - programmer_delay(1); + programmer_delay(NULL, 1); continue; } } @@ -169,7 +169,7 @@
/* Test if a flash chip is attached. */ pci_write_long(dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK); - programmer_delay(90); + programmer_delay(NULL, 90); uint32_t base = pci_read_long(dev, PCI_ROM_ADDRESS); msg_pdbg2("BROM base=0x%08x\n", base); if ((base & PCI_ROM_ADDRESS_MASK) == 0) { diff --git a/bitbang_spi.c b/bitbang_spi.c index a926b10..832bfde 100644 --- a/bitbang_spi.c +++ b/bitbang_spi.c @@ -76,10 +76,10 @@ bitbang_spi_set_sck_set_mosi(master, 0, 0, spi_data); else bitbang_spi_set_sck(master, 0, spi_data); - programmer_delay(master->half_period); + programmer_delay(NULL, master->half_period); ret <<= 1; ret |= bitbang_spi_set_sck_get_miso(master, 1, spi_data); - programmer_delay(master->half_period); + programmer_delay(NULL, master->half_period); } return ret; } @@ -90,9 +90,9 @@
for (i = 7; i >= 0; i--) { bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1, spi_data); - programmer_delay(master->half_period); + programmer_delay(NULL, master->half_period); bitbang_spi_set_sck(master, 1, spi_data); - programmer_delay(master->half_period); + programmer_delay(NULL, master->half_period); } }
@@ -122,9 +122,9 @@ readarr[i] = bitbang_spi_read_byte(master, data->spi_data);
bitbang_spi_set_sck(master, 0, data->spi_data); - programmer_delay(master->half_period); + programmer_delay(flash, master->half_period); bitbang_spi_set_cs(master, 1, data->spi_data); - programmer_delay(master->half_period); + programmer_delay(flash, master->half_period); /* FIXME: Run bitbang_spi_release_bus here or in programmer init? */ bitbang_spi_release_bus(master, data->spi_data);
diff --git a/cli_classic.c b/cli_classic.c index bac31d1..3a5be73 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -1140,7 +1140,7 @@ * done once we have a .reset function in struct flashchip. * Give the chip time to settle. */ - programmer_delay(100000); + programmer_delay(fill_flash, 100000); if (read_it) ret = do_read(fill_flash, filename); else if (extract_it) diff --git a/dediprog.c b/dediprog.c index 99c91e0..092e8c2 100644 --- a/dediprog.c +++ b/dediprog.c @@ -316,7 +316,7 @@
if (voltage_selector == 0) { /* Wait some time as the original driver does. */ - programmer_delay(200 * 1000); + programmer_delay(NULL, 200 * 1000); } ret = dediprog_write(dediprog_handle, CMD_SET_VCC, voltage_selector, 0, NULL, 0); if (ret != 0x0) { @@ -326,7 +326,7 @@ } if (voltage_selector != 0) { /* Wait some time as the original driver does. */ - programmer_delay(200 * 1000); + programmer_delay(NULL, 200 * 1000); } return 0; } diff --git a/dummyflasher.c b/dummyflasher.c index d42f344..100613c 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -896,7 +896,7 @@ msg_pspew(" 0x%02x", readarr[i]); msg_pspew("\n");
- programmer_delay((writecnt + readcnt) * emu_data->delay_us); + programmer_delay(flash, (writecnt + readcnt) * emu_data->delay_us); return 0; }
diff --git a/edi.c b/edi.c index a2219ac..56ed62c 100644 --- a/edi.c +++ b/edi.c @@ -304,7 +304,7 @@ return -1;
while (edi_spi_busy(flash) == 1 && timeout) { - programmer_delay(10); + programmer_delay(flash, 10); timeout--; }
@@ -379,7 +379,7 @@ return -1;
while (edi_spi_busy(flash) == 1 && timeout) { - programmer_delay(10); + programmer_delay(flash, 10); timeout--; }
@@ -435,7 +435,7 @@
/* Just in case. */ while (edi_spi_busy(flash) == 1 && timeout) { - programmer_delay(10); + programmer_delay(flash, 10); timeout--; }
diff --git a/en29lv640b.c b/en29lv640b.c index 6c0a565..8a8d641 100644 --- a/en29lv640b.c +++ b/en29lv640b.c @@ -64,7 +64,7 @@ chip_writeb(flash, 0x55, bios + 0x555); chip_writeb(flash, 0x90, bios + 0xAAA);
- programmer_delay(10); + programmer_delay(flash, 10);
id1 = chip_readb(flash, bios + 0x200); id1 |= (chip_readb(flash, bios) << 8); @@ -73,7 +73,7 @@
chip_writeb(flash, 0xF0, bios + 0xAAA);
- programmer_delay(10); + programmer_delay(flash, 10);
msg_cdbg("%s: id1 0x%04x, id2 0x%04x\n", __func__, id1, id2);
diff --git a/flashrom.c b/flashrom.c index 7921082..ce10cea 100644 --- a/flashrom.c +++ b/flashrom.c @@ -207,7 +207,7 @@ msg_gspew("%s: unmapped 0x%0*" PRIxPTR "\n", __func__, PRIxPTR_WIDTH, (uintptr_t)virt_addr); }
-void programmer_delay(unsigned int usecs) +void programmer_delay(const struct flashctx *flash, unsigned int usecs) { if (usecs > 0) { if (programmer->delay) @@ -1746,7 +1746,7 @@ msg_cinfo("Verifying flash... ");
/* Work around chips which need some time to calm down. */ - programmer_delay(1000*1000); + programmer_delay(flashctx, 1000*1000);
if (verify_all) combine_image_by_layout(flashctx, newcontents, oldcontents); diff --git a/ichspi.c b/ichspi.c index 855b7fb..2479e97 100644 --- a/ichspi.c +++ b/ichspi.c @@ -874,7 +874,7 @@
timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */ while ((REGREAD16(ICH7_REG_SPIS) & SPIS_SCIP) && --timeout) { - programmer_delay(10); + programmer_delay(NULL, 10); } if (!timeout) { msg_perr("Error: SCIP never cleared!\n"); @@ -950,7 +950,7 @@ /* Wait for Cycle Done Status or Flash Cycle Error. */ while (((REGREAD16(ICH7_REG_SPIS) & (SPIS_CDS | SPIS_FCERR)) == 0) && --timeout) { - programmer_delay(10); + programmer_delay(NULL, 10); } if (!timeout) { msg_perr("timeout, ICH7_REG_SPIS=0x%04x\n", REGREAD16(ICH7_REG_SPIS)); @@ -990,7 +990,7 @@
timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */ while ((REGREAD8(swseq_data.reg_ssfsc) & SSFS_SCIP) && --timeout) { - programmer_delay(10); + programmer_delay(NULL, 10); } if (!timeout) { msg_perr("Error: SCIP never cleared!\n"); @@ -1070,7 +1070,7 @@ /* Wait for Cycle Done Status or Flash Cycle Error. */ while (((REGREAD32(swseq_data.reg_ssfsc) & (SSFS_FDONE | SSFS_FCERR)) == 0) && --timeout) { - programmer_delay(10); + programmer_delay(NULL, 10); } if (!timeout) { msg_perr("timeout, REG_SSFS=0x%08x\n", REGREAD32(swseq_data.reg_ssfsc)); @@ -1318,7 +1318,7 @@ while ((((hsfs = REGREAD16(ICH9_REG_HSFS)) & (HSFS_FDONE | HSFS_FCERR)) == 0) && --timeout_us) { - programmer_delay(8); + programmer_delay(NULL, 8); } REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS)); if (!timeout_us) { diff --git a/include/flash.h b/include/flash.h index 79aaa64..71cef8d 100644 --- a/include/flash.h +++ b/include/flash.h @@ -57,7 +57,7 @@ int register_shutdown(int (*function) (void *data), void *data); void *programmer_map_flash_region(const char *descr, uintptr_t phys_addr, size_t len); void programmer_unmap_flash_region(void *virt_addr, size_t len); -void programmer_delay(unsigned int usecs); +void programmer_delay(const struct flashrom_flashctx *flash, unsigned int usecs);
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
diff --git a/it87spi.c b/it87spi.c index eb04141..a529fba 100644 --- a/it87spi.c +++ b/it87spi.c @@ -145,7 +145,7 @@ if((status & SPI_SR_WIP) == 0) return 0;
- programmer_delay(1000); + programmer_delay(flash, 1000); } return 0; } diff --git a/jedec.c b/jedec.c index 2542f3e..c4ee0c7 100644 --- a/jedec.c +++ b/jedec.c @@ -44,7 +44,7 @@
while (i++ < 0xFFFFFFF) { if (delay) - programmer_delay(delay); + programmer_delay(flash, delay); tmp2 = chip_readb(flash, dst) & 0x40; if (tmp1 == tmp2) { break; @@ -193,31 +193,31 @@ * reset command. */ if (probe_timing_enter) - programmer_delay(probe_timing_enter); + programmer_delay(flash, probe_timing_enter); /* Reset chip to a clean slate */ if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); if (probe_timing_exit) - programmer_delay(10); + programmer_delay(flash, 10); } chip_writeb(flash, 0xF0, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) - programmer_delay(probe_timing_exit); + programmer_delay(flash, probe_timing_exit);
/* Issue JEDEC Product ID Entry command */ chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_enter) - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); if (probe_timing_enter) - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0x90, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_enter) - programmer_delay(probe_timing_enter); + programmer_delay(flash, probe_timing_enter);
/* Read product ID */ id1 = chip_readb(flash, bios + (0x00 << shifted)); @@ -242,14 +242,14 @@ { chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); if (probe_timing_exit) - programmer_delay(10); + programmer_delay(flash, 10); } chip_writeb(flash, 0xF0, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) - programmer_delay(probe_timing_exit); + programmer_delay(flash, probe_timing_exit);
msg_cdbg("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2); if (!oddparity(id1)) @@ -293,18 +293,18 @@
/* Issue the Sector Erase command */ chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x80, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us);
chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x30, bios + page); - programmer_delay(delay_us); + programmer_delay(flash, delay_us);
/* wait for Toggle bit ready */ toggle_ready_jedec_slow(flash, bios); @@ -325,18 +325,18 @@
/* Issue the Sector Erase command */ chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x80, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us);
chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x50, bios + block); - programmer_delay(delay_us); + programmer_delay(flash, delay_us);
/* wait for Toggle bit ready */ toggle_ready_jedec_slow(flash, bios); @@ -356,18 +356,18 @@
/* Issue the JEDEC Chip Erase command */ chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x80, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us);
chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us); chip_writeb(flash, 0x10, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(delay_us); + programmer_delay(flash, delay_us);
toggle_ready_jedec_slow(flash, bios);
diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c index 01f9075..1efcbe0 100644 --- a/nicintel_eeprom.c +++ b/nicintel_eeprom.c @@ -213,7 +213,7 @@ eewr |= BIT(EEWR_CMDV); pci_mmio_writel(eewr, eebar + EEWR);
- programmer_delay(5); + programmer_delay(NULL, 5); int i; for (i = 0; i < MAX_ATTEMPTS; i++) if (pci_mmio_readl(eebar + EEWR) & BIT(EEWR_DONE)) @@ -338,7 +338,7 @@ nicintel_ee_bitbang(eebar, 0x00, &rdsr);
nicintel_ee_bitset(eebar, EEC, EE_CS, 1); - programmer_delay(1); + programmer_delay(NULL, 1); if (!(rdsr & SPI_SR_WIP)) { return 0; } @@ -379,7 +379,7 @@ nicintel_ee_bitset(eebar, EEC, EE_CS, 0); nicintel_ee_bitbang(eebar, JEDEC_WREN, NULL); nicintel_ee_bitset(eebar, EEC, EE_CS, 1); - programmer_delay(1); + programmer_delay(flash, 1);
/* data */ nicintel_ee_bitset(eebar, EEC, EE_CS, 0); @@ -394,7 +394,7 @@ break; } nicintel_ee_bitset(eebar, EEC, EE_CS, 1); - programmer_delay(1); + programmer_delay(flash, 1); if (nicintel_ee_ready(eebar)) goto out; } diff --git a/pony_spi.c b/pony_spi.c index 05d7cc6..a1668c3 100644 --- a/pony_spi.c +++ b/pony_spi.c @@ -243,7 +243,7 @@ for (i = 1; i <= 10; i++) { data_out = i & 1; sp_set_pin(PIN_RTS, data_out); - programmer_delay(1000); + programmer_delay(NULL, 1000);
/* If DSR does not change, we are not connected to what we think */ if (data_out != sp_get_pin(PIN_DSR)) { diff --git a/raiden_debug_spi.c b/raiden_debug_spi.c index 1c8b3b6..66164fb 100644 --- a/raiden_debug_spi.c +++ b/raiden_debug_spi.c @@ -887,7 +887,7 @@ /* Reattempting will not result in a recovery. */ return status; } - programmer_delay(RETRY_INTERVAL_US); + programmer_delay(flash, RETRY_INTERVAL_US); continue; }
@@ -922,7 +922,7 @@ /* Reattempting will not result in a recovery. */ return status; } - programmer_delay(RETRY_INTERVAL_US); + programmer_delay(flash, RETRY_INTERVAL_US); } }
@@ -957,7 +957,7 @@ " config attempt = %d\n" " status = 0x%05x\n", config_attempt + 1, status); - programmer_delay(RETRY_INTERVAL_US); + programmer_delay(NULL, RETRY_INTERVAL_US); continue; }
@@ -967,7 +967,7 @@ " config attempt = %d\n" " status = 0x%05x\n", config_attempt + 1, status); - programmer_delay(RETRY_INTERVAL_US); + programmer_delay(NULL, RETRY_INTERVAL_US); continue; }
@@ -1011,7 +1011,7 @@ config_attempt + 1, rsp_config.packet_v2.packet_id, rsp_config.packet_size); - programmer_delay(RETRY_INTERVAL_US); + programmer_delay(NULL, RETRY_INTERVAL_US); } return USB_SPI_HOST_INIT_FAILURE; } @@ -1235,7 +1235,7 @@ /* Reattempting will not result in a recovery. */ return status; } - programmer_delay(RETRY_INTERVAL_US); + programmer_delay(flash, RETRY_INTERVAL_US); continue; } for (read_attempt = 0; read_attempt < READ_RETRY_ATTEMPTS; @@ -1272,7 +1272,7 @@ } /* Device needs to reset its transmit index. */ restart_response_v2(ctx_data); - programmer_delay(RETRY_INTERVAL_US); + programmer_delay(flash, RETRY_INTERVAL_US); } } } diff --git a/s25f.c b/s25f.c index 67715ed..23df191 100644 --- a/s25f.c +++ b/s25f.c @@ -93,7 +93,7 @@
/* Allow time for reset command to execute. The datasheet specifies * Trph = 35us, double that to be safe. */ - programmer_delay(T_RPH * 2); + programmer_delay(flash, T_RPH * 2);
return 0; } @@ -126,7 +126,7 @@ }
/* Allow time for reset command to execute. Double tRPH to be safe. */ - programmer_delay(T_RPH * 2); + programmer_delay(flash, T_RPH * 2);
return 0; } @@ -160,7 +160,7 @@ return -1; }
- programmer_delay(1000 * 10); + programmer_delay(flash, 1000 * 10); }
return 0; @@ -226,7 +226,7 @@ return -1; }
- programmer_delay(T_W); + programmer_delay(flash, T_W); return s25f_poll_status(flash); }
@@ -299,7 +299,7 @@ return result; }
- programmer_delay(S25FS_T_SE); + programmer_delay(flash, S25FS_T_SE); return s25f_poll_status(flash); }
@@ -337,7 +337,7 @@ return result; }
- programmer_delay(S25FL_T_SE); + programmer_delay(flash, S25FL_T_SE); return s25f_poll_status(flash); }
diff --git a/spi25.c b/spi25.c index 4454106..13a18f7 100644 --- a/spi25.c +++ b/spi25.c @@ -313,7 +313,7 @@ if (!(status & SPI_SR_WIP)) return 0;
- programmer_delay(poll_delay); + programmer_delay(flash, poll_delay); } }
diff --git a/spi25_statusreg.c b/spi25_statusreg.c index 5dbba75..d0ce859 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -152,7 +152,7 @@ */ int delay_ms = 5000; if (reg == STATUS1) { - programmer_delay(100 * 1000); + programmer_delay(flash, 100 * 1000); delay_ms -= 100; }
@@ -163,7 +163,7 @@ return result; if ((status & SPI_SR_WIP) == 0) return 0; - programmer_delay(10 * 1000); + programmer_delay(flash, 10 * 1000); }
diff --git a/sst28sf040.c b/sst28sf040.c index 9a08d6b..9080684 100644 --- a/sst28sf040.c +++ b/sst28sf040.c @@ -105,7 +105,7 @@ chip_writeb(flash, CHIP_ERASE, bios); chip_writeb(flash, CHIP_ERASE, bios);
- programmer_delay(10); + programmer_delay(flash, 10); toggle_ready_jedec(flash, bios);
/* FIXME: Check the status register for errors. */ diff --git a/stm50.c b/stm50.c index 37e560c..d495e09 100644 --- a/stm50.c +++ b/stm50.c @@ -34,7 +34,7 @@ // now start it chip_writeb(flash, 0x32, bios); chip_writeb(flash, 0xd0, bios); - programmer_delay(10); + programmer_delay(flash, 10);
uint8_t status = wait_82802ab(flash); print_status_82802ab(status); diff --git a/w29ee011.c b/w29ee011.c index a570bd6..62d7a0f 100644 --- a/w29ee011.c +++ b/w29ee011.c @@ -36,17 +36,17 @@
/* Issue JEDEC Product ID Entry command */ chip_writeb(flash, 0xAA, bios + 0x5555); - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0x55, bios + 0x2AAA); - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0x80, bios + 0x5555); - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0xAA, bios + 0x5555); - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0x55, bios + 0x2AAA); - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0x60, bios + 0x5555); - programmer_delay(10); + programmer_delay(flash, 10);
/* Read product ID */ id1 = chip_readb(flash, bios); @@ -54,11 +54,11 @@
/* Issue JEDEC Product ID Exit command */ chip_writeb(flash, 0xAA, bios + 0x5555); - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0x55, bios + 0x2AAA); - programmer_delay(10); + programmer_delay(flash, 10); chip_writeb(flash, 0xF0, bios + 0x5555); - programmer_delay(10); + programmer_delay(flash, 10);
msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
diff --git a/w39.c b/w39.c index f58c495..114d0b5 100644 --- a/w39.c +++ b/w39.c @@ -27,7 +27,7 @@ chip_writeb(flash, 0xAA, bios + 0x5555); chip_writeb(flash, 0x55, bios + 0x2AAA); chip_writeb(flash, 0x90, bios + 0x5555); - programmer_delay(10); + programmer_delay(flash, 10);
/* Read something, maybe hardware lock bits */ val = chip_readb(flash, bios + offset); @@ -36,7 +36,7 @@ chip_writeb(flash, 0xAA, bios + 0x5555); chip_writeb(flash, 0x55, bios + 0x2AAA); chip_writeb(flash, 0xF0, bios + 0x5555); - programmer_delay(10); + programmer_delay(flash, 10);
return val; } diff --git a/wbsio_spi.c b/wbsio_spi.c index 95ca1e9..a78c135 100644 --- a/wbsio_spi.c +++ b/wbsio_spi.c @@ -155,7 +155,7 @@
OUTB(writearr[0], data->spibase); OUTB(mode, data->spibase + 1); - programmer_delay(10); + programmer_delay(flash, 10);
if (!readcnt) return 0;
-
Edward O'Callaghan (Code Review)