Change in flashrom[master]: sb600spi.c: Use SPI100 bit mappings

[Felix Held (Code Review)]

Attention is currently required from: Robert Zieba, Paul Menzel, Jon Murphy, Edward O'Callaghan, Karthik Ramasubramanian.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63422 )

Change subject: sb600spi.c: Use SPI100 bit mappings
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/flashrom/+/63422/comment/e4d45c64_43adf072 
PS1, Line 11: Stop using the legacy
            : spi100 registers and use the correct ones.
> give me a few hours to check with the docs that this won't break things on older platforms before la […]

had a look at the docs and all FCHs that have the SPI100 controller also have the SPI registers 0x45 and 0x47. All FCHs with the older SPI controller don't have the SPI registers 0x45 and 0x47.
Most of the FCHs with SPI100 have both the old (first 32bit register of SPI MMIO) and the new (SPI MMIO 0x45 and 0x47) mapping, but the newest SoCs don't have the old mapping any more.
Also spi100_spi_send_command already accesses registers 0x48 and 0x4b which aren't available on the old spi controllers, but are available on the spi100 controllers. when 0x48 and 0x4b are available, 0x45 and 0x47 will also be available.