[S] Change in flashrom[master]: flashchips.c: remove WREN from GD25Q256D enter 4BA sequence

[Nico Huber (Code Review)]

Attention is currently required from: Edward O'Callaghan, Nikolai Artemiev.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70342 )

Change subject: flashchips.c: remove WREN from GD25Q256D enter 4BA sequence
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Patch Set 1: Code-Review+1

(1 comment)

Commit Message:

https://review.coreboot.org/c/flashrom/+/70342/comment/89a52696_7227994b 
PS1, Line 19: FT2232H
This programmer also supports native 4BA commands which are probably
used by default. Was JEDEC_ENTER_4_BYTE_ADDR_MODE tested specifically?
I guess trying `FEATURE_4BA_ENTER_WREN` vs. `FEATURE_4BA_ENTER` would
do, i.e. without the NATIVE and EAR flags.

Looking at the datasheet, there is also the `ADP` bit (STATUS3, bit 4)
to consider. If the bit is set it might look like we entered 4BA mode
because the chip was already in 4BA mode.