Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/58173?usp=email )
Change subject: flashchips: Add XTX XT25F64B ......................................................................
flashchips: Add XTX XT25F64B
Datasheet: http://file2.dzsc.com/product/19/06/22/216185_132959081.pdf Tested probe, read, erase and write with CH341a.
Signed-off-by: Nita Vesa werecatf@outlook.com Change-Id: I369db9ccfd5319d28424d10f77aab49ec73a8836 Signed-off-by: Anastasia Klimchuk aklm@flashrom.org Reviewed-on: https://review.coreboot.org/c/flashrom/+/58173 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Peter Marheine pmarheine@chromium.org --- M flashchips.c M include/flashchips.h 2 files changed, 43 insertions(+), 0 deletions(-)
Approvals: Peter Marheine: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/flashchips.c b/flashchips.c index d1ce20d..4ca37a7 100644 --- a/flashchips.c +++ b/flashchips.c @@ -20967,6 +20967,46 @@ },
{ + .vendor = "XTX Technology Limited", + .name = "XT25F64B", + .bustype = BUS_SPI, + .manufacture_id = XTX_ID, + .model_id = XTX_XT25F64B, + .total_size = 8 * 1024, + .page_size = 256, + /* Supports SFDP */ + /* OTP: 4 x 256 bytes */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, + .voltage = {2700, 3600}, + }, + + { .vendor = "Zetta Device", .name = "ZD25D20", .bustype = BUS_SPI, diff --git a/include/flashchips.h b/include/flashchips.h index 3bbd573..9e2564c 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -1041,6 +1041,9 @@ #define WINBOND_W49V002A 0xB0 #define WINBOND_W49V002FA 0x32
+#define XTX_ID 0x0B /* XTX Technology Limited */ +#define XTX_XT25F64B 0x4017 + #define ZETTADEVICE_ID 0xBA /* Zetta Device */ #define ZETTADEVICE_ZD25D20 0x2012 #define ZETTADEVICE_ZD25D40 0x2013