Change in flashrom[master]: ichspi: Unify timeouts across all SPI operations to 30s

[Subrata Banik (Code Review)]

Attention is currently required from: Subrata Banik, Nico Huber, Paul Menzel, Angel Pons, Anastasia Klimchuk.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62867 )

Change subject: ichspi: Unify timeouts across all SPI operations to 30s
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Patch Set 8:

(1 comment)

Patchset:

PS5:
> Oh I was referring to previous code,
>
> ich_hwseq_block_erase had `uint32_t timeout = 5000 * 1000;` 
> and for example in
> ich_hwseq_write had `uint16_t timeout = 100 * 60;`
> tow different values.
>
> and now this patch makes the same timeout everywhere. So I was wondering why there were different values before?

It was to meet the SPI operational timeout recommendation by the vendor datasheet (example: winbond spiflash W25Q256JV-DTR specification, table 9.7).