[S] Change in flashrom[main]: flashchips: add support for MX77U51250F chip

[Bora Guvendik (Code Review)]

Attention is currently required from: Anastasia Klimchuk, DZ, Nikolai Artemiev, Stefan Reinauer, Subrata Banik.

Bora Guvendik has posted comments on this change by Bora Guvendik. ( https://review.coreboot.org/c/flashrom/+/82626?usp=email )

Change subject: flashchips: add support for MX77U51250F chip
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Patch Set 3:

(1 comment)

File flashchips.c:

https://review.coreboot.org/c/flashrom/+/82626/comment/3512f041_391b93b1?usp... :
PS3, Line 11648: 	},
> If you plan to add write-protect support (i.e. […]

Subrata, is it okay if we add this with a later patch?

In the datasheet I have, I don't see a SRP bit and Status register bit 7 is marked reserved. However, by looking other Macronix parts, seems like srp maybe bit 7 and it seems to work. I would like to clarify this point do more testing before I claim WP works.

.reg_bits       =
{
   .srp    = {STATUS1, 7, RW},
   .bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
},

--wp-range=0x00000000,0x04000000 --wp-enable ->
Enabled hardware protection
Activated protection range: start=0x00000000 length=0x04000000 (all)
SUCCESS

--wp-list ->
Available protection ranges:
        start=0x00000000 length=0x00000000 (none)
        start=0x03ff0000 length=0x00010000 (upper 1/1024)
        start=0x03fe0000 length=0x00020000 (upper 1/512)
        start=0x03fc0000 length=0x00040000 (upper 1/256)
        start=0x03f80000 length=0x00080000 (upper 1/128)
        start=0x03f00000 length=0x00100000 (upper 1/64)
        start=0x03e00000 length=0x00200000 (upper 1/32)
        start=0x03c00000 length=0x00400000 (upper 1/16)
        start=0x03800000 length=0x00800000 (upper 1/8)
        start=0x03000000 length=0x01000000 (upper 1/4)
        start=0x02000000 length=0x02000000 (upper 1/2)
        start=0x00000000 length=0x04000000 (all)